libatomic_ops-7.2/0000755000175000017500000000000011753234214011211 500000000000000libatomic_ops-7.2/AUTHORS0000644000175000017500000000023011753234157012202 00000000000000Originally written by Hans Boehm, with some platform-dependent code imported from the Boehm-Demers-Weiser GC, where it was contributed by many others. libatomic_ops-7.2/config.guess0000755000175000017500000012761511753234157013473 00000000000000#! /bin/sh # Attempt to guess a canonical system name. # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, # 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 # Free Software Foundation, Inc. timestamp='2009-11-20' # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA # 02110-1301, USA. # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Per Bothner. Please send patches (context # diff format) to and include a ChangeLog # entry. # # This script attempts to guess a canonical system name similar to # config.sub. If it succeeds, it prints the system name on stdout, and # exits with 0. Otherwise, it exits with 1. # # You can get the latest version of this script from: # http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] Output the configuration name of the system \`$me' is run on. Operation modes: -h, --help print this help, then exit -t, --time-stamp print date of last modification, then exit -v, --version print version number, then exit Report bugs and patches to ." version="\ GNU config.guess ($timestamp) Originally written by Per Bothner. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. This is free software; see the source for copying conditions. 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) HP_ARCH=m68000 ;; 9000/[34]?? ) HP_ARCH=m68k ;; 9000/[678][0-9][0-9]) if [ -x /usr/bin/getconf ]; then sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` case "${sc_cpu_version}" in 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 532) # CPU_PA_RISC2_0 case "${sc_kernel_bits}" in 32) HP_ARCH="hppa2.0n" ;; 64) HP_ARCH="hppa2.0w" ;; '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 esac ;; esac fi if [ "${HP_ARCH}" = "" ]; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #define _HPUX_SOURCE #include #include int main () { #if defined(_SC_KERNEL_BITS) long bits = sysconf(_SC_KERNEL_BITS); #endif long cpu = sysconf (_SC_CPU_VERSION); switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0"); break; case CPU_PA_RISC1_1: puts ("hppa1.1"); break; case CPU_PA_RISC2_0: #if defined(_SC_KERNEL_BITS) switch (bits) { case 64: puts ("hppa2.0w"); break; case 32: puts ("hppa2.0n"); break; default: puts ("hppa2.0"); break; } break; #else /* !defined(_SC_KERNEL_BITS) */ puts ("hppa2.0"); break; #endif default: puts ("hppa1.0"); break; } exit (0); } EOF (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` test -z "$HP_ARCH" && HP_ARCH=hppa fi ;; esac if [ ${HP_ARCH} = "hppa2.0w" ] then eval $set_cc_for_build # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating # 32-bit code. hppa64-hp-hpux* has the same kernel and a compiler # generating 64-bit code. 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CPU_IS_PA_RISC returns correct results, however. */ if (CPU_IS_PA_RISC (cpu)) { switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; default: puts ("hppa-hitachi-hiuxwe2"); break; } } else if (CPU_IS_HP_MC68K (cpu)) puts ("m68k-hitachi-hiuxwe2"); else puts ("unknown-hitachi-hiuxwe2"); exit (0); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` && { echo "$SYSTEM_NAME"; exit; } echo unknown-hitachi-hiuxwe2 exit ;; 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) echo hppa1.1-hp-bsd exit ;; 9000/8??:4.3bsd:*:*) echo hppa1.0-hp-bsd exit ;; *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) echo hppa1.0-hp-mpeix exit ;; hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) echo hppa1.1-hp-osf exit ;; hp8??:OSF1:*:*) echo hppa1.0-hp-osf exit ;; i*86:OSF1:*:*) if [ -x /usr/sbin/sysversion ] ; then echo ${UNAME_MACHINE}-unknown-osf1mk else echo ${UNAME_MACHINE}-unknown-osf1 fi exit ;; parisc*:Lites*:*:*) echo hppa1.1-hp-lites exit ;; C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) echo c1-convex-bsd exit ;; C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit ;; C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) echo c34-convex-bsd exit ;; C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) echo c38-convex-bsd exit ;; C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) echo c4-convex-bsd exit ;; CRAY*Y-MP:*:*:*) echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*[A-Z]90:*:*:*) echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ -e 's/\.[^.]*$/.X/' exit ;; CRAY*TS:*:*:*) echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*T3E:*:*:*) echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*SV1:*:*:*) echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; *:UNICOS/mp:*:*) echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; 5000:UNIX_System_V:4.*:*) FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} exit ;; sparc*:BSD/OS:*:*) echo sparc-unknown-bsdi${UNAME_RELEASE} exit ;; *:BSD/OS:*:*) echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} exit ;; *:FreeBSD:*:*) case ${UNAME_MACHINE} in pc98) echo i386-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; amd64) echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; *) echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; esac exit ;; i*:CYGWIN*:*) echo ${UNAME_MACHINE}-pc-cygwin exit ;; *:MINGW*:*) echo ${UNAME_MACHINE}-pc-mingw32 exit ;; i*:windows32*:*) # uname -m includes "-pc" on this system. echo ${UNAME_MACHINE}-mingw32 exit ;; i*:PW*:*) echo ${UNAME_MACHINE}-pc-pw32 exit ;; *:Interix*:*) case ${UNAME_MACHINE} in x86) echo i586-pc-interix${UNAME_RELEASE} exit ;; authenticamd | genuineintel | EM64T) echo x86_64-unknown-interix${UNAME_RELEASE} exit ;; IA64) echo ia64-unknown-interix${UNAME_RELEASE} exit ;; esac ;; [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) echo i${UNAME_MACHINE}-pc-mks exit ;; 8664:Windows_NT:*) echo x86_64-pc-mks exit ;; i*:Windows_NT*:* | Pentium*:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # It also conflicts with pre-2.0 versions of AT&T UWIN. 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EV67) UNAME_MACHINE=alphaev67 ;; EV68*) UNAME_MACHINE=alphaev68 ;; esac objdump --private-headers /bin/sh | grep -q ld.so.1 if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} exit ;; arm*:Linux:*:*) eval $set_cc_for_build if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \ | grep -q __ARM_EABI__ then echo ${UNAME_MACHINE}-unknown-linux-gnu else echo ${UNAME_MACHINE}-unknown-linux-gnueabi fi exit ;; avr32*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; cris:Linux:*:*) echo cris-axis-linux-gnu exit ;; crisv32:Linux:*:*) echo crisv32-axis-linux-gnu exit ;; frv:Linux:*:*) echo frv-unknown-linux-gnu exit ;; i*86:Linux:*:*) LIBC=gnu eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #ifdef __dietlibc__ LIBC=dietlibc #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'` echo "${UNAME_MACHINE}-pc-linux-${LIBC}" exit ;; ia64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; m32r*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; m68*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; mips:Linux:*:* | mips64:Linux:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #undef CPU #undef ${UNAME_MACHINE} #undef ${UNAME_MACHINE}el #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) CPU=${UNAME_MACHINE}el #else #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) CPU=${UNAME_MACHINE} #else CPU= #endif #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'` test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; } ;; or32:Linux:*:*) echo or32-unknown-linux-gnu exit ;; padre:Linux:*:*) echo sparc-unknown-linux-gnu exit ;; parisc64:Linux:*:* | hppa64:Linux:*:*) echo hppa64-unknown-linux-gnu exit ;; parisc:Linux:*:* | hppa:Linux:*:*) # Look for CPU level case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in PA7*) echo hppa1.1-unknown-linux-gnu ;; PA8*) echo hppa2.0-unknown-linux-gnu ;; *) echo hppa-unknown-linux-gnu ;; esac exit ;; ppc64:Linux:*:*) echo powerpc64-unknown-linux-gnu exit ;; ppc:Linux:*:*) echo powerpc-unknown-linux-gnu exit ;; s390:Linux:*:* | s390x:Linux:*:*) echo ${UNAME_MACHINE}-ibm-linux exit ;; sh64*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; sh*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; sparc:Linux:*:* | sparc64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; vax:Linux:*:*) echo ${UNAME_MACHINE}-dec-linux-gnu exit ;; x86_64:Linux:*:*) echo x86_64-unknown-linux-gnu exit ;; xtensa*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; i*86:DYNIX/ptx:4*:*) # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. # earlier versions are messed up and put the nodename in both # sysname and nodename. echo i386-sequent-sysv4 exit ;; i*86:UNIX_SV:4.2MP:2.*) # Unixware is an offshoot of SVR4, but it has its own version # number series starting with 2... # I am not positive that other SVR4 systems won't match this, # I just have to hope. -- rms. # Use sysv4.2uw... so that sysv4* matches it. echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} exit ;; i*86:OS/2:*:*) # If we were able to find `uname', then EMX Unix compatibility # is probably installed. echo ${UNAME_MACHINE}-pc-os2-emx exit ;; i*86:XTS-300:*:STOP) echo ${UNAME_MACHINE}-unknown-stop exit ;; i*86:atheos:*:*) echo ${UNAME_MACHINE}-unknown-atheos exit ;; i*86:syllable:*:*) echo ${UNAME_MACHINE}-pc-syllable exit ;; i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.[02]*:*) echo i386-unknown-lynxos${UNAME_RELEASE} exit ;; i*86:*DOS:*:*) echo ${UNAME_MACHINE}-pc-msdosdjgpp exit ;; i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} else echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} fi exit ;; i*86:*:5:[678]*) # UnixWare 7.x, OpenUNIX and OpenServer 6. case `/bin/uname -X | grep "^Machine"` in *486*) UNAME_MACHINE=i486 ;; *Pentium) UNAME_MACHINE=i586 ;; *Pent*|*Celeron) UNAME_MACHINE=i686 ;; esac echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} exit ;; i*86:*:3.2:*) if test -f /usr/options/cb.name; then UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ && UNAME_MACHINE=i586 (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ && UNAME_MACHINE=i686 (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ && UNAME_MACHINE=i686 echo ${UNAME_MACHINE}-pc-sco$UNAME_REL else echo ${UNAME_MACHINE}-pc-sysv32 fi exit ;; pc:*:*:*) # Left here for compatibility: # uname -m prints for DJGPP always 'pc', but it prints nothing about # the processor, so we play safe by assuming i586. # Note: whatever this is, it MUST be the same as what config.sub # prints for the "djgpp" host, or else GDB configury will decide that # this is a cross-build. echo i586-pc-msdosdjgpp exit ;; Intel:Mach:3*:*) echo i386-pc-mach3 exit ;; paragon:*:*:*) echo i860-intel-osf1 exit ;; i860:*:4.*:*) # i860-SVR4 if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 else # Add other i860-SVR4 vendors below as they are discovered. echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 fi exit ;; mini*:CTIX:SYS*5:*) # "miniframe" echo m68010-convergent-sysv exit ;; mc68k:UNIX:SYSTEM5:3.51m) echo m68k-convergent-sysv exit ;; M680?0:D-NIX:5.3:*) echo m68k-diab-dnix exit ;; M68*:*:R3V[5678]*:*) test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;; 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) OS_REL='' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4; exit; } ;; NCR*:*:4.2:* | MPRAS*:*:4.2:*) OS_REL='.3' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) echo m68k-unknown-lynxos${UNAME_RELEASE} exit ;; mc68030:UNIX_System_V:4.*:*) echo m68k-atari-sysv4 exit ;; TSUNAMI:LynxOS:2.*:*) echo sparc-unknown-lynxos${UNAME_RELEASE} exit ;; rs6000:LynxOS:2.*:*) echo rs6000-unknown-lynxos${UNAME_RELEASE} exit ;; PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.[02]*:*) echo powerpc-unknown-lynxos${UNAME_RELEASE} exit ;; SM[BE]S:UNIX_SV:*:*) echo mips-dde-sysv${UNAME_RELEASE} exit ;; RM*:ReliantUNIX-*:*:*) echo mips-sni-sysv4 exit ;; RM*:SINIX-*:*:*) echo mips-sni-sysv4 exit ;; *:SINIX-*:*:*) if uname -p 2>/dev/null >/dev/null ; then UNAME_MACHINE=`(uname -p) 2>/dev/null` echo ${UNAME_MACHINE}-sni-sysv4 else echo ns32k-sni-sysv fi exit ;; PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort # says echo i586-unisys-sysv4 exit ;; *:UNIX_System_V:4*:FTX*) # From Gerald Hewes . # How about differentiating between stratus architectures? -djm echo hppa1.1-stratus-sysv4 exit ;; *:*:*:FTX*) # From seanf@swdc.stratus.com. echo i860-stratus-sysv4 exit ;; i*86:VOS:*:*) # From Paul.Green@stratus.com. echo ${UNAME_MACHINE}-stratus-vos exit ;; *:VOS:*:*) # From Paul.Green@stratus.com. echo hppa1.1-stratus-vos exit ;; mc68*:A/UX:*:*) echo m68k-apple-aux${UNAME_RELEASE} exit ;; news*:NEWS-OS:6*:*) echo mips-sony-newsos6 exit ;; R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) if [ -d /usr/nec ]; then echo mips-nec-sysv${UNAME_RELEASE} else echo mips-unknown-sysv${UNAME_RELEASE} fi exit ;; BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. echo powerpc-be-beos exit ;; BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. echo powerpc-apple-beos exit ;; BePC:BeOS:*:*) # BeOS running on Intel PC compatible. echo i586-pc-beos exit ;; BePC:Haiku:*:*) # Haiku running on Intel PC compatible. echo i586-pc-haiku exit ;; SX-4:SUPER-UX:*:*) echo sx4-nec-superux${UNAME_RELEASE} exit ;; SX-5:SUPER-UX:*:*) echo sx5-nec-superux${UNAME_RELEASE} exit ;; SX-6:SUPER-UX:*:*) echo sx6-nec-superux${UNAME_RELEASE} exit ;; SX-7:SUPER-UX:*:*) echo sx7-nec-superux${UNAME_RELEASE} exit ;; SX-8:SUPER-UX:*:*) echo sx8-nec-superux${UNAME_RELEASE} exit ;; SX-8R:SUPER-UX:*:*) echo sx8r-nec-superux${UNAME_RELEASE} exit ;; Power*:Rhapsody:*:*) echo powerpc-apple-rhapsody${UNAME_RELEASE} exit ;; *:Rhapsody:*:*) echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} exit ;; *:Darwin:*:*) UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown case $UNAME_PROCESSOR in i386) eval $set_cc_for_build if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \ (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \ grep IS_64BIT_ARCH >/dev/null then UNAME_PROCESSOR="x86_64" fi fi ;; unknown) UNAME_PROCESSOR=powerpc ;; esac echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE} exit ;; *:procnto*:*:* | *:QNX:[0123456789]*:*) UNAME_PROCESSOR=`uname -p` if test "$UNAME_PROCESSOR" = "x86"; then UNAME_PROCESSOR=i386 UNAME_MACHINE=pc fi echo ${UNAME_PROCESSOR}-${UNAME_MACHINE}-nto-qnx${UNAME_RELEASE} exit ;; *:QNX:*:4*) echo i386-pc-qnx exit ;; NSE-?:NONSTOP_KERNEL:*:*) echo nse-tandem-nsk${UNAME_RELEASE} exit ;; NSR-?:NONSTOP_KERNEL:*:*) echo nsr-tandem-nsk${UNAME_RELEASE} exit ;; *:NonStop-UX:*:*) echo mips-compaq-nonstopux exit ;; BS2000:POSIX*:*:*) echo bs2000-siemens-sysv exit ;; DS/*:UNIX_System_V:*:*) echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} exit ;; *:Plan9:*:*) # "uname -m" is not consistent, so use $cputype instead. 386 # is converted to i386 for consistency with other x86 # operating systems. if test "$cputype" = "386"; then UNAME_MACHINE=i386 else UNAME_MACHINE="$cputype" fi echo ${UNAME_MACHINE}-unknown-plan9 exit ;; *:TOPS-10:*:*) echo pdp10-unknown-tops10 exit ;; *:TENEX:*:*) echo pdp10-unknown-tenex exit ;; KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) echo pdp10-dec-tops20 exit ;; XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) echo pdp10-xkl-tops20 exit ;; *:TOPS-20:*:*) echo pdp10-unknown-tops20 exit ;; *:ITS:*:*) echo pdp10-unknown-its exit ;; SEI:*:*:SEIUX) echo mips-sei-seiux${UNAME_RELEASE} exit ;; *:DragonFly:*:*) echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` exit ;; *:*VMS:*:*) UNAME_MACHINE=`(uname -p) 2>/dev/null` case "${UNAME_MACHINE}" in A*) echo alpha-dec-vms ; exit ;; I*) echo ia64-dec-vms ; exit ;; V*) echo vax-dec-vms ; exit ;; esac ;; *:XENIX:*:SysV) echo i386-pc-xenix exit ;; i*86:skyos:*:*) echo ${UNAME_MACHINE}-pc-skyos`echo ${UNAME_RELEASE}` | sed -e 's/ .*$//' exit ;; i*86:rdos:*:*) echo ${UNAME_MACHINE}-pc-rdos exit ;; i*86:AROS:*:*) echo ${UNAME_MACHINE}-pc-aros exit ;; esac #echo '(No uname command or uname output not recognized.)' 1>&2 #echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 eval $set_cc_for_build cat >$dummy.c < # include #endif main () { #if defined (sony) #if defined (MIPSEB) /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, I don't know.... */ printf ("mips-sony-bsd\n"); exit (0); #else #include printf ("m68k-sony-newsos%s\n", #ifdef NEWSOS4 "4" #else "" #endif ); exit (0); #endif #endif #if defined (__arm) && defined (__acorn) && defined (__unix) printf ("arm-acorn-riscix\n"); exit (0); #endif #if defined (hp300) && !defined (hpux) printf ("m68k-hp-bsd\n"); exit (0); #endif #if defined (NeXT) #if !defined (__ARCHITECTURE__) #define __ARCHITECTURE__ "m68k" #endif int version; version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; if (version < 4) printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); else printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); exit (0); #endif #if defined (MULTIMAX) || defined (n16) #if defined (UMAXV) printf ("ns32k-encore-sysv\n"); exit (0); #else #if defined (CMU) printf ("ns32k-encore-mach\n"); exit (0); #else printf ("ns32k-encore-bsd\n"); exit (0); #endif #endif #endif #if defined (__386BSD__) printf ("i386-pc-bsd\n"); exit (0); #endif #if defined (sequent) #if defined (i386) printf ("i386-sequent-dynix\n"); exit (0); #endif #if defined (ns32000) printf ("ns32k-sequent-dynix\n"); exit (0); #endif #endif #if defined (_SEQUENT_) struct utsname un; uname(&un); if (strncmp(un.version, "V2", 2) == 0) { printf ("i386-sequent-ptx2\n"); exit (0); } if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ printf ("i386-sequent-ptx1\n"); exit (0); } printf ("i386-sequent-ptx\n"); exit (0); #endif #if defined (vax) # if !defined (ultrix) # include # if defined (BSD) # if BSD == 43 printf ("vax-dec-bsd4.3\n"); exit (0); # else # if BSD == 199006 printf ("vax-dec-bsd4.3reno\n"); exit (0); # else printf ("vax-dec-bsd\n"); exit (0); # endif # endif # else printf ("vax-dec-bsd\n"); exit (0); # endif # else printf ("vax-dec-ultrix\n"); exit (0); # endif #endif #if defined (alliant) && defined (i860) printf ("i860-alliant-bsd\n"); exit (0); #endif exit (1); } EOF $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && SYSTEM_NAME=`$dummy` && { echo "$SYSTEM_NAME"; exit; } # Apollos put the system type in the environment. test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit; } # Convex versions that predate uname can use getsysinfo(1) if [ -x /usr/convex/getsysinfo ] then case `getsysinfo -f cpu_type` in c1*) echo c1-convex-bsd exit ;; c2*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit ;; c34*) echo c34-convex-bsd exit ;; c38*) echo c38-convex-bsd exit ;; c4*) echo c4-convex-bsd exit ;; esac fi cat >&2 < in order to provide the needed information to handle your system. config.guess timestamp = $timestamp uname -m = `(uname -m) 2>/dev/null || echo unknown` uname -r = `(uname -r) 2>/dev/null || echo unknown` uname -s = `(uname -s) 2>/dev/null || echo unknown` uname -v = `(uname -v) 2>/dev/null || echo unknown` /usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` /bin/uname -X = `(/bin/uname -X) 2>/dev/null` hostinfo = `(hostinfo) 2>/dev/null` /bin/universe = `(/bin/universe) 2>/dev/null` /usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` /bin/arch = `(/bin/arch) 2>/dev/null` /usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` /usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` UNAME_MACHINE = ${UNAME_MACHINE} UNAME_RELEASE = ${UNAME_RELEASE} UNAME_SYSTEM = ${UNAME_SYSTEM} UNAME_VERSION = ${UNAME_VERSION} EOF exit 1 # Local variables: # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "timestamp='" # time-stamp-format: "%:y-%02m-%02d" # time-stamp-end: "'" # End: libatomic_ops-7.2/doc/0000755000175000017500000000000011753234214011756 500000000000000libatomic_ops-7.2/doc/COPYING0000644000175000017500000004311011753234157012736 00000000000000 GNU GENERAL PUBLIC LICENSE Version 2, June 1991 Copyright (C) 1989, 1991 Free Software Foundation, Inc. 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. Preamble The licenses for most software are designed to take away your freedom to share and change it. By contrast, the GNU General Public License is intended to guarantee your freedom to share and change free software--to make sure the software is free for all its users. This General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it. (Some other Free Software Foundation software is covered by the GNU Library General Public License instead.) You can apply it to your programs, too. When we speak of free software, we are referring to freedom, not price. Our General Public Licenses are designed to make sure that you have the freedom to distribute copies of free software (and charge for this service if you wish), that you receive source code or can get it if you want it, that you can change the software or use pieces of it in new free programs; and that you know you can do these things. To protect your rights, we need to make restrictions that forbid anyone to deny you these rights or to ask you to surrender the rights. These restrictions translate to certain responsibilities for you if you distribute copies of the software, or if you modify it. For example, if you distribute copies of such a program, whether gratis or for a fee, you must give the recipients all the rights that you have. You must make sure that they, too, receive or can get the source code. And you must show them these terms so they know their rights. We protect your rights with two steps: (1) copyright the software, and (2) offer you this license which gives you legal permission to copy, distribute and/or modify the software. Also, for each author's protection and ours, we want to make certain that everyone understands that there is no warranty for this free software. If the software is modified by someone else and passed on, we want its recipients to know that what they have is not the original, so that any problems introduced by others will not reflect on the original authors' reputations. Finally, any free program is threatened constantly by software patents. We wish to avoid the danger that redistributors of a free program will individually obtain patent licenses, in effect making the program proprietary. To prevent this, we have made it clear that any patent must be licensed for everyone's free use or not licensed at all. The precise terms and conditions for copying, distribution and modification follow. GNU GENERAL PUBLIC LICENSE TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 0. This License applies to any program or other work which contains a notice placed by the copyright holder saying it may be distributed under the terms of this General Public License. The "Program", below, refers to any such program or work, and a "work based on the Program" means either the Program or any derivative work under copyright law: that is to say, a work containing the Program or a portion of it, either verbatim or with modifications and/or translated into another language. (Hereinafter, translation is included without limitation in the term "modification".) Each licensee is addressed as "you". Activities other than copying, distribution and modification are not covered by this License; they are outside its scope. The act of running the Program is not restricted, and the output from the Program is covered only if its contents constitute a work based on the Program (independent of having been made by running the Program). Whether that is true depends on what the Program does. 1. You may copy and distribute verbatim copies of the Program's source code as you receive it, in any medium, provided that you conspicuously and appropriately publish on each copy an appropriate copyright notice and disclaimer of warranty; keep intact all the notices that refer to this License and to the absence of any warranty; and give any other recipients of the Program a copy of this License along with the Program. You may charge a fee for the physical act of transferring a copy, and you may at your option offer warranty protection in exchange for a fee. 2. You may modify your copy or copies of the Program or any portion of it, thus forming a work based on the Program, and copy and distribute such modifications or work under the terms of Section 1 above, provided that you also meet all of these conditions: a) You must cause the modified files to carry prominent notices stating that you changed the files and the date of any change. b) You must cause any work that you distribute or publish, that in whole or in part contains or is derived from the Program or any part thereof, to be licensed as a whole at no charge to all third parties under the terms of this License. c) If the modified program normally reads commands interactively when run, you must cause it, when started running for such interactive use in the most ordinary way, to print or display an announcement including an appropriate copyright notice and a notice that there is no warranty (or else, saying that you provide a warranty) and that users may redistribute the program under these conditions, and telling the user how to view a copy of this License. (Exception: if the Program itself is interactive but does not normally print such an announcement, your work based on the Program is not required to print an announcement.) These requirements apply to the modified work as a whole. If identifiable sections of that work are not derived from the Program, and can be reasonably considered independent and separate works in themselves, then this License, and its terms, do not apply to those sections when you distribute them as separate works. But when you distribute the same sections as part of a whole which is a work based on the Program, the distribution of the whole must be on the terms of this License, whose permissions for other licensees extend to the entire whole, and thus to each and every part regardless of who wrote it. Thus, it is not the intent of this section to claim rights or contest your rights to work written entirely by you; rather, the intent is to exercise the right to control the distribution of derivative or collective works based on the Program. In addition, mere aggregation of another work not based on the Program with the Program (or with a work based on the Program) on a volume of a storage or distribution medium does not bring the other work under the scope of this License. 3. You may copy and distribute the Program (or a work based on it, under Section 2) in object code or executable form under the terms of Sections 1 and 2 above provided that you also do one of the following: a) Accompany it with the complete corresponding machine-readable source code, which must be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, b) Accompany it with a written offer, valid for at least three years, to give any third party, for a charge no more than your cost of physically performing source distribution, a complete machine-readable copy of the corresponding source code, to be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, c) Accompany it with the information you received as to the offer to distribute corresponding source code. (This alternative is allowed only for noncommercial distribution and only if you received the program in object code or executable form with such an offer, in accord with Subsection b above.) The source code for a work means the preferred form of the work for making modifications to it. For an executable work, complete source code means all the source code for all modules it contains, plus any associated interface definition files, plus the scripts used to control compilation and installation of the executable. However, as a special exception, the source code distributed need not include anything that is normally distributed (in either source or binary form) with the major components (compiler, kernel, and so on) of the operating system on which the executable runs, unless that component itself accompanies the executable. If distribution of executable or object code is made by offering access to copy from a designated place, then offering equivalent access to copy the source code from the same place counts as distribution of the source code, even though third parties are not compelled to copy the source along with the object code. 4. You may not copy, modify, sublicense, or distribute the Program except as expressly provided under this License. Any attempt otherwise to copy, modify, sublicense or distribute the Program is void, and will automatically terminate your rights under this License. However, parties who have received copies, or rights, from you under this License will not have their licenses terminated so long as such parties remain in full compliance. 5. You are not required to accept this License, since you have not signed it. However, nothing else grants you permission to modify or distribute the Program or its derivative works. These actions are prohibited by law if you do not accept this License. Therefore, by modifying or distributing the Program (or any work based on the Program), you indicate your acceptance of this License to do so, and all its terms and conditions for copying, distributing or modifying the Program or works based on it. 6. Each time you redistribute the Program (or any work based on the Program), the recipient automatically receives a license from the original licensor to copy, distribute or modify the Program subject to these terms and conditions. You may not impose any further restrictions on the recipients' exercise of the rights granted herein. You are not responsible for enforcing compliance by third parties to this License. 7. If, as a consequence of a court judgment or allegation of patent infringement or for any other reason (not limited to patent issues), conditions are imposed on you (whether by court order, agreement or otherwise) that contradict the conditions of this License, they do not excuse you from the conditions of this License. If you cannot distribute so as to satisfy simultaneously your obligations under this License and any other pertinent obligations, then as a consequence you may not distribute the Program at all. For example, if a patent license would not permit royalty-free redistribution of the Program by all those who receive copies directly or indirectly through you, then the only way you could satisfy both it and this License would be to refrain entirely from distribution of the Program. If any portion of this section is held invalid or unenforceable under any particular circumstance, the balance of the section is intended to apply and the section as a whole is intended to apply in other circumstances. It is not the purpose of this section to induce you to infringe any patents or other property right claims or to contest validity of any such claims; this section has the sole purpose of protecting the integrity of the free software distribution system, which is implemented by public license practices. Many people have made generous contributions to the wide range of software distributed through that system in reliance on consistent application of that system; it is up to the author/donor to decide if he or she is willing to distribute software through any other system and a licensee cannot impose that choice. This section is intended to make thoroughly clear what is believed to be a consequence of the rest of this License. 8. If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded. In such case, this License incorporates the limitation as if written in the body of this License. 9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. Each version is given a distinguishing version number. If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation. 10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally. NO WARRANTY 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. END OF TERMS AND CONDITIONS How to Apply These Terms to Your New Programs If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. Copyright (C) This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than `show w' and `show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program `Gnomovision' (which makes passes at compilers) written by James Hacker. , 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License. libatomic_ops-7.2/doc/README_win32.txt0000644000175000017500000000260311753234157014425 00000000000000Most of the atomic_ops functionality is available under Win32 with the Microsoft tools, but the build process currently is considerably more primitive than on Linux/Unix platforms. To build: 1) Go to the src directory in the distribution. 2) Make sure the Microsoft command-line tools (e.g. nmake) are available. 3) Run "nmake -f Makefile.msft". This should run some tests, which may print warnings about the types of the "Interlocked" functions. I haven't been able to make all versions of VC++ happy. If you know how to, please send a patch. 4) To compile applications, you will need to retain or copy the following pieces from the resulting src directory contents: "atomic_ops.h" - Header file defining low-level primitives. This includes files from: "atomic_ops"- Subdirectory containing implementation header files. "atomic_ops_stack.h" - Header file describing almost lock-free stack. "atomic_ops_malloc.h" - Header file describing almost lock-free malloc. "libatomic_ops_gpl.lib" - Library containing implementation of the above two. The atomic_ops.h implementation is entirely in the header files in Win32. Most clients of atomic_ops.h will need to define AO_ASSUME_WINDOWS98 before including it. Compare_and_swap is otherwise not available. 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It will work on a uniprocessor, but the tests are much more likely to pass in the presence of serious problems. 1) Type ./configure --prefix=; make; make check in the directory containing unpacked source. The usual GNU build machinery is used, except that only static, but position-independent, libraries are normally built. On Windows, read README_win32.txt instead. 2) Applications should include atomic_ops.h. Nearly all operations are implemented by header files included from it. It is sometimes necessary, and always recommended to also link against libatomic_ops.a. To use the almost non-blocking stack or malloc implementations, see the corresponding README files, and also link against libatomic_gpl.a before linking against libatomic_ops.a. OVERVIEW: Atomic_ops.h defines a large collection of operations, each one of which is a combination of an (optional) atomic memory operation, and a memory barrier. Also defines associated feature-test macros to determine whether a particular operation is available on the current target hardware (either directly or by synthesis). This is an attempt to replace various existing files with similar goals, since they usually do not handle differences in memory barrier styles with sufficient generality. If this is included after defining AO_REQUIRE_CAS, then the package will make an attempt to emulate compare-and-swap in a way that (at least on Linux) should still be async-signal-safe. As a result, most other atomic operations will then be defined using the compare-and-swap emulation. This emulation is slow, since it needs to disable signals. And it needs to block in case of contention. If you care about performance on a platform that can't directly provide compare-and-swap, there are probably better alternatives. But this allows easy ports to some such platforms (e.g. PA_RISC). The option is ignored if compare-and-swap can be implemented directly. If atomic_ops.h is included after defining AO_USE_PTHREAD_DEFS, then all atomic operations will be emulated with pthread locking. This is NOT async-signal-safe. And it is slow. It is intended primarily for debugging of the atomic_ops package itself. Note that the implementation reflects our understanding of real processor behavior. This occasionally diverges from the documented behavior. (E.g. the documented X86 behavior seems to be weak enough that it is impractical to use. Current real implementations appear to be much better behaved.) We of course are in no position to guarantee that future processors (even HPs) will continue to behave this way, though we hope they will. This is a work in progress. Corrections/additions for other platforms are greatly appreciated. It passes rudimentary tests on X86, Itanium, and Alpha. OPERATIONS: Most operations operate on values of type AO_t, which are unsigned integers whose size matches that of pointers on the given architecture. Exceptions are: - AO_test_and_set operates on AO_TS_t, which is whatever size the hardware supports with good performance. In some cases this is the length of a cache line. In some cases it is a byte. In many cases it is equivalent to AO_t. - A few operations are implemented on smaller or larger size integers. Such operations are indicated by the appropriate prefix: AO_char_... Operates on unsigned char values. AO_short_... Operates on unsigned short values. AO_int_... Operates on unsigned int values. (Currently a very limited selection of these is implemented. We're working on it.) The defined operations are all of the form AO_[_](). The component specifies an atomic memory operation. It may be one of the following, where the corresponding argument and result types are also specified: void nop() No atomic operation. The barrier may still be useful. AO_t load(const volatile AO_t * addr) Atomic load of *addr. void store(volatile AO_t * addr, AO_t new_val) Atomically store new_val to *addr. AO_t fetch_and_add(volatile AO_t *addr, AO_t incr) Atomically add incr to *addr, and return the original value of *addr. AO_t fetch_and_add1(volatile AO_t *addr) Equivalent to AO_fetch_and_add(addr, 1). AO_t fetch_and_sub1(volatile AO_t *addr) Equivalent to AO_fetch_and_add(addr, (AO_t)(-1)). void or(volatile AO_t *addr, AO_t incr) Atomically or incr into *addr. int compare_and_swap(volatile AO_t * addr, AO_t old_val, AO_t new_val) Atomically compare *addr to old_val, and replace *addr by new_val if the first comparison succeeds. Returns nonzero if the comparison succeeded and *addr was updated. AO_TS_VAL_t test_and_set(volatile AO_TS_t * addr) Atomically read the binary value at *addr, and set it. AO_TS_VAL_t is an enumeration type which includes two values AO_TS_SET and AO_TS_CLEAR. An AO_TS_t location is capable of holding an AO_TS_VAL_t, but may be much larger, as dictated by hardware constraints. Test_and_set logically sets the value to AO_TS_SET. It may be reset to AO_TS_CLEAR with the AO_CLEAR(AO_TS_t *) macro. AO_TS_t locations should be initialized to AO_TS_INITIALIZER. The values of AO_TS_SET and AO_TS_CLEAR are hardware dependent. (On PA-RISC, AO_TS_SET is zero!) Test_and_set is a more limited version of compare_and_swap. Its only advantage is that it is more easily implementable on some hardware. It should thus be used if only binary test-and-set functionality is needed. If available, we also provide compare_and_swap operations that operate on wider values. Since standard data types for double width values may not be available, these explicitly take pairs of arguments for the new and/or old value. Unfortunately, there are two common variants, neither of which can easily and efficiently emulate the other. The first performs a comparison against the entire value being replaced, where the second replaces a double-width replacement, but performs a single-width comparison: int compare_double_and_swap_double(volatile AO_double_t * addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2); int compare_and_swap_double(volatile AO_double_t * addr, AO_t old_val1, AO_t new_val1, AO_t new_val2); where AO_double_t is a structure containing AO_val1 and AO_val2 fields, both of type AO_t. For compare_and_swap_double, we compare against the val1 field. AO_double_t exists only if AO_HAVE_double_t is defined. ORDERING CONSTRAINTS: Each operation name also includes a suffix that specifies the associated ordering semantics. The ordering constraint limits reordering of this operation with respect to other atomic operations and ordinary memory references. The current implementation assumes that all memory references are to ordinary cacheable memory; the ordering guarantee is with respect to other threads or processes, not I/O devices. (Whether or not this distinction is important is platform-dependent.) Ordering suffixes are one of the following: : No memory barrier. A plain AO_nop() really does nothing. _release: Earlier operations must become visible to other threads before the atomic operation. _acquire: Later operations must become visible after this operation. _read: Subsequent reads must become visible after reads included in the atomic operation or preceding it. Rarely useful for clients? _write: Earlier writes become visible before writes during or after the atomic operation. Rarely useful for clients? _full: Ordered with respect to both earlier and later memory ops. AO_store_full or AO_nop_full are the normal ways to force a store to be ordered with respect to a later load. _release_write: Ordered with respect to earlier writes. This is normally implemented as either a _write or _release barrier. _dd_acquire_read: Ordered with respect to later reads that are data dependent on this one. This is needed on a pointer read, which is later dereferenced to read a second value, with the expectation that the second read is ordered after the first one. On most architectures, this is equivalent to no barrier. (This is very hard to define precisely. It should probably be avoided. A major problem is that optimizers tend to try to eliminate dependencies from the generated code, since dependencies force the hardware to execute the code serially.) _release_read: Ordered with respect to earlier reads. Useful for implementing read locks. Can be implemented as _release, but not as _read, since _read groups the current operation with the earlier ones. We assume that if a store is data-dependent on an a previous load, then the two are always implicitly ordered. It is possible to test whether AO_ is available on the current platform by checking whether AO_HAVE__ is defined as a macro. Note that we generally don't implement operations that are either meaningless (e.g. AO_nop_acquire, AO_nop_release) or which appear to have no clear use (e.g. AO_load_release, AO_store_acquire, AO_load_write, AO_store_read). On some platforms (e.g. PA-RISC) many operations will remain undefined unless AO_REQUIRE_CAS is defined before including the package. When typed in the package build directory, the following command will print operations that are unimplemented on the platform: make test_atomic; ./test_atomic The following command generates a file "list_atomic.i" containing the macro expansions of all implemented operations on the platform: make list_atomic.i Future directions: It currently appears that something roughly analogous to this is very likely to become part of the C++0x standard. That effort has pointed out a number of issues that we expect to address there. Since some of the solutions really require compiler support, they may not be completely addressed here. Known issues include: We should be more precise in defining the semantics of the ordering constraints, and if and how we can guarantee sequential consistency. Dd_acquire_read is very hard or impossible to define in a way that cannot be invalidated by reasonably standard compiler transformations. There is probably no good reason to provide operations on standard integer types, since those may have the wrong alignment constraints. Example: If you want to initialize an object, and then "publish" a pointer to it in a global location p, such that other threads reading the new value of p are guaranteed to see an initialized object, it suffices to use AO_release_write(p, ...) to write the pointer to the object, and to retrieve it in other threads with AO_acquire_read(p). Platform notes: All X86: We quietly assume 486 or better. Microsoft compilers: Define AO_ASSUME_WINDOWS98 to get access to hardware compare-and-swap functionality. This relies on the InterlockedCompareExchange() function which was apparently not supported in Windows95. (There may be a better way to get access to this.) Gcc on x86: Define AO_USE_PENTIUM4_INSTRS to use the Pentium 4 mfence instruction. Currently this is appears to be of marginal benefit. libatomic_ops-7.2/doc/README_malloc.txt0000644000175000017500000000601611753234157014734 00000000000000The libatomic_ops_gpl includes a simple almost-lock-free malloc implementation. This is intended as a safe way to allocate memory from a signal handler, or to allocate memory in the context of a library that does not know what thread library it will be used with. In either case locking is impossible. Note that the operations are only guaranteed to be 1-lock-free, i.e. a single blocked thread will not prevent progress, but multiple blocked threads may. To safely use these operations in a signal handler, the handler should be non-reentrant, i.e. it should not be interruptable by another handler using these operations. Furthermore use outside of signal handlers in a multithreaded application should be protected by a lock, so that at most one invocation may be interrupted by a signal. The header will define the macro "AO_MALLOC_IS_LOCK_FREE" on platforms on which malloc is completely lock-free, and hence these restrictions do not apply. In the presence of threads, but absence of contention, the time performance of this package should be as good, or slightly better than, most system malloc implementations. Its space performance is theoretically optimal (to within a constant factor), but probably quite poor in practice. In particular, no attempt is made to coalesce free small memory blocks. Something like Doug Lea's malloc is likely to use significantly less memory for complex applications. Performance on platforms without an efficient compare-and-swap implementation will be poor. This package was not designed for processor-scalability in the face of high allocation rates. If all threads happen to allocate different-sized objects, you might get lucky. Otherwise expect contention and false-sharing problems. If this is an issue, something like Maged Michael's algorithm (PLDI 2004) would be technically a far better choice. If you are concerned only with scalability, and not signal-safety, you might also consider using Hoard instead. We have seen a factor of 3 to 4 slowdown from the standard glibc malloc implementation with contention, even when the performance without contention was faster. (To make the implementation more scalable, one would need to replicate at least the free list headers, so that concurrent access is possible without cache conflicts.) Unfortunately there is no portable async-signal-safe way to obtain large chunks of memory from the OS. Based on reading of the source code, mmap-based allocation appears safe under Linux, and probably BSD variants. It is probably unsafe for operating systems built on Mach, such as Apple's Darwin. Without use of mmap, the allocator is limited to a fixed size, statically preallocated heap (2MB by default), and will fail to allocate objects above a certain size (just under 64K by default). Use of mmap to circumvent these limitations requires an explicit call. The entire interface to the AO_malloc package currently consists of: #include /* includes atomic_ops.h */ void *AO_malloc(size_t sz); void AO_free(void *p); void AO_malloc_enable_mmap(void); libatomic_ops-7.2/doc/Makefile.am0000644000175000017500000000020311753234157013733 00000000000000# installed documentation # dist_pkgdata_DATA=COPYING LICENSING.txt README.txt README_stack.txt README_malloc.txt README_win32.txt libatomic_ops-7.2/doc/LICENSING.txt0000644000175000017500000000536211753234157013766 00000000000000Our intent is to make it easy to use libatomic_ops, in both free and proprietary software. Hence most code that we expect to be linked into a client application is covered by an MIT-style license. A few library routines are covered by the GNU General Public License. These are put into a separate library, libatomic_ops_gpl.a . The low-level part of the library is mostly covered by the following license: ---------------------------------------- Copyright (c) ... Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -------------------------------- A few files in the sysdeps directory were inherited in part from the Boehm-Demers-Weiser conservative garbage collector, and are covered by its license, which is similar in spirit: -------------------------------- Copyright (c) ... THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED OR IMPLIED. ANY USE IS AT YOUR OWN RISK. Permission is hereby granted to use or copy this program for any purpose, provided the above notices are retained on all copies. Permission to modify the code and to distribute modified code is granted, provided the above notices are retained, and a notice that the code was modified is included with the above copyright notice. ---------------------------------- A few files are covered by the GNU General Public License. (See file "COPYING".) This applies only to test code, sample applications, and the libatomic_ops_gpl portion of the library. Thus libatomic_ops_gpl should generally not be linked into proprietary code. (This distinction was motivated by patent considerations.) It is possible that the license of the GPL pieces may be changed for future versions to make them more consistent with the rest of the package. If you submit patches, and have strong preferences about licensing, please express them. libatomic_ops-7.2/doc/README_stack.txt0000644000175000017500000000766411753234157014604 00000000000000Note that the AO_stack implementation is licensed under the GPL, unlike the lower level routines. The header file atomic_ops_stack.h defines a linked stack abstraction. Stacks may be accessed by multiple concurrent threads. The implementation is 1-lock-free, i.e. it will continue to make progress if at most one thread becomes inactive while operating on the data structure. (The implementation can be built to be N-lock-free for any given N. But that seems to rarely be useful, especially since larger N involve some slowdown.) This makes it safe to access these data structures from non-reentrant signal handlers, provided at most one non-signal-handler thread is accessing the data structure at once. This latter condition can be ensured by acquiring an ordinary lock around the non-handler accesses to the data structure. For details see: Hans-J. Boehm, "An Almost Non-Blocking Stack", PODC 2004, http://portal.acm.org/citation.cfm?doid=1011767.1011774, or http://www.hpl.hp.com/techreports/2004/HPL-2004-105.html (This is not exactly the implementation described there, since the interface was cleaned up in the interim. But it should perform very similarly.) We use a fully lock-free implementation when the underlying hardware makes that less expensive, i.e. when we have a double-wide compare-and-swap operation available. (The fully lock-free implementation uses an AO_t- sized version count, and assumes it does not wrap during the time any given operation is active. This seems reasonably safe on 32-bit hardware, and very safe on 64-bit hardware.) If a fully lock-free implementation is used, the macro AO_STACK_IS_LOCK_FREE will be defined. The implementation is interesting only because it allows reuse of existing nodes. This is necessary, for example, to implement a memory allocator. Since we want to leave the precise stack node type up to the client, we insist only that each stack node contains a link field of type AO_t. When a new node is pushed on the stack, the push operation expects to be passed the pointer to this link field, which will then be overwritten by this link field. Similarly, the pop operation returns a pointer to the link field of the object that previously was on the top of the stack. The cleanest way to use these routines is probably to define the stack node type with an initial AO_t link field, so that the conversion between the link-field pointer and the stack element pointer is just a compile-time cast. But other possibilities exist. (This would be cleaner in C++ with templates.) A stack is represented by an AO_stack_t structure. (This is normally 2 or 3 times the size of a pointer.) It may be statically initialized by setting it to AO_STACK_INITIALIZER, or dynamically initialized to an empty stack with AO_stack_init. There are only three operations for accessing stacks: void AO_stack_init(AO_stack_t *list); void AO_stack_push_release(AO_stack_t *list, AO_t *new_element); AO_t * AO_stack_pop_acquire(volatile AO_stack_t *list); We require that the objects pushed as list elements remain addressable as long as any push or pop operation are in progress. (It is OK for an object to be "pop"ped off a stack and "deallocated" with a concurrent "pop" on the same stack still in progress, but only if "deallocation" leaves the object addressable. The second "pop" may still read the object, but the value it reads will not matter.) We require that the headers (AO_stack objects) remain allocated and valid as long as any operations on them are still in-flight. We also provide macros AO_REAL_HEAD_PTR that converts an AO_stack_t to a pointer to the link field in the next element, and AO_REAL_NEXT_PTR that converts a link field to a real, dereferencable, pointer to the link field in the next element. This is intended only for debugging, or to traverse the list after modification has ceased. There is otherwise no guarantee that walking a stack using this macro will produce any kind of consistent picture of the data structure. libatomic_ops-7.2/COPYING0000644000175000017500000004311011753234157012171 00000000000000 GNU GENERAL PUBLIC LICENSE Version 2, June 1991 Copyright (C) 1989, 1991 Free Software Foundation, Inc. 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. Preamble The licenses for most software are designed to take away your freedom to share and change it. By contrast, the GNU General Public License is intended to guarantee your freedom to share and change free software--to make sure the software is free for all its users. This General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it. (Some other Free Software Foundation software is covered by the GNU Library General Public License instead.) You can apply it to your programs, too. When we speak of free software, we are referring to freedom, not price. Our General Public Licenses are designed to make sure that you have the freedom to distribute copies of free software (and charge for this service if you wish), that you receive source code or can get it if you want it, that you can change the software or use pieces of it in new free programs; and that you know you can do these things. To protect your rights, we need to make restrictions that forbid anyone to deny you these rights or to ask you to surrender the rights. These restrictions translate to certain responsibilities for you if you distribute copies of the software, or if you modify it. For example, if you distribute copies of such a program, whether gratis or for a fee, you must give the recipients all the rights that you have. You must make sure that they, too, receive or can get the source code. And you must show them these terms so they know their rights. We protect your rights with two steps: (1) copyright the software, and (2) offer you this license which gives you legal permission to copy, distribute and/or modify the software. Also, for each author's protection and ours, we want to make certain that everyone understands that there is no warranty for this free software. If the software is modified by someone else and passed on, we want its recipients to know that what they have is not the original, so that any problems introduced by others will not reflect on the original authors' reputations. Finally, any free program is threatened constantly by software patents. We wish to avoid the danger that redistributors of a free program will individually obtain patent licenses, in effect making the program proprietary. To prevent this, we have made it clear that any patent must be licensed for everyone's free use or not licensed at all. The precise terms and conditions for copying, distribution and modification follow. GNU GENERAL PUBLIC LICENSE TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 0. This License applies to any program or other work which contains a notice placed by the copyright holder saying it may be distributed under the terms of this General Public License. The "Program", below, refers to any such program or work, and a "work based on the Program" means either the Program or any derivative work under copyright law: that is to say, a work containing the Program or a portion of it, either verbatim or with modifications and/or translated into another language. (Hereinafter, translation is included without limitation in the term "modification".) Each licensee is addressed as "you". Activities other than copying, distribution and modification are not covered by this License; they are outside its scope. The act of running the Program is not restricted, and the output from the Program is covered only if its contents constitute a work based on the Program (independent of having been made by running the Program). Whether that is true depends on what the Program does. 1. You may copy and distribute verbatim copies of the Program's source code as you receive it, in any medium, provided that you conspicuously and appropriately publish on each copy an appropriate copyright notice and disclaimer of warranty; keep intact all the notices that refer to this License and to the absence of any warranty; and give any other recipients of the Program a copy of this License along with the Program. You may charge a fee for the physical act of transferring a copy, and you may at your option offer warranty protection in exchange for a fee. 2. You may modify your copy or copies of the Program or any portion of it, thus forming a work based on the Program, and copy and distribute such modifications or work under the terms of Section 1 above, provided that you also meet all of these conditions: a) You must cause the modified files to carry prominent notices stating that you changed the files and the date of any change. b) You must cause any work that you distribute or publish, that in whole or in part contains or is derived from the Program or any part thereof, to be licensed as a whole at no charge to all third parties under the terms of this License. c) If the modified program normally reads commands interactively when run, you must cause it, when started running for such interactive use in the most ordinary way, to print or display an announcement including an appropriate copyright notice and a notice that there is no warranty (or else, saying that you provide a warranty) and that users may redistribute the program under these conditions, and telling the user how to view a copy of this License. (Exception: if the Program itself is interactive but does not normally print such an announcement, your work based on the Program is not required to print an announcement.) These requirements apply to the modified work as a whole. If identifiable sections of that work are not derived from the Program, and can be reasonably considered independent and separate works in themselves, then this License, and its terms, do not apply to those sections when you distribute them as separate works. But when you distribute the same sections as part of a whole which is a work based on the Program, the distribution of the whole must be on the terms of this License, whose permissions for other licensees extend to the entire whole, and thus to each and every part regardless of who wrote it. Thus, it is not the intent of this section to claim rights or contest your rights to work written entirely by you; rather, the intent is to exercise the right to control the distribution of derivative or collective works based on the Program. In addition, mere aggregation of another work not based on the Program with the Program (or with a work based on the Program) on a volume of a storage or distribution medium does not bring the other work under the scope of this License. 3. You may copy and distribute the Program (or a work based on it, under Section 2) in object code or executable form under the terms of Sections 1 and 2 above provided that you also do one of the following: a) Accompany it with the complete corresponding machine-readable source code, which must be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, b) Accompany it with a written offer, valid for at least three years, to give any third party, for a charge no more than your cost of physically performing source distribution, a complete machine-readable copy of the corresponding source code, to be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, c) Accompany it with the information you received as to the offer to distribute corresponding source code. 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These actions are prohibited by law if you do not accept this License. Therefore, by modifying or distributing the Program (or any work based on the Program), you indicate your acceptance of this License to do so, and all its terms and conditions for copying, distributing or modifying the Program or works based on it. 6. Each time you redistribute the Program (or any work based on the Program), the recipient automatically receives a license from the original licensor to copy, distribute or modify the Program subject to these terms and conditions. You may not impose any further restrictions on the recipients' exercise of the rights granted herein. You are not responsible for enforcing compliance by third parties to this License. 7. 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If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded. In such case, this License incorporates the limitation as if written in the body of this License. 9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. Each version is given a distinguishing version number. If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation. 10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally. NO WARRANTY 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. END OF TERMS AND CONDITIONS How to Apply These Terms to Your New Programs If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. Copyright (C) This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than `show w' and `show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program `Gnomovision' (which makes passes at compilers) written by James Hacker. , 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License. libatomic_ops-7.2/configure0000755000175000017500000055506311753234205013056 00000000000000#! /bin/sh # Guess values for system-dependent variables and create Makefiles. # Generated by GNU Autoconf 2.68 for libatomic_ops 7.2. # # # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software # Foundation, Inc. # # # This configure script is free software; the Free Software Foundation # gives unlimited permission to copy, distribute and modify it. ## -------------------- ## ## M4sh Initialization. ## ## -------------------- ## # Be more Bourne compatible DUALCASE=1; export DUALCASE # for MKS sh if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : emulate sh NULLCMD=: # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which # is contrary to our usage. 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The user should be able to distinguish # a failure to support a valid configuration from a meaningless # configuration. # The goal of this file is to map all the various variations of a given # machine specification into a single specification in the form: # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM # or in some cases, the newer four-part form: # CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM # It is wrong to echo any other type of specification. me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] CPU-MFR-OPSYS $0 [OPTION] ALIAS Canonicalize a configuration name. Operation modes: -h, --help print this help, then exit -t, --time-stamp print date of last modification, then exit -v, --version print version number, then exit Report bugs and patches to ." version="\ GNU config.sub ($timestamp) Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. 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There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." help=" Try \`$me --help' for more information." # Parse command line while test $# -gt 0 ; do case $1 in --time-stamp | --time* | -t ) echo "$timestamp" ; exit ;; --version | -v ) echo "$version" ; exit ;; --help | --h* | -h ) echo "$usage"; exit ;; -- ) # Stop option processing shift; break ;; - ) # Use stdin as input. break ;; -* ) echo "$me: invalid option $1$help" exit 1 ;; *local*) # First pass through any local machine types. echo $1 exit ;; * ) break ;; esac done case $# in 0) echo "$me: missing argument$help" >&2 exit 1;; 1) ;; *) echo "$me: too many arguments$help" >&2 exit 1;; esac # Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). # Here we must recognize all the valid KERNEL-OS combinations. maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` case $maybe_os in nto-qnx* | linux-gnu* | linux-dietlibc | linux-newlib* | linux-uclibc* | \ uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* | \ kopensolaris*-gnu* | \ storm-chaos* | os2-emx* | rtmk-nova*) os=-$maybe_os basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` ;; *) basic_machine=`echo $1 | sed 's/-[^-]*$//'` if [ $basic_machine != $1 ] then os=`echo $1 | sed 's/.*-/-/'` else os=; fi ;; esac ### Let's recognize common machines as not being operating systems so ### that things like config.sub decstation-3100 work. We also ### recognize some manufacturers as not being operating systems, so we ### can provide default operating systems below. case $os in -sun*os*) # Prevent following clause from handling this invalid input. ;; -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \ -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \ -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \ -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\ -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \ -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \ -apple | -axis | -knuth | -cray | -microblaze) os= basic_machine=$1 ;; -bluegene*) os=-cnk ;; -sim | -cisco | -oki | -wec | -winbond) os= basic_machine=$1 ;; -scout) ;; -wrs) os=-vxworks basic_machine=$1 ;; -chorusos*) os=-chorusos basic_machine=$1 ;; -chorusrdb) os=-chorusrdb basic_machine=$1 ;; -hiux*) os=-hiuxwe2 ;; -sco6) os=-sco5v6 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco5) os=-sco3.2v5 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco4) os=-sco3.2v4 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2.[4-9]*) os=`echo $os | sed -e 's/sco3.2./sco3.2v/'` basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2v[4-9]*) # Don't forget version if it is 3.2v4 or newer. basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco5v6*) # Don't forget version if it is 3.2v4 or newer. basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco*) os=-sco3.2v2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -udk*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -isc) os=-isc2.2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -clix*) basic_machine=clipper-intergraph ;; -isc*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -lynx*) os=-lynxos ;; -ptx*) basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'` ;; -windowsnt*) os=`echo $os | sed -e 's/windowsnt/winnt/'` ;; -psos*) os=-psos ;; -mint | -mint[0-9]*) basic_machine=m68k-atari os=-mint ;; esac # Decode aliases for certain CPU-COMPANY combinations. case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. 1750a | 580 \ | a29k \ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ | am33_2.0 \ | arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr | avr32 \ | bfin \ | c4x | clipper \ | d10v | d30v | dlx | dsp16xx \ | fido | fr30 | frv \ | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ | i370 | i860 | i960 | ia64 \ | ip2k | iq2000 \ | lm32 \ | m32c | m32r | m32rle | m68000 | m68k | m88k \ | maxq | mb | microblaze | mcore | mep | metag \ | mips | mipsbe | mipseb | mipsel | mipsle \ | mips16 \ | mips64 | mips64el \ | mips64octeon | mips64octeonel \ | mips64orion | mips64orionel \ | mips64r5900 | mips64r5900el \ | mips64vr | mips64vrel \ | mips64vr4100 | mips64vr4100el \ | mips64vr4300 | mips64vr4300el \ | mips64vr5000 | mips64vr5000el \ | mips64vr5900 | mips64vr5900el \ | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ | mipsisa64 | mipsisa64el \ | mipsisa64r2 | mipsisa64r2el \ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ | mipstx39 | mipstx39el \ | mn10200 | mn10300 \ | moxie \ | mt \ | msp430 \ | nios | nios2 \ | ns16k | ns32k \ | or32 \ | pdp10 | pdp11 | pj | pjl \ | powerpc | powerpc64 | powerpc64le | powerpcle | ppcbe \ | pyramid \ | rx \ | score \ | sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[34]eb | sheb | shbe | shle | sh[1234]le | sh3ele \ | sh64 | sh64le \ | sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet | sparclite \ | sparcv8 | sparcv9 | sparcv9b | sparcv9v \ | spu | strongarm \ | tahoe | thumb | tic4x | tic80 | tron \ | ubicom32 \ | v850 | v850e \ | we32k \ | x86 | xc16x | xscale | xscalee[bl] | xstormy16 | xtensa \ | z8k | z80) basic_machine=$basic_machine-unknown ;; m6811 | m68hc11 | m6812 | m68hc12 | picochip) # Motorola 68HC11/12. basic_machine=$basic_machine-unknown os=-none ;; m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) ;; ms1) basic_machine=mt-unknown ;; # We use `pc' rather than `unknown' # because (1) that's what they normally are, and # (2) the word "unknown" tends to confuse beginning users. i*86 | x86_64) basic_machine=$basic_machine-pc ;; # Object if more than one company name word. *-*-*) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; # Recognize the basic CPU types with company name. 580-* \ | a29k-* \ | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ | avr-* | avr32-* \ | bfin-* | bs2000-* \ | c[123]* | c30-* | [cjt]90-* | c4x-* | c54x-* | c55x-* | c6x-* \ | clipper-* | craynv-* | cydra-* \ | d10v-* | d30v-* | dlx-* \ | elxsi-* \ | f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \ | h8300-* | h8500-* \ | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ | i*86-* | i860-* | i960-* | ia64-* \ | ip2k-* | iq2000-* \ | lm32-* \ | m32c-* | m32r-* | m32rle-* \ | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ | m88110-* | m88k-* | maxq-* | mcore-* | metag-* | microblaze-* \ | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \ | mips16-* \ | mips64-* | mips64el-* \ | mips64octeon-* | mips64octeonel-* \ | mips64orion-* | mips64orionel-* \ | mips64r5900-* | mips64r5900el-* \ | mips64vr-* | mips64vrel-* \ | mips64vr4100-* | mips64vr4100el-* \ | mips64vr4300-* | mips64vr4300el-* \ | mips64vr5000-* | mips64vr5000el-* \ | mips64vr5900-* | mips64vr5900el-* \ | mipsisa32-* | mipsisa32el-* \ | mipsisa32r2-* | mipsisa32r2el-* \ | mipsisa64-* | mipsisa64el-* \ | mipsisa64r2-* | mipsisa64r2el-* \ | mipsisa64sb1-* | mipsisa64sb1el-* \ | mipsisa64sr71k-* | mipsisa64sr71kel-* \ | mipstx39-* | mipstx39el-* \ | mmix-* \ | mt-* \ | msp430-* \ | nios-* | nios2-* \ | none-* | np1-* | ns16k-* | ns32k-* \ | orion-* \ | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* | ppcbe-* \ | pyramid-* \ | romp-* | rs6000-* | rx-* \ | sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* | sheb-* | shbe-* \ | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \ | sparc-* | sparc64-* | sparc64b-* | sparc64v-* | sparc86x-* | sparclet-* \ | sparclite-* \ | sparcv8-* | sparcv9-* | sparcv9b-* | sparcv9v-* | strongarm-* | sv1-* | sx?-* \ | tahoe-* | thumb-* \ | tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* | tile-* \ | tron-* \ | ubicom32-* \ | v850-* | v850e-* | vax-* \ | we32k-* \ | x86-* | x86_64-* | xc16x-* | xps100-* | xscale-* | xscalee[bl]-* \ | xstormy16-* | xtensa*-* \ | ymp-* \ | z8k-* | z80-*) ;; # Recognize the basic CPU types without company name, with glob match. xtensa*) basic_machine=$basic_machine-unknown ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. 386bsd) basic_machine=i386-unknown os=-bsd ;; 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) basic_machine=m68000-att ;; 3b*) basic_machine=we32k-att ;; a29khif) basic_machine=a29k-amd os=-udi ;; abacus) basic_machine=abacus-unknown ;; adobe68k) basic_machine=m68010-adobe os=-scout ;; alliant | fx80) basic_machine=fx80-alliant ;; altos | altos3068) basic_machine=m68k-altos ;; am29k) basic_machine=a29k-none os=-bsd ;; amd64) basic_machine=x86_64-pc ;; amd64-*) basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; amdahl) basic_machine=580-amdahl os=-sysv ;; amiga | amiga-*) basic_machine=m68k-unknown ;; amigaos | amigados) basic_machine=m68k-unknown os=-amigaos ;; amigaunix | amix) basic_machine=m68k-unknown os=-sysv4 ;; apollo68) basic_machine=m68k-apollo os=-sysv ;; apollo68bsd) basic_machine=m68k-apollo os=-bsd ;; aros) basic_machine=i386-pc os=-aros ;; aux) basic_machine=m68k-apple os=-aux ;; balance) basic_machine=ns32k-sequent os=-dynix ;; blackfin) basic_machine=bfin-unknown os=-linux ;; blackfin-*) basic_machine=bfin-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; bluegene*) basic_machine=powerpc-ibm os=-cnk ;; c90) basic_machine=c90-cray os=-unicos ;; cegcc) basic_machine=arm-unknown os=-cegcc ;; convex-c1) basic_machine=c1-convex os=-bsd ;; convex-c2) basic_machine=c2-convex os=-bsd ;; convex-c32) basic_machine=c32-convex os=-bsd ;; convex-c34) basic_machine=c34-convex os=-bsd ;; convex-c38) basic_machine=c38-convex os=-bsd ;; cray | j90) basic_machine=j90-cray os=-unicos ;; craynv) basic_machine=craynv-cray os=-unicosmp ;; cr16) basic_machine=cr16-unknown os=-elf ;; crds | unos) basic_machine=m68k-crds ;; crisv32 | crisv32-* | etraxfs*) basic_machine=crisv32-axis ;; cris | cris-* | etrax*) basic_machine=cris-axis ;; crx) basic_machine=crx-unknown os=-elf ;; da30 | da30-*) basic_machine=m68k-da30 ;; decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) basic_machine=mips-dec ;; decsystem10* | dec10*) basic_machine=pdp10-dec os=-tops10 ;; decsystem20* | dec20*) basic_machine=pdp10-dec os=-tops20 ;; delta | 3300 | motorola-3300 | motorola-delta \ | 3300-motorola | delta-motorola) basic_machine=m68k-motorola ;; delta88) basic_machine=m88k-motorola os=-sysv3 ;; dicos) basic_machine=i686-pc os=-dicos ;; djgpp) basic_machine=i586-pc os=-msdosdjgpp ;; dpx20 | dpx20-*) basic_machine=rs6000-bull os=-bosx ;; dpx2* | dpx2*-bull) basic_machine=m68k-bull os=-sysv3 ;; ebmon29k) basic_machine=a29k-amd os=-ebmon ;; elxsi) basic_machine=elxsi-elxsi os=-bsd ;; encore | umax | mmax) basic_machine=ns32k-encore ;; es1800 | OSE68k | ose68k | ose | OSE) basic_machine=m68k-ericsson os=-ose ;; fx2800) basic_machine=i860-alliant ;; genix) basic_machine=ns32k-ns ;; gmicro) basic_machine=tron-gmicro os=-sysv ;; go32) basic_machine=i386-pc os=-go32 ;; h3050r* | hiux*) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; h8300hms) basic_machine=h8300-hitachi os=-hms ;; h8300xray) basic_machine=h8300-hitachi os=-xray ;; h8500hms) basic_machine=h8500-hitachi os=-hms ;; harris) basic_machine=m88k-harris os=-sysv3 ;; hp300-*) basic_machine=m68k-hp ;; hp300bsd) basic_machine=m68k-hp os=-bsd ;; hp300hpux) basic_machine=m68k-hp os=-hpux ;; hp3k9[0-9][0-9] | hp9[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k2[0-9][0-9] | hp9k31[0-9]) basic_machine=m68000-hp ;; hp9k3[2-9][0-9]) basic_machine=m68k-hp ;; hp9k6[0-9][0-9] | hp6[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k7[0-79][0-9] | hp7[0-79][0-9]) basic_machine=hppa1.1-hp ;; hp9k78[0-9] | hp78[0-9]) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[0-9][13679] | hp8[0-9][13679]) basic_machine=hppa1.1-hp ;; hp9k8[0-9][0-9] | hp8[0-9][0-9]) basic_machine=hppa1.0-hp ;; hppa-next) os=-nextstep3 ;; hppaosf) basic_machine=hppa1.1-hp os=-osf ;; hppro) basic_machine=hppa1.1-hp os=-proelf ;; i370-ibm* | ibm*) basic_machine=i370-ibm ;; # I'm not sure what "Sysv32" means. Should this be sysv3.2? i*86v32) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv32 ;; i*86v4*) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv4 ;; i*86v) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv ;; i*86sol2) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-solaris2 ;; i386mach) basic_machine=i386-mach os=-mach ;; i386-vsta | vsta) basic_machine=i386-unknown os=-vsta ;; iris | iris4d) basic_machine=mips-sgi case $os in -irix*) ;; *) os=-irix4 ;; esac ;; isi68 | isi) basic_machine=m68k-isi os=-sysv ;; m68knommu) basic_machine=m68k-unknown os=-linux ;; m68knommu-*) basic_machine=m68k-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; m88k-omron*) basic_machine=m88k-omron ;; magnum | m3230) basic_machine=mips-mips os=-sysv ;; merlin) basic_machine=ns32k-utek os=-sysv ;; microblaze) basic_machine=microblaze-xilinx ;; mingw32) basic_machine=i386-pc os=-mingw32 ;; mingw32ce) basic_machine=arm-unknown os=-mingw32ce ;; miniframe) basic_machine=m68000-convergent ;; *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) basic_machine=m68k-atari os=-mint ;; mips3*-*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` ;; mips3*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown ;; monitor) basic_machine=m68k-rom68k os=-coff ;; morphos) basic_machine=powerpc-unknown os=-morphos ;; msdos) basic_machine=i386-pc os=-msdos ;; ms1-*) basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'` ;; mvs) basic_machine=i370-ibm os=-mvs ;; ncr3000) basic_machine=i486-ncr os=-sysv4 ;; netbsd386) basic_machine=i386-unknown os=-netbsd ;; netwinder) basic_machine=armv4l-rebel os=-linux ;; news | news700 | news800 | news900) basic_machine=m68k-sony os=-newsos ;; news1000) basic_machine=m68030-sony os=-newsos ;; news-3600 | risc-news) basic_machine=mips-sony os=-newsos ;; necv70) basic_machine=v70-nec os=-sysv ;; next | m*-next ) basic_machine=m68k-next case $os in -nextstep* ) ;; -ns2*) os=-nextstep2 ;; *) os=-nextstep3 ;; esac ;; nh3000) basic_machine=m68k-harris os=-cxux ;; nh[45]000) basic_machine=m88k-harris os=-cxux ;; nindy960) basic_machine=i960-intel os=-nindy ;; mon960) basic_machine=i960-intel os=-mon960 ;; nonstopux) basic_machine=mips-compaq os=-nonstopux ;; np1) basic_machine=np1-gould ;; nsr-tandem) basic_machine=nsr-tandem ;; op50n-* | op60c-*) basic_machine=hppa1.1-oki os=-proelf ;; openrisc | openrisc-*) basic_machine=or32-unknown ;; os400) basic_machine=powerpc-ibm os=-os400 ;; OSE68000 | ose68000) basic_machine=m68000-ericsson os=-ose ;; os68k) basic_machine=m68k-none os=-os68k ;; pa-hitachi) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; paragon) basic_machine=i860-intel os=-osf ;; parisc) basic_machine=hppa-unknown os=-linux ;; parisc-*) basic_machine=hppa-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; pbd) basic_machine=sparc-tti ;; pbb) basic_machine=m68k-tti ;; pc532 | pc532-*) basic_machine=ns32k-pc532 ;; pc98) basic_machine=i386-pc ;; pc98-*) basic_machine=i386-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentium | p5 | k5 | k6 | nexgen | viac3) basic_machine=i586-pc ;; pentiumpro | p6 | 6x86 | athlon | athlon_*) basic_machine=i686-pc ;; pentiumii | pentium2 | pentiumiii | pentium3) basic_machine=i686-pc ;; pentium4) basic_machine=i786-pc ;; pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*) basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumpro-* | p6-* | 6x86-* | athlon-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentium4-*) basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pn) basic_machine=pn-gould ;; power) basic_machine=power-ibm ;; ppc) basic_machine=powerpc-unknown ;; ppc-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppcle | powerpclittle | ppc-le | powerpc-little) basic_machine=powerpcle-unknown ;; ppcle-* | powerpclittle-*) basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppc64) basic_machine=powerpc64-unknown ;; ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; 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See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Alexandre Oliva . case $1 in '') echo "$0: No command. Try \`$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: depcomp [--help] [--version] PROGRAM [ARGS] Run PROGRAMS ARGS to compile a file, generating dependencies as side-effects. Environment variables: depmode Dependency tracking mode. source Source file read by `PROGRAMS ARGS'. object Object file output by `PROGRAMS ARGS'. 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Grab either from any GNU archive site." # The file to touch is that specified with -o ... file=`echo "$*" | sed -n "$sed_output"` test -z "$file" && file=`echo "$*" | sed -n "$sed_minuso"` if test -z "$file"; then # ... or it is the one specified with @setfilename ... infile=`echo "$*" | sed 's/.* \([^ ]*\) *$/\1/'` file=`sed -n ' /^@setfilename/{ s/.* \([^ ]*\) *$/\1/ p q }' $infile` # ... or it is derived from the source name (dir/f.texi becomes f.info) test -z "$file" && file=`echo "$infile" | sed 's,.*/,,;s,.[^.]*$,,'`.info fi # If the file does not exist, the user really needs makeinfo; # let's fail without touching anything. test -f $file || exit 1 touch $file ;; tar*) shift # We have already tried tar in the generic part. # Look for gnutar/gtar before invocation to avoid ugly error # messages. if (gnutar --version > /dev/null 2>&1); then gnutar "$@" && exit 0 fi if (gtar --version > /dev/null 2>&1); then gtar "$@" && exit 0 fi firstarg="$1" if shift; then case $firstarg in *o*) firstarg=`echo "$firstarg" | sed s/o//` tar "$firstarg" "$@" && exit 0 ;; esac case $firstarg in *h*) firstarg=`echo "$firstarg" | sed s/h//` tar "$firstarg" "$@" && exit 0 ;; esac fi echo 1>&2 "\ WARNING: I can't seem to be able to run \`tar' with the given arguments. You may want to install GNU tar or Free paxutils, or check the command line arguments." exit 1 ;; *) echo 1>&2 "\ WARNING: \`$1' is needed, and is $msg. You might have modified some files without having the proper tools for further handling them. Check the \`README' file, it often tells you about the needed prerequisites for installing this package. You may also peek at any GNU archive site, in case some other package would contain this missing \`$1' program." exit 1 ;; esac exit 0 # Local variables: # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: libatomic_ops-7.2/README0000644000175000017500000000403711753234157012023 00000000000000Synopsis ======== This package provides semi-portable access to hardware provided atomic memory operations. These might allow you to write code: - That does more interesting things in signal handlers. - Makes more effective use of multiprocessors by allowing you to write clever lock-free code. Note that such code is very difficult to get right, and will unavoidably be less portable than lock-based code. It is also not always faster than lock-based code. But it may occasionally be a large performance win. - To experiment with new and much better thread programming paradigms, etc. For details and licensing restrictions see the files in the doc subdirectory. This is version 7.2 of libatomic_ops. You might find a more recent version of this at http://www.hpl.hp.com/personal/Hans_Boehm/gc or http://www.hpl.hp.com/research/linux/atomic_ops/ Installation and Usage ====================== The configuration and build scripts for this package were generated by Automake/Autoconf. "./configure --prefix=; make; make install" in this directory should work. For a more customized build, see "INSTALL" and the output of "./configure --help". Note that much of the content of this library is in the header files. However, two small libraries are built and installed: - libatomic_ops.a is a support library, which is not needed on some platforms. This is intended to be usable, under some mild restrictions, in free or proprietary code, as are all the header files. See doc/LICENSING.txt. - libatomic_ops_gpl.a contains some higher level facilities. This code is currently covered by the GPL. The contents currently correspond to the headers atomic_ops_stack.h and atomic_ops_malloc.h. Platform Specific Notes ======================= Win32/64: src/Makefile.msft contains a very simple Makefile for building and running tests and building the gpl library. The core atomic_ops implementation is entirely in header files. HP-UX/PA-RISC: aCC -Ae won't work as a C compiler, since it doesn't support inline assembly code. Use cc. libatomic_ops-7.2/INSTALL0000644000175000017500000003633211753234157012177 00000000000000Installation Instructions ************************* Copyright (C) 1994, 1995, 1996, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. Copying and distribution of this file, with or without modification, are permitted in any medium without royalty provided the copyright notice and this notice are preserved. This file is offered as-is, without warranty of any kind. Basic Installation ================== Briefly, the shell commands `./configure; make; make install' should configure, build, and install this package. The following more-detailed instructions are generic; see the `README' file for instructions specific to this package. Some packages provide this `INSTALL' file but do not implement all of the features documented below. The lack of an optional feature in a given package is not necessarily a bug. More recommendations for GNU packages can be found in *note Makefile Conventions: (standards)Makefile Conventions. The `configure' shell script attempts to guess correct values for various system-dependent variables used during compilation. It uses those values to create a `Makefile' in each directory of the package. It may also create one or more `.h' files containing system-dependent definitions. Finally, it creates a shell script `config.status' that you can run in the future to recreate the current configuration, and a file `config.log' containing compiler output (useful mainly for debugging `configure'). It can also use an optional file (typically called `config.cache' and enabled with `--cache-file=config.cache' or simply `-C') that saves the results of its tests to speed up reconfiguring. Caching is disabled by default to prevent problems with accidental use of stale cache files. If you need to do unusual things to compile the package, please try to figure out how `configure' could check whether to do them, and mail diffs or instructions to the address given in the `README' so they can be considered for the next release. If you are using the cache, and at some point `config.cache' contains results you don't want to keep, you may remove or edit it. The file `configure.ac' (or `configure.in') is used to create `configure' by a program called `autoconf'. You need `configure.ac' if you want to change it or regenerate `configure' using a newer version of `autoconf'. The simplest way to compile this package is: 1. `cd' to the directory containing the package's source code and type `./configure' to configure the package for your system. Running `configure' might take a while. While running, it prints some messages telling which features it is checking for. 2. Type `make' to compile the package. 3. Optionally, type `make check' to run any self-tests that come with the package, generally using the just-built uninstalled binaries. 4. Type `make install' to install the programs and any data files and documentation. When installing into a prefix owned by root, it is recommended that the package be configured and built as a regular user, and only the `make install' phase executed with root privileges. 5. Optionally, type `make installcheck' to repeat any self-tests, but this time using the binaries in their final installed location. This target does not install anything. Running this target as a regular user, particularly if the prior `make install' required root privileges, verifies that the installation completed correctly. 6. You can remove the program binaries and object files from the source code directory by typing `make clean'. To also remove the files that `configure' created (so you can compile the package for a different kind of computer), type `make distclean'. There is also a `make maintainer-clean' target, but that is intended mainly for the package's developers. If you use it, you may have to get all sorts of other programs in order to regenerate files that came with the distribution. 7. Often, you can also type `make uninstall' to remove the installed files again. In practice, not all packages have tested that uninstallation works correctly, even though it is required by the GNU Coding Standards. 8. Some packages, particularly those that use Automake, provide `make distcheck', which can by used by developers to test that all other targets like `make install' and `make uninstall' work correctly. This target is generally not run by end users. Compilers and Options ===================== Some systems require unusual options for compilation or linking that the `configure' script does not know about. Run `./configure --help' for details on some of the pertinent environment variables. You can give `configure' initial values for configuration parameters by setting variables in the command line or in the environment. Here is an example: ./configure CC=c99 CFLAGS=-g LIBS=-lposix *Note Defining Variables::, for more details. Compiling For Multiple Architectures ==================================== You can compile the package for more than one kind of computer at the same time, by placing the object files for each architecture in their own directory. To do this, you can use GNU `make'. `cd' to the directory where you want the object files and executables to go and run the `configure' script. `configure' automatically checks for the source code in the directory that `configure' is in and in `..'. This is known as a "VPATH" build. With a non-GNU `make', it is safer to compile the package for one architecture at a time in the source code directory. After you have installed the package for one architecture, use `make distclean' before reconfiguring for another architecture. On MacOS X 10.5 and later systems, you can create libraries and executables that work on multiple system types--known as "fat" or "universal" binaries--by specifying multiple `-arch' options to the compiler but only a single `-arch' option to the preprocessor. Like this: ./configure CC="gcc -arch i386 -arch x86_64 -arch ppc -arch ppc64" \ CXX="g++ -arch i386 -arch x86_64 -arch ppc -arch ppc64" \ CPP="gcc -E" CXXCPP="g++ -E" This is not guaranteed to produce working output in all cases, you may have to build one architecture at a time and combine the results using the `lipo' tool if you have problems. Installation Names ================== By default, `make install' installs the package's commands under `/usr/local/bin', include files under `/usr/local/include', etc. You can specify an installation prefix other than `/usr/local' by giving `configure' the option `--prefix=PREFIX', where PREFIX must be an absolute file name. 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However, some platforms have known limitations with the semantics of shared libraries that end up requiring recompilation when using this method, particularly noticeable in packages that use GNU Libtool. The second method involves providing the `DESTDIR' variable. For example, `make install DESTDIR=/alternate/directory' will prepend `/alternate/directory' before all installation names. The approach of `DESTDIR' overrides is not required by the GNU Coding Standards, and does not work on platforms that have drive letters. On the other hand, it does better at avoiding recompilation issues, and works well even when some directory options were not specified in terms of `${prefix}' at `configure' time. Optional Features ================= If the package supports it, you can cause programs to be installed with an extra prefix or suffix on their names by giving `configure' the option `--program-prefix=PREFIX' or `--program-suffix=SUFFIX'. Some packages pay attention to `--enable-FEATURE' options to `configure', where FEATURE indicates an optional part of the package. They may also pay attention to `--with-PACKAGE' options, where PACKAGE is something like `gnu-as' or `x' (for the X Window System). The `README' should mention any `--enable-' and `--with-' options that the package recognizes. For packages that use the X Window System, `configure' can usually find the X include and library files automatically, but if it doesn't, you can use the `configure' options `--x-includes=DIR' and `--x-libraries=DIR' to specify their locations. Some packages offer the ability to configure how verbose the execution of `make' will be. For these packages, running `./configure --enable-silent-rules' sets the default to minimal output, which can be overridden with `make V=1'; while running `./configure --disable-silent-rules' sets the default to verbose, which can be overridden with `make V=0'. Particular systems ================== On HP-UX, the default C compiler is not ANSI C compatible. If GNU CC is not installed, it is recommended to use the following options in order to use an ANSI C compiler: ./configure CC="cc -Ae -D_XOPEN_SOURCE=500" and if that doesn't work, install pre-built binaries of GCC for HP-UX. On OSF/1 a.k.a. Tru64, some versions of the default C compiler cannot parse its `' header file. The option `-nodtk' can be used as a workaround. If GNU CC is not installed, it is therefore recommended to try ./configure CC="cc" and if that doesn't work, try ./configure CC="cc -nodtk" On Solaris, don't put `/usr/ucb' early in your `PATH'. This directory contains several dysfunctional programs; working variants of these programs are available in `/usr/bin'. So, if you need `/usr/ucb' in your `PATH', put it _after_ `/usr/bin'. On Haiku, software installed for all users goes in `/boot/common', not `/usr/local'. It is recommended to use the following options: ./configure --prefix=/boot/common Specifying the System Type ========================== There may be some features `configure' cannot figure out automatically, but needs to determine by the type of machine the package will run on. Usually, assuming the package is built to be run on the _same_ architectures, `configure' can figure that out, but if it prints a message saying it cannot guess the machine type, give it the `--build=TYPE' option. TYPE can either be a short name for the system type, such as `sun4', or a canonical name which has the form: CPU-COMPANY-SYSTEM where SYSTEM can have one of these forms: OS KERNEL-OS See the file `config.sub' for the possible values of each field. If `config.sub' isn't included in this package, then this package doesn't need to know the machine type. If you are _building_ compiler tools for cross-compiling, you should use the option `--target=TYPE' to select the type of system they will produce code for. If you want to _use_ a cross compiler, that generates code for a platform different from the build platform, you should specify the "host" platform (i.e., that on which the generated programs will eventually be run) with `--host=TYPE'. Sharing Defaults ================ If you want to set default values for `configure' scripts to share, you can create a site shell script called `config.site' that gives default values for variables like `CC', `cache_file', and `prefix'. `configure' looks for `PREFIX/share/config.site' if it exists, then `PREFIX/etc/config.site' if it exists. Or, you can set the `CONFIG_SITE' environment variable to the location of the site script. A warning: not all `configure' scripts look for a site script. Defining Variables ================== Variables not defined in a site shell script can be set in the environment passed to `configure'. However, some packages may run configure again during the build, and the customized values of these variables may be lost. In order to avoid this problem, you should set them in the `configure' command line, using `VAR=value'. For example: ./configure CC=/usr/local2/bin/gcc causes the specified `gcc' to be used as the C compiler (unless it is overridden in the site shell script). Unfortunately, this technique does not work for `CONFIG_SHELL' due to an Autoconf bug. Until the bug is fixed you can use this workaround: CONFIG_SHELL=/bin/bash /bin/bash ./configure CONFIG_SHELL=/bin/bash `configure' Invocation ====================== `configure' recognizes the following options to control how it operates. `--help' `-h' Print a summary of all of the options to `configure', and exit. `--help=short' `--help=recursive' Print a summary of the options unique to this package's `configure', and exit. The `short' variant lists options used only in the top level, while the `recursive' variant lists options also present in any nested packages. `--version' `-V' Print the version of Autoconf used to generate the `configure' script, and exit. `--cache-file=FILE' Enable the cache: use and save the results of the tests in FILE, traditionally `config.cache'. FILE defaults to `/dev/null' to disable caching. `--config-cache' `-C' Alias for `--cache-file=config.cache'. `--quiet' `--silent' `-q' Do not print messages saying which checks are being made. To suppress all normal output, redirect it to `/dev/null' (any error messages will still be shown). `--srcdir=DIR' Look for the package's source code in directory DIR. Usually `configure' can determine that directory automatically. `--prefix=DIR' Use DIR as the installation prefix. *note Installation Names:: for more details, including other options available for fine-tuning the installation locations. `--no-create' `-n' Run the configure checks, but stop before creating any output files. `configure' also accepts some other, not widely useful, options. Run `configure --help' for more details. libatomic_ops-7.2/src/0000755000175000017500000000000011753234214012000 500000000000000libatomic_ops-7.2/src/atomic_ops_malloc.h0000644000175000017500000000320511753234157015563 00000000000000/* * Copyright (c) 2005 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* Almost lock-free malloc implementation based on stack implementation. */ /* See README.malloc file for detailed usage rules. */ #ifndef AO_ATOMIC_H #define AO_ATOMIC_H #include /* For size_t */ #include "atomic_ops_stack.h" #ifdef AO_STACK_IS_LOCK_FREE # define AO_MALLOC_IS_LOCK_FREE #endif void AO_free(void *); void * AO_malloc(size_t); /* Allow use of mmap to grow the heap. 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IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef ATOMIC_OPS_H #define ATOMIC_OPS_H #include #include /* We define various atomic operations on memory in a */ /* machine-specific way. Unfortunately, this is complicated */ /* by the fact that these may or may not be combined with */ /* various memory barriers. Thus the actual operations we */ /* define have the form AO__, for all */ /* plausible combinations of and . */ /* This of course results in a mild combinatorial explosion. */ /* To deal with it, we try to generate derived */ /* definitions for as many of the combinations as we can, as */ /* automatically as possible. */ /* */ /* Our assumption throughout is that the programmer will */ /* specify the least demanding operation and memory barrier */ /* that will guarantee correctness for the implementation. */ /* Our job is to find the least expensive way to implement it */ /* on the applicable hardware. In many cases that will */ /* involve, for example, a stronger memory barrier, or a */ /* combination of hardware primitives. */ /* */ /* Conventions: */ /* "plain" atomic operations are not guaranteed to include */ /* a barrier. The suffix in the name specifies the barrier */ /* type. Suffixes are: */ /* _release: Earlier operations may not be delayed past it. */ /* _acquire: Later operations may not move ahead of it. */ /* _read: Subsequent reads must follow this operation and */ /* preceding reads. */ /* _write: Earlier writes precede both this operation and */ /* later writes. */ /* _full: Ordered with respect to both earlier and later memops.*/ /* _release_write: Ordered with respect to earlier writes. */ /* _acquire_read: Ordered with respect to later reads. */ /* */ /* Currently we try to define the following atomic memory */ /* operations, in combination with the above barriers: */ /* AO_nop */ /* AO_load */ /* AO_store */ /* AO_test_and_set (binary) */ /* AO_fetch_and_add */ /* AO_fetch_and_add1 */ /* AO_fetch_and_sub1 */ /* AO_or */ /* AO_compare_and_swap */ /* */ /* Note that atomicity guarantees are valid only if both */ /* readers and writers use AO_ operations to access the */ /* shared value, while ordering constraints are intended to */ /* apply all memory operations. If a location can potentially */ /* be accessed simultaneously from multiple threads, and one of */ /* those accesses may be a write access, then all such */ /* accesses to that location should be through AO_ primitives. */ /* However if AO_ operations enforce sufficient ordering to */ /* ensure that a location x cannot be accessed concurrently, */ /* or can only be read concurrently, then x can be accessed */ /* via ordinary references and assignments. */ /* */ /* Compare_and_exchange takes an address and an expected old */ /* value and a new value, and returns an int. Nonzero */ /* indicates that it succeeded. */ /* Test_and_set takes an address, atomically replaces it by */ /* AO_TS_SET, and returns the prior value. */ /* An AO_TS_t location can be reset with the */ /* AO_CLEAR macro, which normally uses AO_store_release. */ /* AO_fetch_and_add takes an address and an AO_t increment */ /* value. The AO_fetch_and_add1 and AO_fetch_and_sub1 variants */ /* are provided, since they allow faster implementations on */ /* some hardware. AO_or atomically ors an AO_t value into a */ /* memory location, but does not provide access to the original.*/ /* */ /* We expect this list to grow slowly over time. */ /* */ /* Note that AO_nop_full is a full memory barrier. */ /* */ /* Note that if some data is initialized with */ /* data.x = ...; data.y = ...; ... */ /* AO_store_release_write(&data_is_initialized, 1) */ /* then data is guaranteed to be initialized after the test */ /* if (AO_load_release_read(&data_is_initialized)) ... */ /* succeeds. Furthermore, this should generate near-optimal */ /* code on all common platforms. */ /* */ /* All operations operate on unsigned AO_t, which */ /* is the natural word size, and usually unsigned long. */ /* It is possible to check whether a particular operation op */ /* is available on a particular platform by checking whether */ /* AO_HAVE_op is defined. We make heavy use of these macros */ /* internally. */ /* The rest of this file basically has three sections: */ /* */ /* Some utility and default definitions. */ /* */ /* The architecture dependent section: */ /* This defines atomic operations that have direct hardware */ /* support on a particular platform, mostly by including the */ /* appropriate compiler- and hardware-dependent file. */ /* */ /* The synthesis section: */ /* This tries to define other atomic operations in terms of */ /* those that are explicitly available on the platform. */ /* This section is hardware independent. */ /* We make no attempt to synthesize operations in ways that */ /* effectively introduce locks, except for the debugging/demo */ /* pthread-based implementation at the beginning. A more */ /* realistic implementation that falls back to locks could be */ /* added as a higher layer. But that would sacrifice */ /* usability from signal handlers. */ /* The synthesis section is implemented almost entirely in */ /* atomic_ops_generalize.h. */ /* Some common defaults. Overridden for some architectures. */ #define AO_t size_t /* The test_and_set primitive returns an AO_TS_VAL_t value. */ /* AO_TS_t is the type of an in-memory test-and-set location. */ #define AO_TS_INITIALIZER (AO_t)AO_TS_CLEAR /* Platform-dependent stuff: */ #if defined(__GNUC__) || defined(_MSC_VER) || defined(__INTEL_COMPILER) \ || defined(__DMC__) || defined(__WATCOMC__) # define AO_INLINE static __inline #elif defined(__sun) # define AO_INLINE static inline #else # define AO_INLINE static #endif #if defined(__GNUC__) && !defined(__INTEL_COMPILER) # define AO_compiler_barrier() __asm__ __volatile__("" : : : "memory") #elif defined(_MSC_VER) || defined(__DMC__) || defined(__BORLANDC__) \ || defined(__WATCOMC__) # if defined(_AMD64_) || defined(_M_X64) || _MSC_VER >= 1400 # if defined(_WIN32_WCE) /* # include */ # elif defined(_MSC_VER) # include # endif # pragma intrinsic(_ReadWriteBarrier) # define AO_compiler_barrier() _ReadWriteBarrier() /* We assume this does not generate a fence instruction. */ /* The documentation is a bit unclear. */ # else # define AO_compiler_barrier() __asm { } /* The preceding implementation may be preferable here too. */ /* But the documentation warns about VC++ 2003 and earlier. */ # endif #elif defined(__INTEL_COMPILER) # define AO_compiler_barrier() __memory_barrier() /* Too strong? IA64-only? */ #elif defined(_HPUX_SOURCE) # if defined(__ia64) # include # define AO_compiler_barrier() _Asm_sched_fence() # else /* FIXME - We dont know how to do this. This is a guess. */ /* And probably a bad one. */ static volatile int AO_barrier_dummy; # define AO_compiler_barrier() AO_barrier_dummy = AO_barrier_dummy # endif #else /* We conjecture that the following usually gives us the right */ /* semantics or an error. */ # define AO_compiler_barrier() asm("") #endif #if defined(AO_USE_PTHREAD_DEFS) # include "atomic_ops/sysdeps/generic_pthread.h" #endif /* AO_USE_PTHREAD_DEFS */ #if (defined(__CC_ARM) || defined(__ARMCC__)) && !defined(__GNUC__) \ && !defined(AO_USE_PTHREAD_DEFS) # include "atomic_ops/sysdeps/armcc/arm_v6.h" # define AO_GENERALIZE_TWICE #endif #if defined(__GNUC__) && !defined(AO_USE_PTHREAD_DEFS) \ && !defined(__INTEL_COMPILER) # if defined(__i386__) /* We don't define AO_USE_SYNC_CAS_BUILTIN for x86 here because */ /* it might require specifying additional options (like -march) */ /* or additional link libraries (if -march is not specified). */ # include "atomic_ops/sysdeps/gcc/x86.h" # endif /* __i386__ */ # if defined(__x86_64__) # if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 2) /* It is safe to use __sync CAS built-in on this architecture. */ # define AO_USE_SYNC_CAS_BUILTIN # endif # include "atomic_ops/sysdeps/gcc/x86_64.h" # endif /* __x86_64__ */ # if defined(__ia64__) # include "atomic_ops/sysdeps/gcc/ia64.h" # define AO_GENERALIZE_TWICE # endif /* __ia64__ */ # if defined(__hppa__) # include "atomic_ops/sysdeps/gcc/hppa.h" # define AO_CAN_EMUL_CAS # endif /* __hppa__ */ # if defined(__alpha__) # include "atomic_ops/sysdeps/gcc/alpha.h" # define AO_GENERALIZE_TWICE # endif /* __alpha__ */ # if defined(__s390__) # include "atomic_ops/sysdeps/gcc/s390.h" # endif /* __s390__ */ # if defined(__sparc__) # include "atomic_ops/sysdeps/gcc/sparc.h" # define AO_CAN_EMUL_CAS # endif /* __sparc__ */ # if defined(__m68k__) # include "atomic_ops/sysdeps/gcc/m68k.h" # endif /* __m68k__ */ # if defined(__powerpc__) || defined(__ppc__) || defined(__PPC__) \ || defined(__powerpc64__) || defined(__ppc64__) # include "atomic_ops/sysdeps/gcc/powerpc.h" # endif /* __powerpc__ */ # if defined(__arm__) && !defined(AO_USE_PTHREAD_DEFS) # include "atomic_ops/sysdeps/gcc/arm.h" # define AO_CAN_EMUL_CAS # endif /* __arm__ */ # if defined(__cris__) || defined(CRIS) # include "atomic_ops/sysdeps/gcc/cris.h" # define AO_GENERALIZE_TWICE # endif # if defined(__mips__) # include "atomic_ops/sysdeps/gcc/mips.h" # endif /* __mips__ */ # if defined(__sh__) || defined(SH4) # include "atomic_ops/sysdeps/gcc/sh.h" # define AO_CAN_EMUL_CAS # endif /* __sh__ */ # if defined(__avr32__) # include "atomic_ops/sysdeps/gcc/avr32.h" # endif # if defined(__hexagon__) # include "atomic_ops/sysdeps/gcc/hexagon.h" # endif #endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */ #if (defined(__IBMC__) || defined(__IBMCPP__)) && !defined(__GNUC__) \ && !defined(AO_USE_PTHREAD_DEFS) # if defined(__powerpc__) || defined(__powerpc) || defined(__ppc__) \ || defined(__PPC__) || defined(_M_PPC) || defined(_ARCH_PPC) \ || defined(_ARCH_PWR) # include "atomic_ops/sysdeps/ibmc/powerpc.h" # define AO_GENERALIZE_TWICE # endif #endif #if defined(__INTEL_COMPILER) && !defined(AO_USE_PTHREAD_DEFS) # if defined(__ia64__) # include "atomic_ops/sysdeps/icc/ia64.h" # define AO_GENERALIZE_TWICE # endif # if defined(__GNUC__) /* Intel Compiler in GCC compatible mode */ # if defined(__i386__) # include "atomic_ops/sysdeps/gcc/x86.h" # endif /* __i386__ */ # if defined(__x86_64__) # if __INTEL_COMPILER > 1110 # define AO_USE_SYNC_CAS_BUILTIN # endif # include "atomic_ops/sysdeps/gcc/x86_64.h" # endif /* __x86_64__ */ # endif #endif #if defined(_HPUX_SOURCE) && !defined(__GNUC__) && !defined(AO_USE_PTHREAD_DEFS) # if defined(__ia64) # include "atomic_ops/sysdeps/hpc/ia64.h" # define AO_GENERALIZE_TWICE # else # include "atomic_ops/sysdeps/hpc/hppa.h" # define AO_CAN_EMUL_CAS # endif #endif #if defined(_MSC_VER) || defined(__DMC__) || defined(__BORLANDC__) \ || (defined(__WATCOMC__) && defined(__NT__)) # if defined(_AMD64_) || defined(_M_X64) # include "atomic_ops/sysdeps/msftc/x86_64.h" # elif defined(_M_IX86) || defined(x86) # include "atomic_ops/sysdeps/msftc/x86.h" # elif defined(_M_ARM) || defined(ARM) || defined(_ARM_) # include "atomic_ops/sysdeps/msftc/arm.h" # define AO_GENERALIZE_TWICE # endif #endif #if defined(__sun) && !defined(__GNUC__) && !defined(AO_USE_PTHREAD_DEFS) /* Note: use -DAO_USE_PTHREAD_DEFS if Sun CC does not handle inline asm. */ # if defined(__i386) # include "atomic_ops/sysdeps/sunc/x86.h" # endif /* __i386 */ # if defined(__x86_64) || defined(__amd64) # include "atomic_ops/sysdeps/sunc/x86_64.h" # endif /* __x86_64 */ #endif #if !defined(__GNUC__) && (defined(sparc) || defined(__sparc)) \ && !defined(AO_USE_PTHREAD_DEFS) # include "atomic_ops/sysdeps/sunc/sparc.h" # define AO_CAN_EMUL_CAS #endif #if defined(AO_REQUIRE_CAS) && !defined(AO_HAVE_compare_and_swap) \ && !defined(AO_HAVE_compare_and_swap_full) \ && !defined(AO_HAVE_compare_and_swap_acquire) # if defined(AO_CAN_EMUL_CAS) # include "atomic_ops/sysdeps/emul_cas.h" # else # error Cannot implement AO_compare_and_swap_full on this architecture. # endif #endif /* AO_REQUIRE_CAS && !AO_HAVE_compare_and_swap ... */ /* The most common way to clear a test-and-set location */ /* at the end of a critical section. */ #if AO_AO_TS_T && !defined(AO_CLEAR) # define AO_CLEAR(addr) AO_store_release((AO_TS_t *)(addr), AO_TS_CLEAR) #endif #if AO_CHAR_TS_T && !defined(AO_CLEAR) # define AO_CLEAR(addr) AO_char_store_release((AO_TS_t *)(addr), AO_TS_CLEAR) #endif /* The generalization section. */ #if !defined(AO_GENERALIZE_TWICE) && defined(AO_CAN_EMUL_CAS) \ && !defined(AO_HAVE_compare_and_swap_full) # define AO_GENERALIZE_TWICE #endif /* Theoretically we should repeatedly include atomic_ops_generalize.h. */ /* In fact, we observe that this converges after a small fixed number */ /* of iterations, usually one. */ #include "atomic_ops/generalize.h" #ifdef AO_GENERALIZE_TWICE # include "atomic_ops/generalize.h" #endif /* For compatibility with version 0.4 and earlier */ #define AO_TS_T AO_TS_t #define AO_T AO_t #define AO_TS_VAL AO_TS_VAL_t #endif /* ATOMIC_OPS_H */ libatomic_ops-7.2/src/atomic_ops_malloc.c0000644000175000017500000002031711753234157015561 00000000000000/* * Copyright (c) 2005 Hewlett-Packard Development Company, L.P. * Original Author: Hans Boehm * * This file may be redistributed and/or modified under the * terms of the GNU General Public License as published by the Free Software * Foundation; either version 2, or (at your option) any later version. * * It is distributed in the hope that it will be useful, but WITHOUT ANY * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS * FOR A PARTICULAR PURPOSE. See the GNU General Public License in the * file doc/COPYING for more details. */ #if defined(HAVE_CONFIG_H) # include "config.h" #endif #define AO_REQUIRE_CAS #include "atomic_ops_stack.h" #include /* for ffs, which is assumed reentrant. */ #include #ifdef AO_TRACE_MALLOC # include # include #endif /* * We round up each allocation request to the next power of two * minus one word. * We keep one stack of free objects for each size. Each object * has an initial word (offset -sizeof(AO_t) from the visible pointer) * which contains either * The binary log of the object size in bytes (small objects) * The object size (a multiple of CHUNK_SIZE) for large objects. * The second case only arises if mmap-based allocation is supported. * We align the user-visible part of each object on a GRANULARITY * byte boundary. That means that the actual (hidden) start of * the object starts a word before this boundary. */ #ifndef LOG_MAX_SIZE # define LOG_MAX_SIZE 16 /* We assume that 2**LOG_MAX_SIZE is a multiple of page size. */ #endif #ifndef ALIGNMENT # define ALIGNMENT 16 /* Assumed to be at least sizeof(AO_t). */ #endif #define CHUNK_SIZE (1 << LOG_MAX_SIZE) #ifndef AO_INITIAL_HEAP_SIZE # define AO_INITIAL_HEAP_SIZE (2*(LOG_MAX_SIZE+1)*CHUNK_SIZE) #endif char AO_initial_heap[AO_INITIAL_HEAP_SIZE]; static volatile AO_t initial_heap_ptr = (AO_t)AO_initial_heap; static volatile char *initial_heap_lim = AO_initial_heap + AO_INITIAL_HEAP_SIZE; #if defined(HAVE_MMAP) #include #include #include #include #if defined(MAP_ANONYMOUS) || defined(MAP_ANON) # define USE_MMAP_ANON #endif #ifdef USE_MMAP_FIXED # define GC_MMAP_FLAGS MAP_FIXED | MAP_PRIVATE /* Seems to yield better performance on Solaris 2, but can */ /* be unreliable if something is already mapped at the address. */ #else # define GC_MMAP_FLAGS MAP_PRIVATE #endif #ifdef USE_MMAP_ANON # ifdef MAP_ANONYMOUS # define OPT_MAP_ANON MAP_ANONYMOUS # else # define OPT_MAP_ANON MAP_ANON # endif #else # define OPT_MAP_ANON 0 #endif static volatile AO_t mmap_enabled = 0; void AO_malloc_enable_mmap(void) { # if defined(__sun) AO_store_release(&mmap_enabled, 1); /* Workaround for Sun CC */ # else AO_store(&mmap_enabled, 1); # endif } static char *get_mmaped(size_t sz) { char * result; # ifdef USE_MMAP_ANON # define zero_fd -1 # else int zero_fd; # endif assert(!(sz & (CHUNK_SIZE - 1))); if (!mmap_enabled) return 0; # ifndef USE_MMAP_ANON zero_fd = open("/dev/zero", O_RDONLY); if (zero_fd == -1) return 0; # endif result = mmap(0, sz, PROT_READ | PROT_WRITE, GC_MMAP_FLAGS | OPT_MAP_ANON, zero_fd, 0/* offset */); # ifndef USE_MMAP_ANON close(zero_fd); # endif if (result == MAP_FAILED) result = 0; return result; } /* Allocate an object of size (incl. header) of size > CHUNK_SIZE. */ /* sz includes space for an AO_t-sized header. */ static char * AO_malloc_large(size_t sz) { char * result; /* The header will force us to waste ALIGNMENT bytes, incl. header. */ sz += ALIGNMENT; /* Round to multiple of CHUNK_SIZE. */ sz = (sz + CHUNK_SIZE - 1) & ~(CHUNK_SIZE - 1); result = get_mmaped(sz); if (result == 0) return 0; result += ALIGNMENT; ((AO_t *)result)[-1] = (AO_t)sz; return result; } static void AO_free_large(char * p) { AO_t sz = ((AO_t *)p)[-1]; if (munmap(p - ALIGNMENT, (size_t)sz) != 0) abort(); /* Programmer error. Not really async-signal-safe, but ... */ } #else /* No MMAP */ void AO_malloc_enable_mmap(void) { } static char *get_mmaped(size_t sz) { return 0; } static char * AO_malloc_large(size_t sz) { return 0; } static void AO_free_large(char * p) { abort(); /* Programmer error. Not really async-signal-safe, but ... */ } #endif /* No MMAP */ static char * get_chunk(void) { char *initial_ptr; char *my_chunk_ptr; char * my_lim; retry: initial_ptr = (char *)AO_load(&initial_heap_ptr); my_chunk_ptr = (char *)(((AO_t)initial_ptr + (ALIGNMENT - 1)) & ~(ALIGNMENT - 1)); if (initial_ptr != my_chunk_ptr) { /* Align correctly. If this fails, someone else did it for us. */ AO_compare_and_swap_acquire(&initial_heap_ptr, (AO_t)initial_ptr, (AO_t)my_chunk_ptr); } my_lim = my_chunk_ptr + CHUNK_SIZE; if (my_lim <= initial_heap_lim) { if (!AO_compare_and_swap(&initial_heap_ptr, (AO_t)my_chunk_ptr, (AO_t)my_lim)) goto retry; return my_chunk_ptr; } /* We failed. The initial heap is used up. */ my_chunk_ptr = get_mmaped(CHUNK_SIZE); assert (!((AO_t)my_chunk_ptr & (ALIGNMENT-1))); return my_chunk_ptr; } /* Object free lists. Ith entry corresponds to objects */ /* of total size 2**i bytes. */ AO_stack_t AO_free_list[LOG_MAX_SIZE+1]; /* Chunk free list, linked through first word in chunks. */ /* All entries of size CHUNK_SIZE. */ AO_stack_t AO_chunk_free_list; /* Break up the chunk, and add it to the object free list for */ /* the given size. Sz must be a power of two. */ /* We have exclusive access to chunk. */ static void add_chunk_as(void * chunk, size_t sz, unsigned log_sz) { char *first = (char *)chunk + ALIGNMENT - sizeof(AO_t); char *limit = (char *)chunk + CHUNK_SIZE - sz; char *next, *p; for (p = first; p <= limit; p = next) { next = p + sz; AO_stack_push(AO_free_list+log_sz, (AO_t *)p); } } static int msbs[16] = {0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4}; /* Return the position of the most significant set bit in the */ /* argument. */ /* We follow the conventions of ffs(), i.e. the least */ /* significant bit is number one. */ int msb(size_t s) { int result = 0; int v; if ((s & 0xff) != s) { /* The following shift often generates warnings on 32-bit arch's */ /* That's OK, because it will never be executed there. */ /* Doing the shift only in a conditional expression suppresses the */ /* warning with the modern compilers. */ if (sizeof(size_t) > 4 && (v = s >> 32) != 0) { s = v; result += 32; } if ((s >> 16) != 0) { s >>= 16; result += 16; } if ((s >> 8) != 0) { s >>= 8; result += 8; } } if (s > 15) { s >>= 4; result += 4; } result += msbs[s]; return result; } void * AO_malloc(size_t sz) { AO_t *result; size_t adj_sz = sz + sizeof(AO_t); int log_sz; if (sz > CHUNK_SIZE) return AO_malloc_large(sz); log_sz = msb(adj_sz-1); result = AO_stack_pop(AO_free_list+log_sz); while (0 == result) { void * chunk = get_chunk(); if (0 == chunk) return 0; adj_sz = 1 << log_sz; add_chunk_as(chunk, adj_sz, log_sz); result = AO_stack_pop(AO_free_list+log_sz); } *result = log_sz; # ifdef AO_TRACE_MALLOC fprintf(stderr, "%x: AO_malloc(%lu) = %p\n", (int)pthread_self(), (unsigned long)sz, result+1); # endif return result + 1; } void AO_free(void *p) { char *base = (char *)p - sizeof(AO_t); int log_sz; if (0 == p) return; log_sz = *(AO_t *)base; # ifdef AO_TRACE_MALLOC fprintf(stderr, "%x: AO_free(%p sz:%lu)\n", (int)pthread_self(), p, (unsigned long)(log_sz > LOG_MAX_SIZE? log_sz : (1 << log_sz))); # endif if (log_sz > LOG_MAX_SIZE) AO_free_large(p); else AO_stack_push(AO_free_list+log_sz, (AO_t *)base); } libatomic_ops-7.2/src/atomic_ops_stack.h0000644000175000017500000001466411753234157015434 00000000000000/* * The implementation of the routines described here is covered by the GPL. * This header file is covered by the following license: */ /* * Copyright (c) 2005 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* Almost lock-free LIFO linked lists (linked stacks). */ #ifndef AO_STACK_H #define AO_STACK_H #include "atomic_ops.h" #if !defined(AO_HAVE_compare_double_and_swap_double) \ && !defined(AO_HAVE_compare_double_and_swap) \ && defined(AO_HAVE_compare_and_swap) # define AO_USE_ALMOST_LOCK_FREE #else /* If we have no compare-and-swap operation defined, we assume */ /* that we will actually be using CAS emulation. If we do that, */ /* it's cheaper to use the version-based implementation. */ # define AO_STACK_IS_LOCK_FREE #endif /* * These are not guaranteed to be completely lock-free. * List insertion may spin under extremely unlikely conditions. * It cannot deadlock due to recursive reentry unless AO_list_remove * is called while at least AO_BL_SIZE activations of * AO_list_remove are currently active in the same thread, i.e. * we must have at least AO_BL_SIZE recursive signal handler * invocations. * * All operations take an AO_list_aux argument. It is safe to * share a single AO_list_aux structure among all lists, but that * may increase contention. Any given list must always be accessed * with the same AO_list_aux structure. * * We make some machine-dependent assumptions: * - We have a compare-and-swap operation. * - At least _AO_N_BITS low order bits in pointers are * zero and normally unused. * - size_t and pointers have the same size. * * We do use a fully lock-free implementation if double-width * compare-and-swap operations are available. */ #ifdef AO_USE_ALMOST_LOCK_FREE /* The number of low order pointer bits we can use for a small */ /* version number. */ # if defined(__LP64__) || defined(_LP64) || defined(_WIN64) /* WIN64 isn't really supported yet. */ # define AO_N_BITS 3 # else # define AO_N_BITS 2 # endif # define AO_BIT_MASK ((1 << AO_N_BITS) - 1) /* * AO_stack_aux should be treated as opaque. * It is fully defined here, so it can be allocated, and to facilitate * debugging. */ #ifndef AO_BL_SIZE # define AO_BL_SIZE 2 #endif #if AO_BL_SIZE > (1 << AO_N_BITS) # error AO_BL_SIZE too big #endif typedef struct AO__stack_aux { volatile AO_t AO_stack_bl[AO_BL_SIZE]; } AO_stack_aux; /* The stack implementation knows only about the location of */ /* link fields in nodes, and nothing about the rest of the */ /* stack elements. Link fields hold an AO_t, which is not */ /* necessarily a real pointer. This converts the AO_t to a */ /* real (AO_t *) which is either o, or points at the link */ /* field in the next node. */ #define AO_REAL_NEXT_PTR(x) (AO_t *)((x) & ~AO_BIT_MASK) /* The following two routines should not normally be used directly. */ /* We make them visible here for the rare cases in which it makes sense */ /* to share the an AO_stack_aux between stacks. */ void AO_stack_push_explicit_aux_release(volatile AO_t *list, AO_t *x, AO_stack_aux *); AO_t * AO_stack_pop_explicit_aux_acquire(volatile AO_t *list, AO_stack_aux *); /* And now AO_stack_t for the real interface: */ typedef struct AO__stack { volatile AO_t AO_ptr; AO_stack_aux AO_aux; } AO_stack_t; #define AO_STACK_INITIALIZER {0} AO_INLINE void AO_stack_init(AO_stack_t *list) { # if AO_BL_SIZE == 2 list -> AO_aux.AO_stack_bl[0] = 0; list -> AO_aux.AO_stack_bl[1] = 0; # else int i; for (i = 0; i < AO_BL_SIZE; ++i) list -> AO_aux.AO_stack_bl[i] = 0; # endif list -> AO_ptr = 0; } /* Convert an AO_stack_t to a pointer to the link field in */ /* the first element. */ #define AO_REAL_HEAD_PTR(x) AO_REAL_NEXT_PTR((x).AO_ptr) #define AO_stack_push_release(l, e) \ AO_stack_push_explicit_aux_release(&((l)->AO_ptr), e, &((l)->AO_aux)) #define AO_HAVE_stack_push_release #define AO_stack_pop_acquire(l) \ AO_stack_pop_explicit_aux_acquire(&((l)->AO_ptr), &((l)->AO_aux)) #define AO_HAVE_stack_pop_acquire # else /* Use fully non-blocking data structure, wide CAS */ #ifndef AO_HAVE_double_t /* Can happen if we're using CAS emulation, since we don't want to */ /* force that here, in case other atomic_ops clients don't want it. */ # include "atomic_ops/sysdeps/standard_ao_double_t.h" #endif typedef volatile AO_double_t AO_stack_t; /* AO_val1 is version, AO_val2 is pointer. */ #define AO_STACK_INITIALIZER {0} AO_INLINE void AO_stack_init(AO_stack_t *list) { list -> AO_val1 = 0; list -> AO_val2 = 0; } #define AO_REAL_HEAD_PTR(x) (AO_t *)((x).AO_val2) #define AO_REAL_NEXT_PTR(x) (AO_t *)(x) void AO_stack_push_release(AO_stack_t *list, AO_t *new_element); #define AO_HAVE_stack_push_release AO_t * AO_stack_pop_acquire(AO_stack_t *list); #define AO_HAVE_stack_pop_acquire #endif /* Wide CAS case */ #if defined(AO_HAVE_stack_push_release) && !defined(AO_HAVE_stack_push) # define AO_stack_push(l, e) AO_stack_push_release(l, e) # define AO_HAVE_stack_push #endif #if defined(AO_HAVE_stack_pop_acquire) && !defined(AO_HAVE_stack_pop) # define AO_stack_pop(l) AO_stack_pop_acquire(l) # define AO_HAVE_stack_pop #endif #endif /* !AO_STACK_H */ libatomic_ops-7.2/src/config.h.in0000644000175000017500000000357411753234210013750 00000000000000/* src/config.h.in. Generated from configure.ac by autoheader. */ /* Define to 1 if you have the `getpagesize' function. */ #undef HAVE_GETPAGESIZE /* Define to 1 if you have the header file. */ #undef HAVE_INTTYPES_H /* Define to 1 if you have the header file. */ #undef HAVE_MEMORY_H /* Define to 1 if you have a working `mmap' system call. */ #undef HAVE_MMAP /* Define to 1 if you have the header file. */ #undef HAVE_STDINT_H /* Define to 1 if you have the header file. */ #undef HAVE_STDLIB_H /* Define to 1 if you have the header file. */ #undef HAVE_STRINGS_H /* Define to 1 if you have the header file. */ #undef HAVE_STRING_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_PARAM_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_STAT_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_TYPES_H /* Define to 1 if you have the header file. */ #undef HAVE_UNISTD_H /* Define to 1 if your C compiler doesn't accept -c and -o together. */ #undef NO_MINUS_C_MINUS_O /* Name of package */ #undef PACKAGE /* Define to the address where bug reports for this package should be sent. */ #undef PACKAGE_BUGREPORT /* Define to the full name of this package. */ #undef PACKAGE_NAME /* Define to the full name and version of this package. */ #undef PACKAGE_STRING /* Define to the one symbol short name of this package. */ #undef PACKAGE_TARNAME /* Define to the home page for this package. */ #undef PACKAGE_URL /* Define to the version of this package. */ #undef PACKAGE_VERSION /* Define to 1 if you have the ANSI C header files. */ #undef STDC_HEADERS /* Version number of package */ #undef VERSION /* Indicates the use of pthreads (NetBSD). */ #undef _PTHREADS /* Required define if using POSIX threads. */ #undef _REENTRANT libatomic_ops-7.2/src/atomic_ops/0000755000175000017500000000000011753234214014135 500000000000000libatomic_ops-7.2/src/atomic_ops/generalize-small.template0000644000175000017500000005610711753234157021064 00000000000000/* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* XSIZE_load */ #if defined(AO_HAVE_XSIZE_load_acquire) && !defined(AO_HAVE_XSIZE_load) # define AO_XSIZE_load(addr) AO_XSIZE_load_acquire(addr) # define AO_HAVE_XSIZE_load #endif #if defined(AO_HAVE_XSIZE_load_full) && !defined(AO_HAVE_XSIZE_load_acquire) # define AO_XSIZE_load_acquire(addr) AO_XSIZE_load_full(addr) # define AO_HAVE_XSIZE_load_acquire #endif #if defined(AO_HAVE_XSIZE_load_full) && !defined(AO_HAVE_XSIZE_load_read) # define AO_XSIZE_load_read(addr) AO_XSIZE_load_full(addr) # define AO_HAVE_XSIZE_load_read #endif #if !defined(AO_HAVE_XSIZE_load_acquire_read) \ && defined(AO_HAVE_XSIZE_load_acquire) # define AO_XSIZE_load_acquire_read(addr) AO_XSIZE_load_acquire(addr) # define AO_HAVE_XSIZE_load_acquire_read #endif #if defined(AO_HAVE_XSIZE_load) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_XSIZE_load_acquire) AO_INLINE unsigned XCTYPE AO_XSIZE_load_acquire(const volatile unsigned XCTYPE *addr) { unsigned XCTYPE result = AO_XSIZE_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_full(); return result; } # define AO_HAVE_XSIZE_load_acquire #endif #if defined(AO_HAVE_XSIZE_load) && defined(AO_HAVE_nop_read) \ && !defined(AO_HAVE_XSIZE_load_read) AO_INLINE unsigned XCTYPE AO_XSIZE_load_read(const volatile unsigned XCTYPE *addr) { unsigned XCTYPE result = AO_XSIZE_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_read(); return result; } # define AO_HAVE_XSIZE_load_read #endif #if defined(AO_HAVE_XSIZE_load_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_XSIZE_load_full) # define AO_XSIZE_load_full(addr) (AO_nop_full(), AO_XSIZE_load_acquire(addr)) # define AO_HAVE_XSIZE_load_full #endif #if !defined(AO_HAVE_XSIZE_load_acquire_read) \ && defined(AO_HAVE_XSIZE_load_read) # define AO_XSIZE_load_acquire_read(addr) AO_XSIZE_load_read(addr) # define AO_HAVE_XSIZE_load_acquire_read #endif #if defined(AO_HAVE_XSIZE_load_acquire_read) && !defined(AO_HAVE_XSIZE_load) # define AO_XSIZE_load(addr) AO_XSIZE_load_acquire_read(addr) # define AO_HAVE_XSIZE_load #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_XSIZE_load_acquire_read) # define AO_XSIZE_load_dd_acquire_read(addr) AO_XSIZE_load_acquire_read(addr) # define AO_HAVE_XSIZE_load_dd_acquire_read # endif #else # if defined(AO_HAVE_XSIZE_load) # define AO_XSIZE_load_dd_acquire_read(addr) AO_XSIZE_load(addr) # define AO_HAVE_XSIZE_load_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* XSIZE_store */ #if defined(AO_HAVE_XSIZE_store_release) && !defined(AO_HAVE_XSIZE_store) # define AO_XSIZE_store(addr, val) AO_XSIZE_store_release(addr,val) # define AO_HAVE_XSIZE_store #endif #if defined(AO_HAVE_XSIZE_store_full) && !defined(AO_HAVE_XSIZE_store_release) # define AO_XSIZE_store_release(addr,val) AO_XSIZE_store_full(addr,val) # define AO_HAVE_XSIZE_store_release #endif #if defined(AO_HAVE_XSIZE_store_full) && !defined(AO_HAVE_XSIZE_store_write) # define AO_XSIZE_store_write(addr,val) AO_XSIZE_store_full(addr,val) # define AO_HAVE_XSIZE_store_write #endif #if defined(AO_HAVE_XSIZE_store_release) \ && !defined(AO_HAVE_XSIZE_store_release_write) # define AO_XSIZE_store_release_write(addr, val) \ AO_XSIZE_store_release(addr,val) # define AO_HAVE_XSIZE_store_release_write #endif #if defined(AO_HAVE_XSIZE_store_write) && !defined(AO_HAVE_XSIZE_store) # define AO_XSIZE_store(addr, val) AO_XSIZE_store_write(addr,val) # define AO_HAVE_XSIZE_store #endif #if defined(AO_HAVE_XSIZE_store) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_XSIZE_store_release) # define AO_XSIZE_store_release(addr,val) \ (AO_nop_full(), AO_XSIZE_store(addr,val)) # define AO_HAVE_XSIZE_store_release #endif #if defined(AO_HAVE_nop_write) && defined(AO_HAVE_XSIZE_store) \ && !defined(AO_HAVE_XSIZE_store_write) # define AO_XSIZE_store_write(addr, val) \ (AO_nop_write(), AO_XSIZE_store(addr,val)) # define AO_HAVE_XSIZE_store_write #endif #if defined(AO_HAVE_XSIZE_store_write) \ && !defined(AO_HAVE_XSIZE_store_release_write) # define AO_XSIZE_store_release_write(addr, val) AO_XSIZE_store_write(addr,val) # define AO_HAVE_XSIZE_store_release_write #endif #if defined(AO_HAVE_XSIZE_store_release) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_XSIZE_store_full) # define AO_XSIZE_store_full(addr, val) \ (AO_XSIZE_store_release(addr, val), AO_nop_full()) # define AO_HAVE_XSIZE_store_full #endif /* XSIZE_fetch_and_add */ #if defined(AO_HAVE_XSIZE_compare_and_swap_full) \ && !defined(AO_HAVE_XSIZE_fetch_and_add_full) AO_INLINE XCTYPE AO_XSIZE_fetch_and_add_full(volatile unsigned XCTYPE *addr, unsigned XCTYPE incr) { unsigned XCTYPE old; do { old = *addr; } while (!AO_XSIZE_compare_and_swap_full(addr, old, old+incr)); return old; } # define AO_HAVE_XSIZE_fetch_and_add_full #endif #if defined(AO_HAVE_XSIZE_compare_and_swap_acquire) \ && !defined(AO_HAVE_XSIZE_fetch_and_add_acquire) AO_INLINE XCTYPE AO_XSIZE_fetch_and_add_acquire(volatile unsigned XCTYPE *addr, unsigned XCTYPE incr) { unsigned XCTYPE old; do { old = *addr; } while (!AO_XSIZE_compare_and_swap_acquire(addr, old, old+incr)); return old; } # define AO_HAVE_XSIZE_fetch_and_add_acquire #endif #if defined(AO_HAVE_XSIZE_compare_and_swap_release) \ && !defined(AO_HAVE_XSIZE_fetch_and_add_release) AO_INLINE XCTYPE AO_XSIZE_fetch_and_add_release(volatile unsigned XCTYPE *addr, unsigned XCTYPE incr) { unsigned XCTYPE old; do { old = *addr; } while (!AO_XSIZE_compare_and_swap_release(addr, old, old+incr)); return old; } # define AO_HAVE_XSIZE_fetch_and_add_release #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_full) # if !defined(AO_HAVE_XSIZE_fetch_and_add_release) # define AO_XSIZE_fetch_and_add_release(addr, val) \ AO_XSIZE_fetch_and_add_full(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_release # endif # if !defined(AO_HAVE_XSIZE_fetch_and_add_acquire) # define AO_XSIZE_fetch_and_add_acquire(addr, val) \ AO_XSIZE_fetch_and_add_full(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_acquire # endif # if !defined(AO_HAVE_XSIZE_fetch_and_add_write) # define AO_XSIZE_fetch_and_add_write(addr, val) \ AO_XSIZE_fetch_and_add_full(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_write # endif # if !defined(AO_HAVE_XSIZE_fetch_and_add_read) # define AO_XSIZE_fetch_and_add_read(addr, val) \ AO_XSIZE_fetch_and_add_full(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_read # endif #endif /* AO_HAVE_XSIZE_fetch_and_add_full */ #if !defined(AO_HAVE_XSIZE_fetch_and_add) \ && defined(AO_HAVE_XSIZE_fetch_and_add_release) # define AO_XSIZE_fetch_and_add(addr, val) \ AO_XSIZE_fetch_and_add_release(addr, val) # define AO_HAVE_XSIZE_fetch_and_add #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add) \ && defined(AO_HAVE_XSIZE_fetch_and_add_acquire) # define AO_XSIZE_fetch_and_add(addr, val) \ AO_XSIZE_fetch_and_add_acquire(addr, val) # define AO_HAVE_XSIZE_fetch_and_add #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add) \ && defined(AO_HAVE_XSIZE_fetch_and_add_write) # define AO_XSIZE_fetch_and_add(addr, val) \ AO_XSIZE_fetch_and_add_write(addr, val) # define AO_HAVE_XSIZE_fetch_and_add #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add) \ && defined(AO_HAVE_XSIZE_fetch_and_add_read) # define AO_XSIZE_fetch_and_add(addr, val) \ AO_XSIZE_fetch_and_add_read(addr, val) # define AO_HAVE_XSIZE_fetch_and_add #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_acquire) \ && defined(AO_HAVE_nop_full) && !defined(AO_HAVE_XSIZE_fetch_and_add_full) # define AO_XSIZE_fetch_and_add_full(addr, val) \ (AO_nop_full(), AO_XSIZE_fetch_and_add_acquire(addr, val)) # define AO_HAVE_XSIZE_fetch_and_add_full #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add_release_write) \ && defined(AO_HAVE_XSIZE_fetch_and_add_write) # define AO_XSIZE_fetch_and_add_release_write(addr, val) \ AO_XSIZE_fetch_and_add_write(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_release_write #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add_release_write) \ && defined(AO_HAVE_XSIZE_fetch_and_add_release) # define AO_XSIZE_fetch_and_add_release_write(addr, val) \ AO_XSIZE_fetch_and_add_release(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_release_write #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add_acquire_read) \ && defined(AO_HAVE_XSIZE_fetch_and_add_read) # define AO_XSIZE_fetch_and_add_acquire_read(addr, val) \ AO_XSIZE_fetch_and_add_read(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_acquire_read #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add_acquire_read) \ && defined(AO_HAVE_XSIZE_fetch_and_add_acquire) # define AO_XSIZE_fetch_and_add_acquire_read(addr, val) \ AO_XSIZE_fetch_and_add_acquire(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_XSIZE_fetch_and_add_acquire_read) # define AO_XSIZE_fetch_and_add_dd_acquire_read(addr, val) \ AO_XSIZE_fetch_and_add_acquire_read(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_dd_acquire_read # endif #else # if defined(AO_HAVE_XSIZE_fetch_and_add) # define AO_XSIZE_fetch_and_add_dd_acquire_read(addr, val) \ AO_XSIZE_fetch_and_add(addr, val) # define AO_HAVE_XSIZE_fetch_and_add_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* XSIZE_fetch_and_add1 */ #if defined(AO_HAVE_XSIZE_fetch_and_add_full) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_full) # define AO_XSIZE_fetch_and_add1_full(addr) \ AO_XSIZE_fetch_and_add_full(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1_full #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_release) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_release) # define AO_XSIZE_fetch_and_add1_release(addr) \ AO_XSIZE_fetch_and_add_release(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1_release #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_acquire) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_acquire) # define AO_XSIZE_fetch_and_add1_acquire(addr) \ AO_XSIZE_fetch_and_add_acquire(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1_acquire #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_write) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_write) # define AO_XSIZE_fetch_and_add1_write(addr) \ AO_XSIZE_fetch_and_add_write(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1_write #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_read) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_read) # define AO_XSIZE_fetch_and_add1_read(addr) \ AO_XSIZE_fetch_and_add_read(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1_read #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_release_write) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_release_write) # define AO_XSIZE_fetch_and_add1_release_write(addr) \ AO_XSIZE_fetch_and_add_release_write(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1_release_write #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_acquire_read) # define AO_XSIZE_fetch_and_add1_acquire_read(addr) \ AO_XSIZE_fetch_and_add_acquire_read(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1_acquire_read #endif #if defined(AO_HAVE_XSIZE_fetch_and_add) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1) # define AO_XSIZE_fetch_and_add1(addr) AO_XSIZE_fetch_and_add(addr,1) # define AO_HAVE_XSIZE_fetch_and_add1 #endif #if defined(AO_HAVE_XSIZE_fetch_and_add1_full) # if !defined(AO_HAVE_XSIZE_fetch_and_add1_release) # define AO_XSIZE_fetch_and_add1_release(addr) \ AO_XSIZE_fetch_and_add1_full(addr) # define AO_HAVE_XSIZE_fetch_and_add1_release # endif # if !defined(AO_HAVE_XSIZE_fetch_and_add1_acquire) # define AO_XSIZE_fetch_and_add1_acquire(addr) \ AO_XSIZE_fetch_and_add1_full(addr) # define AO_HAVE_XSIZE_fetch_and_add1_acquire # endif # if !defined(AO_HAVE_XSIZE_fetch_and_add1_write) # define AO_XSIZE_fetch_and_add1_write(addr) \ AO_XSIZE_fetch_and_add1_full(addr) # define AO_HAVE_XSIZE_fetch_and_add1_write # endif # if !defined(AO_HAVE_XSIZE_fetch_and_add1_read) # define AO_XSIZE_fetch_and_add1_read(addr) \ AO_XSIZE_fetch_and_add1_full(addr) # define AO_HAVE_XSIZE_fetch_and_add1_read # endif #endif /* AO_HAVE_XSIZE_fetch_and_add1_full */ #if !defined(AO_HAVE_XSIZE_fetch_and_add1) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_release) # define AO_XSIZE_fetch_and_add1(addr) AO_XSIZE_fetch_and_add1_release(addr) # define AO_HAVE_XSIZE_fetch_and_add1 #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add1) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_acquire) # define AO_XSIZE_fetch_and_add1(addr) AO_XSIZE_fetch_and_add1_acquire(addr) # define AO_HAVE_XSIZE_fetch_and_add1 #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add1) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_write) # define AO_XSIZE_fetch_and_add1(addr) AO_XSIZE_fetch_and_add1_write(addr) # define AO_HAVE_XSIZE_fetch_and_add1 #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add1) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_read) # define AO_XSIZE_fetch_and_add1(addr) AO_XSIZE_fetch_and_add1_read(addr) # define AO_HAVE_XSIZE_fetch_and_add1 #endif #if defined(AO_HAVE_XSIZE_fetch_and_add1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_XSIZE_fetch_and_add1_full) # define AO_XSIZE_fetch_and_add1_full(addr) \ (AO_nop_full(), AO_XSIZE_fetch_and_add1_acquire(addr)) # define AO_HAVE_XSIZE_fetch_and_add1_full #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add1_release_write) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_write) # define AO_XSIZE_fetch_and_add1_release_write(addr) \ AO_XSIZE_fetch_and_add1_write(addr) # define AO_HAVE_XSIZE_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add1_release_write) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_release) # define AO_XSIZE_fetch_and_add1_release_write(addr) \ AO_XSIZE_fetch_and_add1_release(addr) # define AO_HAVE_XSIZE_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_read) # define AO_XSIZE_fetch_and_add1_acquire_read(addr) \ AO_XSIZE_fetch_and_add1_read(addr) # define AO_HAVE_XSIZE_fetch_and_add1_acquire_read #endif #if !defined(AO_HAVE_XSIZE_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_XSIZE_fetch_and_add1_acquire) # define AO_XSIZE_fetch_and_add1_acquire_read(addr) \ AO_XSIZE_fetch_and_add1_acquire(addr) # define AO_HAVE_XSIZE_fetch_and_add1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_XSIZE_fetch_and_add1_acquire_read) # define AO_XSIZE_fetch_and_add1_dd_acquire_read(addr) \ AO_XSIZE_fetch_and_add1_acquire_read(addr) # define AO_HAVE_XSIZE_fetch_and_add1_dd_acquire_read # endif #else # if defined(AO_HAVE_XSIZE_fetch_and_add1) # define AO_XSIZE_fetch_and_add1_dd_acquire_read(addr) \ AO_XSIZE_fetch_and_add1(addr) # define AO_HAVE_XSIZE_fetch_and_add1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* XSIZE_fetch_and_sub1 */ #if defined(AO_HAVE_XSIZE_fetch_and_add_full) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_full) # define AO_XSIZE_fetch_and_sub1_full(addr) \ AO_XSIZE_fetch_and_add_full(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1_full #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_release) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_release) # define AO_XSIZE_fetch_and_sub1_release(addr) \ AO_XSIZE_fetch_and_add_release(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1_release #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_acquire) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire) # define AO_XSIZE_fetch_and_sub1_acquire(addr) \ AO_XSIZE_fetch_and_add_acquire(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1_acquire #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_write) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_write) # define AO_XSIZE_fetch_and_sub1_write(addr) \ AO_XSIZE_fetch_and_add_write(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1_write #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_read) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_read) # define AO_XSIZE_fetch_and_sub1_read(addr) \ AO_XSIZE_fetch_and_add_read(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1_read #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_release_write) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_release_write) # define AO_XSIZE_fetch_and_sub1_release_write(addr) \ AO_XSIZE_fetch_and_add_release_write(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1_release_write #endif #if defined(AO_HAVE_XSIZE_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire_read) # define AO_XSIZE_fetch_and_sub1_acquire_read(addr) \ AO_XSIZE_fetch_and_add_acquire_read(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1_acquire_read #endif #if defined(AO_HAVE_XSIZE_fetch_and_add) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1) # define AO_XSIZE_fetch_and_sub1(addr) \ AO_XSIZE_fetch_and_add(addr,(unsigned XCTYPE)(-1)) # define AO_HAVE_XSIZE_fetch_and_sub1 #endif #if defined(AO_HAVE_XSIZE_fetch_and_sub1_full) # if !defined(AO_HAVE_XSIZE_fetch_and_sub1_release) # define AO_XSIZE_fetch_and_sub1_release(addr) \ AO_XSIZE_fetch_and_sub1_full(addr) # define AO_HAVE_XSIZE_fetch_and_sub1_release # endif # if !defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire) # define AO_XSIZE_fetch_and_sub1_acquire(addr) \ AO_XSIZE_fetch_and_sub1_full(addr) # define AO_HAVE_XSIZE_fetch_and_sub1_acquire # endif # if !defined(AO_HAVE_XSIZE_fetch_and_sub1_write) # define AO_XSIZE_fetch_and_sub1_write(addr) \ AO_XSIZE_fetch_and_sub1_full(addr) # define AO_HAVE_XSIZE_fetch_and_sub1_write # endif # if !defined(AO_HAVE_XSIZE_fetch_and_sub1_read) # define AO_XSIZE_fetch_and_sub1_read(addr) \ AO_XSIZE_fetch_and_sub1_full(addr) # define AO_HAVE_XSIZE_fetch_and_sub1_read # endif #endif /* AO_HAVE_XSIZE_fetch_and_sub1_full */ #if !defined(AO_HAVE_XSIZE_fetch_and_sub1) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_release) # define AO_XSIZE_fetch_and_sub1(addr) AO_XSIZE_fetch_and_sub1_release(addr) # define AO_HAVE_XSIZE_fetch_and_sub1 #endif #if !defined(AO_HAVE_XSIZE_fetch_and_sub1) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire) # define AO_XSIZE_fetch_and_sub1(addr) AO_XSIZE_fetch_and_sub1_acquire(addr) # define AO_HAVE_XSIZE_fetch_and_sub1 #endif #if !defined(AO_HAVE_XSIZE_fetch_and_sub1) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_write) # define AO_XSIZE_fetch_and_sub1(addr) AO_XSIZE_fetch_and_sub1_write(addr) # define AO_HAVE_XSIZE_fetch_and_sub1 #endif #if !defined(AO_HAVE_XSIZE_fetch_and_sub1) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_read) # define AO_XSIZE_fetch_and_sub1(addr) AO_XSIZE_fetch_and_sub1_read(addr) # define AO_HAVE_XSIZE_fetch_and_sub1 #endif #if defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_XSIZE_fetch_and_sub1_full) # define AO_XSIZE_fetch_and_sub1_full(addr) \ (AO_nop_full(), AO_XSIZE_fetch_and_sub1_acquire(addr)) # define AO_HAVE_XSIZE_fetch_and_sub1_full #endif #if !defined(AO_HAVE_XSIZE_fetch_and_sub1_release_write) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_write) # define AO_XSIZE_fetch_and_sub1_release_write(addr) \ AO_XSIZE_fetch_and_sub1_write(addr) # define AO_HAVE_XSIZE_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_XSIZE_fetch_and_sub1_release_write) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_release) # define AO_XSIZE_fetch_and_sub1_release_write(addr) \ AO_XSIZE_fetch_and_sub1_release(addr) # define AO_HAVE_XSIZE_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_read) # define AO_XSIZE_fetch_and_sub1_acquire_read(addr) \ AO_XSIZE_fetch_and_sub1_read(addr) # define AO_HAVE_XSIZE_fetch_and_sub1_acquire_read #endif #if !defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_XSIZE_fetch_and_sub1_acquire) # define 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Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* char_load */ #if defined(AO_HAVE_char_load_acquire) && !defined(AO_HAVE_char_load) # define AO_char_load(addr) AO_char_load_acquire(addr) # define AO_HAVE_char_load #endif #if defined(AO_HAVE_char_load_full) && !defined(AO_HAVE_char_load_acquire) # define AO_char_load_acquire(addr) AO_char_load_full(addr) # define AO_HAVE_char_load_acquire #endif #if defined(AO_HAVE_char_load_full) && !defined(AO_HAVE_char_load_read) # define AO_char_load_read(addr) AO_char_load_full(addr) # define AO_HAVE_char_load_read #endif #if !defined(AO_HAVE_char_load_acquire_read) \ && defined(AO_HAVE_char_load_acquire) # define AO_char_load_acquire_read(addr) AO_char_load_acquire(addr) # define AO_HAVE_char_load_acquire_read #endif #if defined(AO_HAVE_char_load) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_char_load_acquire) AO_INLINE unsigned char AO_char_load_acquire(const volatile unsigned char *addr) { unsigned char result = AO_char_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_full(); return result; } # define AO_HAVE_char_load_acquire #endif #if defined(AO_HAVE_char_load) && defined(AO_HAVE_nop_read) \ && !defined(AO_HAVE_char_load_read) AO_INLINE unsigned char AO_char_load_read(const volatile unsigned char *addr) { unsigned char result = AO_char_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_read(); return result; } # define AO_HAVE_char_load_read #endif #if defined(AO_HAVE_char_load_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_char_load_full) # define AO_char_load_full(addr) (AO_nop_full(), AO_char_load_acquire(addr)) # define AO_HAVE_char_load_full #endif #if !defined(AO_HAVE_char_load_acquire_read) \ && defined(AO_HAVE_char_load_read) # define AO_char_load_acquire_read(addr) AO_char_load_read(addr) # define AO_HAVE_char_load_acquire_read #endif #if defined(AO_HAVE_char_load_acquire_read) && !defined(AO_HAVE_char_load) # define AO_char_load(addr) AO_char_load_acquire_read(addr) # define AO_HAVE_char_load #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_char_load_acquire_read) # define AO_char_load_dd_acquire_read(addr) AO_char_load_acquire_read(addr) # define AO_HAVE_char_load_dd_acquire_read # endif #else # if defined(AO_HAVE_char_load) # define AO_char_load_dd_acquire_read(addr) AO_char_load(addr) # define AO_HAVE_char_load_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* char_store */ #if defined(AO_HAVE_char_store_release) && !defined(AO_HAVE_char_store) # define AO_char_store(addr, val) AO_char_store_release(addr,val) # define AO_HAVE_char_store #endif #if defined(AO_HAVE_char_store_full) && !defined(AO_HAVE_char_store_release) # define AO_char_store_release(addr,val) AO_char_store_full(addr,val) # define AO_HAVE_char_store_release #endif #if defined(AO_HAVE_char_store_full) && !defined(AO_HAVE_char_store_write) # define AO_char_store_write(addr,val) AO_char_store_full(addr,val) # define AO_HAVE_char_store_write #endif #if defined(AO_HAVE_char_store_release) \ && !defined(AO_HAVE_char_store_release_write) # define AO_char_store_release_write(addr, val) \ AO_char_store_release(addr,val) # define AO_HAVE_char_store_release_write #endif #if defined(AO_HAVE_char_store_write) && !defined(AO_HAVE_char_store) # define AO_char_store(addr, val) AO_char_store_write(addr,val) # define AO_HAVE_char_store #endif #if defined(AO_HAVE_char_store) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_char_store_release) # define AO_char_store_release(addr,val) \ (AO_nop_full(), AO_char_store(addr,val)) # define AO_HAVE_char_store_release #endif #if defined(AO_HAVE_nop_write) && defined(AO_HAVE_char_store) \ && !defined(AO_HAVE_char_store_write) # define AO_char_store_write(addr, val) \ (AO_nop_write(), AO_char_store(addr,val)) # define AO_HAVE_char_store_write #endif #if defined(AO_HAVE_char_store_write) \ && !defined(AO_HAVE_char_store_release_write) # define AO_char_store_release_write(addr, val) AO_char_store_write(addr,val) # define AO_HAVE_char_store_release_write #endif #if defined(AO_HAVE_char_store_release) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_char_store_full) # define AO_char_store_full(addr, val) \ (AO_char_store_release(addr, val), AO_nop_full()) # define AO_HAVE_char_store_full #endif /* char_fetch_and_add */ #if defined(AO_HAVE_char_compare_and_swap_full) \ && !defined(AO_HAVE_char_fetch_and_add_full) AO_INLINE char AO_char_fetch_and_add_full(volatile unsigned char *addr, unsigned char incr) { unsigned char old; do { old = *addr; } while (!AO_char_compare_and_swap_full(addr, old, old+incr)); return old; } # define AO_HAVE_char_fetch_and_add_full #endif #if defined(AO_HAVE_char_compare_and_swap_acquire) \ && !defined(AO_HAVE_char_fetch_and_add_acquire) AO_INLINE char AO_char_fetch_and_add_acquire(volatile unsigned char *addr, unsigned char incr) { unsigned char old; do { old = *addr; } while (!AO_char_compare_and_swap_acquire(addr, old, old+incr)); return old; } # define AO_HAVE_char_fetch_and_add_acquire #endif #if defined(AO_HAVE_char_compare_and_swap_release) \ && !defined(AO_HAVE_char_fetch_and_add_release) AO_INLINE char AO_char_fetch_and_add_release(volatile unsigned char *addr, unsigned char incr) { unsigned char old; do { old = *addr; } while (!AO_char_compare_and_swap_release(addr, old, old+incr)); return old; } # define AO_HAVE_char_fetch_and_add_release #endif #if defined(AO_HAVE_char_fetch_and_add_full) # if !defined(AO_HAVE_char_fetch_and_add_release) # define AO_char_fetch_and_add_release(addr, val) \ AO_char_fetch_and_add_full(addr, val) # define AO_HAVE_char_fetch_and_add_release # endif # if !defined(AO_HAVE_char_fetch_and_add_acquire) # define AO_char_fetch_and_add_acquire(addr, val) \ AO_char_fetch_and_add_full(addr, val) # define AO_HAVE_char_fetch_and_add_acquire # endif # if !defined(AO_HAVE_char_fetch_and_add_write) # define AO_char_fetch_and_add_write(addr, val) \ AO_char_fetch_and_add_full(addr, val) # define AO_HAVE_char_fetch_and_add_write # endif # if !defined(AO_HAVE_char_fetch_and_add_read) # define AO_char_fetch_and_add_read(addr, val) \ AO_char_fetch_and_add_full(addr, val) # define AO_HAVE_char_fetch_and_add_read # endif #endif /* AO_HAVE_char_fetch_and_add_full */ #if !defined(AO_HAVE_char_fetch_and_add) \ && defined(AO_HAVE_char_fetch_and_add_release) # define AO_char_fetch_and_add(addr, val) \ AO_char_fetch_and_add_release(addr, val) # define AO_HAVE_char_fetch_and_add #endif #if !defined(AO_HAVE_char_fetch_and_add) \ && defined(AO_HAVE_char_fetch_and_add_acquire) # define AO_char_fetch_and_add(addr, val) \ AO_char_fetch_and_add_acquire(addr, val) # define AO_HAVE_char_fetch_and_add #endif #if !defined(AO_HAVE_char_fetch_and_add) \ && defined(AO_HAVE_char_fetch_and_add_write) # define AO_char_fetch_and_add(addr, val) \ AO_char_fetch_and_add_write(addr, val) # define AO_HAVE_char_fetch_and_add #endif #if !defined(AO_HAVE_char_fetch_and_add) \ && defined(AO_HAVE_char_fetch_and_add_read) # define AO_char_fetch_and_add(addr, val) \ AO_char_fetch_and_add_read(addr, val) # define AO_HAVE_char_fetch_and_add #endif #if defined(AO_HAVE_char_fetch_and_add_acquire) \ && defined(AO_HAVE_nop_full) && !defined(AO_HAVE_char_fetch_and_add_full) # define AO_char_fetch_and_add_full(addr, val) \ (AO_nop_full(), AO_char_fetch_and_add_acquire(addr, val)) # define AO_HAVE_char_fetch_and_add_full #endif #if !defined(AO_HAVE_char_fetch_and_add_release_write) \ && defined(AO_HAVE_char_fetch_and_add_write) # define AO_char_fetch_and_add_release_write(addr, val) \ AO_char_fetch_and_add_write(addr, val) # define AO_HAVE_char_fetch_and_add_release_write #endif #if !defined(AO_HAVE_char_fetch_and_add_release_write) \ && defined(AO_HAVE_char_fetch_and_add_release) # define AO_char_fetch_and_add_release_write(addr, val) \ AO_char_fetch_and_add_release(addr, val) # define AO_HAVE_char_fetch_and_add_release_write #endif #if !defined(AO_HAVE_char_fetch_and_add_acquire_read) \ && defined(AO_HAVE_char_fetch_and_add_read) # define AO_char_fetch_and_add_acquire_read(addr, val) \ AO_char_fetch_and_add_read(addr, val) # define AO_HAVE_char_fetch_and_add_acquire_read #endif #if !defined(AO_HAVE_char_fetch_and_add_acquire_read) \ && defined(AO_HAVE_char_fetch_and_add_acquire) # define AO_char_fetch_and_add_acquire_read(addr, val) \ AO_char_fetch_and_add_acquire(addr, val) # define AO_HAVE_char_fetch_and_add_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_char_fetch_and_add_acquire_read) # define AO_char_fetch_and_add_dd_acquire_read(addr, val) \ AO_char_fetch_and_add_acquire_read(addr, val) # define AO_HAVE_char_fetch_and_add_dd_acquire_read # endif #else # if defined(AO_HAVE_char_fetch_and_add) # define AO_char_fetch_and_add_dd_acquire_read(addr, val) \ AO_char_fetch_and_add(addr, val) # define AO_HAVE_char_fetch_and_add_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* char_fetch_and_add1 */ #if defined(AO_HAVE_char_fetch_and_add_full) \ && !defined(AO_HAVE_char_fetch_and_add1_full) # define AO_char_fetch_and_add1_full(addr) \ AO_char_fetch_and_add_full(addr,1) # define AO_HAVE_char_fetch_and_add1_full #endif #if defined(AO_HAVE_char_fetch_and_add_release) \ && !defined(AO_HAVE_char_fetch_and_add1_release) # define AO_char_fetch_and_add1_release(addr) \ AO_char_fetch_and_add_release(addr,1) # define AO_HAVE_char_fetch_and_add1_release #endif #if defined(AO_HAVE_char_fetch_and_add_acquire) \ && !defined(AO_HAVE_char_fetch_and_add1_acquire) # define AO_char_fetch_and_add1_acquire(addr) \ AO_char_fetch_and_add_acquire(addr,1) # define AO_HAVE_char_fetch_and_add1_acquire #endif #if defined(AO_HAVE_char_fetch_and_add_write) \ && !defined(AO_HAVE_char_fetch_and_add1_write) # define AO_char_fetch_and_add1_write(addr) \ AO_char_fetch_and_add_write(addr,1) # define AO_HAVE_char_fetch_and_add1_write #endif #if defined(AO_HAVE_char_fetch_and_add_read) \ && !defined(AO_HAVE_char_fetch_and_add1_read) # define AO_char_fetch_and_add1_read(addr) \ AO_char_fetch_and_add_read(addr,1) # define AO_HAVE_char_fetch_and_add1_read #endif #if defined(AO_HAVE_char_fetch_and_add_release_write) \ && !defined(AO_HAVE_char_fetch_and_add1_release_write) # define AO_char_fetch_and_add1_release_write(addr) \ AO_char_fetch_and_add_release_write(addr,1) # define AO_HAVE_char_fetch_and_add1_release_write #endif #if defined(AO_HAVE_char_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_char_fetch_and_add1_acquire_read) # define AO_char_fetch_and_add1_acquire_read(addr) \ AO_char_fetch_and_add_acquire_read(addr,1) # define AO_HAVE_char_fetch_and_add1_acquire_read #endif #if defined(AO_HAVE_char_fetch_and_add) \ && !defined(AO_HAVE_char_fetch_and_add1) # define AO_char_fetch_and_add1(addr) AO_char_fetch_and_add(addr,1) # define AO_HAVE_char_fetch_and_add1 #endif #if defined(AO_HAVE_char_fetch_and_add1_full) # if !defined(AO_HAVE_char_fetch_and_add1_release) # define AO_char_fetch_and_add1_release(addr) \ AO_char_fetch_and_add1_full(addr) # define AO_HAVE_char_fetch_and_add1_release # endif # if !defined(AO_HAVE_char_fetch_and_add1_acquire) # define AO_char_fetch_and_add1_acquire(addr) \ AO_char_fetch_and_add1_full(addr) # define AO_HAVE_char_fetch_and_add1_acquire # endif # if !defined(AO_HAVE_char_fetch_and_add1_write) # define AO_char_fetch_and_add1_write(addr) \ AO_char_fetch_and_add1_full(addr) # define AO_HAVE_char_fetch_and_add1_write # endif # if !defined(AO_HAVE_char_fetch_and_add1_read) # define AO_char_fetch_and_add1_read(addr) \ AO_char_fetch_and_add1_full(addr) # define AO_HAVE_char_fetch_and_add1_read # endif #endif /* AO_HAVE_char_fetch_and_add1_full */ #if !defined(AO_HAVE_char_fetch_and_add1) \ && defined(AO_HAVE_char_fetch_and_add1_release) # define AO_char_fetch_and_add1(addr) AO_char_fetch_and_add1_release(addr) # define AO_HAVE_char_fetch_and_add1 #endif #if !defined(AO_HAVE_char_fetch_and_add1) \ && defined(AO_HAVE_char_fetch_and_add1_acquire) # define AO_char_fetch_and_add1(addr) AO_char_fetch_and_add1_acquire(addr) # define AO_HAVE_char_fetch_and_add1 #endif #if !defined(AO_HAVE_char_fetch_and_add1) \ && defined(AO_HAVE_char_fetch_and_add1_write) # define AO_char_fetch_and_add1(addr) AO_char_fetch_and_add1_write(addr) # define AO_HAVE_char_fetch_and_add1 #endif #if !defined(AO_HAVE_char_fetch_and_add1) \ && defined(AO_HAVE_char_fetch_and_add1_read) # define AO_char_fetch_and_add1(addr) AO_char_fetch_and_add1_read(addr) # define AO_HAVE_char_fetch_and_add1 #endif #if defined(AO_HAVE_char_fetch_and_add1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_char_fetch_and_add1_full) # define AO_char_fetch_and_add1_full(addr) \ (AO_nop_full(), AO_char_fetch_and_add1_acquire(addr)) # define AO_HAVE_char_fetch_and_add1_full #endif #if !defined(AO_HAVE_char_fetch_and_add1_release_write) \ && defined(AO_HAVE_char_fetch_and_add1_write) # define AO_char_fetch_and_add1_release_write(addr) \ AO_char_fetch_and_add1_write(addr) # define AO_HAVE_char_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_char_fetch_and_add1_release_write) \ && defined(AO_HAVE_char_fetch_and_add1_release) # define AO_char_fetch_and_add1_release_write(addr) \ AO_char_fetch_and_add1_release(addr) # define AO_HAVE_char_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_char_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_char_fetch_and_add1_read) # define AO_char_fetch_and_add1_acquire_read(addr) \ AO_char_fetch_and_add1_read(addr) # define AO_HAVE_char_fetch_and_add1_acquire_read #endif #if !defined(AO_HAVE_char_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_char_fetch_and_add1_acquire) # define AO_char_fetch_and_add1_acquire_read(addr) \ AO_char_fetch_and_add1_acquire(addr) # define AO_HAVE_char_fetch_and_add1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_char_fetch_and_add1_acquire_read) # define AO_char_fetch_and_add1_dd_acquire_read(addr) \ AO_char_fetch_and_add1_acquire_read(addr) # define AO_HAVE_char_fetch_and_add1_dd_acquire_read # endif #else # if defined(AO_HAVE_char_fetch_and_add1) # define AO_char_fetch_and_add1_dd_acquire_read(addr) \ AO_char_fetch_and_add1(addr) # define AO_HAVE_char_fetch_and_add1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* char_fetch_and_sub1 */ #if defined(AO_HAVE_char_fetch_and_add_full) \ && !defined(AO_HAVE_char_fetch_and_sub1_full) # define AO_char_fetch_and_sub1_full(addr) \ AO_char_fetch_and_add_full(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1_full #endif #if defined(AO_HAVE_char_fetch_and_add_release) \ && !defined(AO_HAVE_char_fetch_and_sub1_release) # define AO_char_fetch_and_sub1_release(addr) \ AO_char_fetch_and_add_release(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1_release #endif #if defined(AO_HAVE_char_fetch_and_add_acquire) \ && !defined(AO_HAVE_char_fetch_and_sub1_acquire) # define AO_char_fetch_and_sub1_acquire(addr) \ AO_char_fetch_and_add_acquire(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1_acquire #endif #if defined(AO_HAVE_char_fetch_and_add_write) \ && !defined(AO_HAVE_char_fetch_and_sub1_write) # define AO_char_fetch_and_sub1_write(addr) \ AO_char_fetch_and_add_write(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1_write #endif #if defined(AO_HAVE_char_fetch_and_add_read) \ && !defined(AO_HAVE_char_fetch_and_sub1_read) # define AO_char_fetch_and_sub1_read(addr) \ AO_char_fetch_and_add_read(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1_read #endif #if defined(AO_HAVE_char_fetch_and_add_release_write) \ && !defined(AO_HAVE_char_fetch_and_sub1_release_write) # define AO_char_fetch_and_sub1_release_write(addr) \ AO_char_fetch_and_add_release_write(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1_release_write #endif #if defined(AO_HAVE_char_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_char_fetch_and_sub1_acquire_read) # define AO_char_fetch_and_sub1_acquire_read(addr) \ AO_char_fetch_and_add_acquire_read(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1_acquire_read #endif #if defined(AO_HAVE_char_fetch_and_add) \ && !defined(AO_HAVE_char_fetch_and_sub1) # define AO_char_fetch_and_sub1(addr) \ AO_char_fetch_and_add(addr,(unsigned char)(-1)) # define AO_HAVE_char_fetch_and_sub1 #endif #if defined(AO_HAVE_char_fetch_and_sub1_full) # if !defined(AO_HAVE_char_fetch_and_sub1_release) # define AO_char_fetch_and_sub1_release(addr) \ AO_char_fetch_and_sub1_full(addr) # define AO_HAVE_char_fetch_and_sub1_release # endif # if !defined(AO_HAVE_char_fetch_and_sub1_acquire) # define AO_char_fetch_and_sub1_acquire(addr) \ AO_char_fetch_and_sub1_full(addr) # define AO_HAVE_char_fetch_and_sub1_acquire # endif # if !defined(AO_HAVE_char_fetch_and_sub1_write) # define AO_char_fetch_and_sub1_write(addr) \ AO_char_fetch_and_sub1_full(addr) # define AO_HAVE_char_fetch_and_sub1_write # endif # if !defined(AO_HAVE_char_fetch_and_sub1_read) # define AO_char_fetch_and_sub1_read(addr) \ AO_char_fetch_and_sub1_full(addr) # define AO_HAVE_char_fetch_and_sub1_read # endif #endif /* AO_HAVE_char_fetch_and_sub1_full */ #if !defined(AO_HAVE_char_fetch_and_sub1) \ && defined(AO_HAVE_char_fetch_and_sub1_release) # define AO_char_fetch_and_sub1(addr) AO_char_fetch_and_sub1_release(addr) # define AO_HAVE_char_fetch_and_sub1 #endif #if !defined(AO_HAVE_char_fetch_and_sub1) \ && defined(AO_HAVE_char_fetch_and_sub1_acquire) # define AO_char_fetch_and_sub1(addr) AO_char_fetch_and_sub1_acquire(addr) # define AO_HAVE_char_fetch_and_sub1 #endif #if !defined(AO_HAVE_char_fetch_and_sub1) \ && defined(AO_HAVE_char_fetch_and_sub1_write) # define AO_char_fetch_and_sub1(addr) AO_char_fetch_and_sub1_write(addr) # define AO_HAVE_char_fetch_and_sub1 #endif #if !defined(AO_HAVE_char_fetch_and_sub1) \ && defined(AO_HAVE_char_fetch_and_sub1_read) # define AO_char_fetch_and_sub1(addr) AO_char_fetch_and_sub1_read(addr) # define AO_HAVE_char_fetch_and_sub1 #endif #if defined(AO_HAVE_char_fetch_and_sub1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_char_fetch_and_sub1_full) # define AO_char_fetch_and_sub1_full(addr) \ (AO_nop_full(), AO_char_fetch_and_sub1_acquire(addr)) # define AO_HAVE_char_fetch_and_sub1_full #endif #if !defined(AO_HAVE_char_fetch_and_sub1_release_write) \ && defined(AO_HAVE_char_fetch_and_sub1_write) # define AO_char_fetch_and_sub1_release_write(addr) \ AO_char_fetch_and_sub1_write(addr) # define AO_HAVE_char_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_char_fetch_and_sub1_release_write) \ && defined(AO_HAVE_char_fetch_and_sub1_release) # define AO_char_fetch_and_sub1_release_write(addr) \ AO_char_fetch_and_sub1_release(addr) # define AO_HAVE_char_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_char_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_char_fetch_and_sub1_read) # define AO_char_fetch_and_sub1_acquire_read(addr) \ AO_char_fetch_and_sub1_read(addr) # define AO_HAVE_char_fetch_and_sub1_acquire_read #endif #if !defined(AO_HAVE_char_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_char_fetch_and_sub1_acquire) # define AO_char_fetch_and_sub1_acquire_read(addr) \ AO_char_fetch_and_sub1_acquire(addr) # define AO_HAVE_char_fetch_and_sub1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_char_fetch_and_sub1_acquire_read) # define AO_char_fetch_and_sub1_dd_acquire_read(addr) \ AO_char_fetch_and_sub1_acquire_read(addr) # define AO_HAVE_char_fetch_and_sub1_dd_acquire_read # endif #else # if defined(AO_HAVE_char_fetch_and_sub1) # define AO_char_fetch_and_sub1_dd_acquire_read(addr) \ AO_char_fetch_and_sub1(addr) # define AO_HAVE_char_fetch_and_sub1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* short_load */ #if defined(AO_HAVE_short_load_acquire) && !defined(AO_HAVE_short_load) # define AO_short_load(addr) AO_short_load_acquire(addr) # define AO_HAVE_short_load #endif #if defined(AO_HAVE_short_load_full) && !defined(AO_HAVE_short_load_acquire) # define AO_short_load_acquire(addr) AO_short_load_full(addr) # define AO_HAVE_short_load_acquire #endif #if defined(AO_HAVE_short_load_full) && !defined(AO_HAVE_short_load_read) # define AO_short_load_read(addr) AO_short_load_full(addr) # define AO_HAVE_short_load_read #endif #if !defined(AO_HAVE_short_load_acquire_read) \ && defined(AO_HAVE_short_load_acquire) # define AO_short_load_acquire_read(addr) AO_short_load_acquire(addr) # define AO_HAVE_short_load_acquire_read #endif #if defined(AO_HAVE_short_load) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_short_load_acquire) AO_INLINE unsigned short AO_short_load_acquire(const volatile unsigned short *addr) { unsigned short result = AO_short_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_full(); return result; } # define AO_HAVE_short_load_acquire #endif #if defined(AO_HAVE_short_load) && defined(AO_HAVE_nop_read) \ && !defined(AO_HAVE_short_load_read) AO_INLINE unsigned short AO_short_load_read(const volatile unsigned short *addr) { unsigned short result = AO_short_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_read(); return result; } # define AO_HAVE_short_load_read #endif #if defined(AO_HAVE_short_load_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_short_load_full) # define AO_short_load_full(addr) (AO_nop_full(), AO_short_load_acquire(addr)) # define AO_HAVE_short_load_full #endif #if !defined(AO_HAVE_short_load_acquire_read) \ && defined(AO_HAVE_short_load_read) # define AO_short_load_acquire_read(addr) AO_short_load_read(addr) # define AO_HAVE_short_load_acquire_read #endif #if defined(AO_HAVE_short_load_acquire_read) && !defined(AO_HAVE_short_load) # define AO_short_load(addr) AO_short_load_acquire_read(addr) # define AO_HAVE_short_load #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_short_load_acquire_read) # define AO_short_load_dd_acquire_read(addr) AO_short_load_acquire_read(addr) # define AO_HAVE_short_load_dd_acquire_read # endif #else # if defined(AO_HAVE_short_load) # define AO_short_load_dd_acquire_read(addr) AO_short_load(addr) # define AO_HAVE_short_load_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* short_store */ #if defined(AO_HAVE_short_store_release) && !defined(AO_HAVE_short_store) # define AO_short_store(addr, val) AO_short_store_release(addr,val) # define AO_HAVE_short_store #endif #if defined(AO_HAVE_short_store_full) && !defined(AO_HAVE_short_store_release) # define AO_short_store_release(addr,val) AO_short_store_full(addr,val) # define AO_HAVE_short_store_release #endif #if defined(AO_HAVE_short_store_full) && !defined(AO_HAVE_short_store_write) # define AO_short_store_write(addr,val) AO_short_store_full(addr,val) # define AO_HAVE_short_store_write #endif #if defined(AO_HAVE_short_store_release) \ && !defined(AO_HAVE_short_store_release_write) # define AO_short_store_release_write(addr, val) \ AO_short_store_release(addr,val) # define AO_HAVE_short_store_release_write #endif #if defined(AO_HAVE_short_store_write) && !defined(AO_HAVE_short_store) # define AO_short_store(addr, val) AO_short_store_write(addr,val) # define AO_HAVE_short_store #endif #if defined(AO_HAVE_short_store) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_short_store_release) # define AO_short_store_release(addr,val) \ (AO_nop_full(), AO_short_store(addr,val)) # define AO_HAVE_short_store_release #endif #if defined(AO_HAVE_nop_write) && defined(AO_HAVE_short_store) \ && !defined(AO_HAVE_short_store_write) # define AO_short_store_write(addr, val) \ (AO_nop_write(), AO_short_store(addr,val)) # define AO_HAVE_short_store_write #endif #if defined(AO_HAVE_short_store_write) \ && !defined(AO_HAVE_short_store_release_write) # define AO_short_store_release_write(addr, val) AO_short_store_write(addr,val) # define AO_HAVE_short_store_release_write #endif #if defined(AO_HAVE_short_store_release) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_short_store_full) # define AO_short_store_full(addr, val) \ (AO_short_store_release(addr, val), AO_nop_full()) # define AO_HAVE_short_store_full #endif /* short_fetch_and_add */ #if defined(AO_HAVE_short_compare_and_swap_full) \ && !defined(AO_HAVE_short_fetch_and_add_full) AO_INLINE short AO_short_fetch_and_add_full(volatile unsigned short *addr, unsigned short incr) { unsigned short old; do { old = *addr; } while (!AO_short_compare_and_swap_full(addr, old, old+incr)); return old; } # define AO_HAVE_short_fetch_and_add_full #endif #if defined(AO_HAVE_short_compare_and_swap_acquire) \ && !defined(AO_HAVE_short_fetch_and_add_acquire) AO_INLINE short AO_short_fetch_and_add_acquire(volatile unsigned short *addr, unsigned short incr) { unsigned short old; do { old = *addr; } while (!AO_short_compare_and_swap_acquire(addr, old, old+incr)); return old; } # define AO_HAVE_short_fetch_and_add_acquire #endif #if defined(AO_HAVE_short_compare_and_swap_release) \ && !defined(AO_HAVE_short_fetch_and_add_release) AO_INLINE short AO_short_fetch_and_add_release(volatile unsigned short *addr, unsigned short incr) { unsigned short old; do { old = *addr; } while (!AO_short_compare_and_swap_release(addr, old, old+incr)); return old; } # define AO_HAVE_short_fetch_and_add_release #endif #if defined(AO_HAVE_short_fetch_and_add_full) # if !defined(AO_HAVE_short_fetch_and_add_release) # define AO_short_fetch_and_add_release(addr, val) \ AO_short_fetch_and_add_full(addr, val) # define AO_HAVE_short_fetch_and_add_release # endif # if !defined(AO_HAVE_short_fetch_and_add_acquire) # define AO_short_fetch_and_add_acquire(addr, val) \ AO_short_fetch_and_add_full(addr, val) # define AO_HAVE_short_fetch_and_add_acquire # endif # if !defined(AO_HAVE_short_fetch_and_add_write) # define AO_short_fetch_and_add_write(addr, val) \ AO_short_fetch_and_add_full(addr, val) # define AO_HAVE_short_fetch_and_add_write # endif # if !defined(AO_HAVE_short_fetch_and_add_read) # define AO_short_fetch_and_add_read(addr, val) \ AO_short_fetch_and_add_full(addr, val) # define AO_HAVE_short_fetch_and_add_read # endif #endif /* AO_HAVE_short_fetch_and_add_full */ #if !defined(AO_HAVE_short_fetch_and_add) \ && defined(AO_HAVE_short_fetch_and_add_release) # define AO_short_fetch_and_add(addr, val) \ AO_short_fetch_and_add_release(addr, val) # define AO_HAVE_short_fetch_and_add #endif #if !defined(AO_HAVE_short_fetch_and_add) \ && defined(AO_HAVE_short_fetch_and_add_acquire) # define AO_short_fetch_and_add(addr, val) \ AO_short_fetch_and_add_acquire(addr, val) # define AO_HAVE_short_fetch_and_add #endif #if !defined(AO_HAVE_short_fetch_and_add) \ && defined(AO_HAVE_short_fetch_and_add_write) # define AO_short_fetch_and_add(addr, val) \ AO_short_fetch_and_add_write(addr, val) # define AO_HAVE_short_fetch_and_add #endif #if !defined(AO_HAVE_short_fetch_and_add) \ && defined(AO_HAVE_short_fetch_and_add_read) # define AO_short_fetch_and_add(addr, val) \ AO_short_fetch_and_add_read(addr, val) # define AO_HAVE_short_fetch_and_add #endif #if defined(AO_HAVE_short_fetch_and_add_acquire) \ && defined(AO_HAVE_nop_full) && !defined(AO_HAVE_short_fetch_and_add_full) # define AO_short_fetch_and_add_full(addr, val) \ (AO_nop_full(), AO_short_fetch_and_add_acquire(addr, val)) # define AO_HAVE_short_fetch_and_add_full #endif #if !defined(AO_HAVE_short_fetch_and_add_release_write) \ && defined(AO_HAVE_short_fetch_and_add_write) # define AO_short_fetch_and_add_release_write(addr, val) \ AO_short_fetch_and_add_write(addr, val) # define AO_HAVE_short_fetch_and_add_release_write #endif #if !defined(AO_HAVE_short_fetch_and_add_release_write) \ && defined(AO_HAVE_short_fetch_and_add_release) # define AO_short_fetch_and_add_release_write(addr, val) \ AO_short_fetch_and_add_release(addr, val) # define AO_HAVE_short_fetch_and_add_release_write #endif #if !defined(AO_HAVE_short_fetch_and_add_acquire_read) \ && defined(AO_HAVE_short_fetch_and_add_read) # define AO_short_fetch_and_add_acquire_read(addr, val) \ AO_short_fetch_and_add_read(addr, val) # define AO_HAVE_short_fetch_and_add_acquire_read #endif #if !defined(AO_HAVE_short_fetch_and_add_acquire_read) \ && defined(AO_HAVE_short_fetch_and_add_acquire) # define AO_short_fetch_and_add_acquire_read(addr, val) \ AO_short_fetch_and_add_acquire(addr, val) # define AO_HAVE_short_fetch_and_add_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_short_fetch_and_add_acquire_read) # define AO_short_fetch_and_add_dd_acquire_read(addr, val) \ AO_short_fetch_and_add_acquire_read(addr, val) # define AO_HAVE_short_fetch_and_add_dd_acquire_read # endif #else # if defined(AO_HAVE_short_fetch_and_add) # define AO_short_fetch_and_add_dd_acquire_read(addr, val) \ AO_short_fetch_and_add(addr, val) # define AO_HAVE_short_fetch_and_add_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* short_fetch_and_add1 */ #if defined(AO_HAVE_short_fetch_and_add_full) \ && !defined(AO_HAVE_short_fetch_and_add1_full) # define AO_short_fetch_and_add1_full(addr) \ AO_short_fetch_and_add_full(addr,1) # define AO_HAVE_short_fetch_and_add1_full #endif #if defined(AO_HAVE_short_fetch_and_add_release) \ && !defined(AO_HAVE_short_fetch_and_add1_release) # define AO_short_fetch_and_add1_release(addr) \ AO_short_fetch_and_add_release(addr,1) # define AO_HAVE_short_fetch_and_add1_release #endif #if defined(AO_HAVE_short_fetch_and_add_acquire) \ && !defined(AO_HAVE_short_fetch_and_add1_acquire) # define AO_short_fetch_and_add1_acquire(addr) \ AO_short_fetch_and_add_acquire(addr,1) # define AO_HAVE_short_fetch_and_add1_acquire #endif #if defined(AO_HAVE_short_fetch_and_add_write) \ && !defined(AO_HAVE_short_fetch_and_add1_write) # define AO_short_fetch_and_add1_write(addr) \ AO_short_fetch_and_add_write(addr,1) # define AO_HAVE_short_fetch_and_add1_write #endif #if defined(AO_HAVE_short_fetch_and_add_read) \ && !defined(AO_HAVE_short_fetch_and_add1_read) # define AO_short_fetch_and_add1_read(addr) \ AO_short_fetch_and_add_read(addr,1) # define AO_HAVE_short_fetch_and_add1_read #endif #if defined(AO_HAVE_short_fetch_and_add_release_write) \ && !defined(AO_HAVE_short_fetch_and_add1_release_write) # define AO_short_fetch_and_add1_release_write(addr) \ AO_short_fetch_and_add_release_write(addr,1) # define AO_HAVE_short_fetch_and_add1_release_write #endif #if defined(AO_HAVE_short_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_short_fetch_and_add1_acquire_read) # define AO_short_fetch_and_add1_acquire_read(addr) \ AO_short_fetch_and_add_acquire_read(addr,1) # define AO_HAVE_short_fetch_and_add1_acquire_read #endif #if defined(AO_HAVE_short_fetch_and_add) \ && !defined(AO_HAVE_short_fetch_and_add1) # define AO_short_fetch_and_add1(addr) AO_short_fetch_and_add(addr,1) # define AO_HAVE_short_fetch_and_add1 #endif #if defined(AO_HAVE_short_fetch_and_add1_full) # if !defined(AO_HAVE_short_fetch_and_add1_release) # define AO_short_fetch_and_add1_release(addr) \ AO_short_fetch_and_add1_full(addr) # define AO_HAVE_short_fetch_and_add1_release # endif # if !defined(AO_HAVE_short_fetch_and_add1_acquire) # define AO_short_fetch_and_add1_acquire(addr) \ AO_short_fetch_and_add1_full(addr) # define AO_HAVE_short_fetch_and_add1_acquire # endif # if !defined(AO_HAVE_short_fetch_and_add1_write) # define AO_short_fetch_and_add1_write(addr) \ AO_short_fetch_and_add1_full(addr) # define AO_HAVE_short_fetch_and_add1_write # endif # if !defined(AO_HAVE_short_fetch_and_add1_read) # define AO_short_fetch_and_add1_read(addr) \ AO_short_fetch_and_add1_full(addr) # define AO_HAVE_short_fetch_and_add1_read # endif #endif /* AO_HAVE_short_fetch_and_add1_full */ #if !defined(AO_HAVE_short_fetch_and_add1) \ && defined(AO_HAVE_short_fetch_and_add1_release) # define AO_short_fetch_and_add1(addr) AO_short_fetch_and_add1_release(addr) # define AO_HAVE_short_fetch_and_add1 #endif #if !defined(AO_HAVE_short_fetch_and_add1) \ && defined(AO_HAVE_short_fetch_and_add1_acquire) # define AO_short_fetch_and_add1(addr) AO_short_fetch_and_add1_acquire(addr) # define AO_HAVE_short_fetch_and_add1 #endif #if !defined(AO_HAVE_short_fetch_and_add1) \ && defined(AO_HAVE_short_fetch_and_add1_write) # define AO_short_fetch_and_add1(addr) AO_short_fetch_and_add1_write(addr) # define AO_HAVE_short_fetch_and_add1 #endif #if !defined(AO_HAVE_short_fetch_and_add1) \ && defined(AO_HAVE_short_fetch_and_add1_read) # define AO_short_fetch_and_add1(addr) AO_short_fetch_and_add1_read(addr) # define AO_HAVE_short_fetch_and_add1 #endif #if defined(AO_HAVE_short_fetch_and_add1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_short_fetch_and_add1_full) # define AO_short_fetch_and_add1_full(addr) \ (AO_nop_full(), AO_short_fetch_and_add1_acquire(addr)) # define AO_HAVE_short_fetch_and_add1_full #endif #if !defined(AO_HAVE_short_fetch_and_add1_release_write) \ && defined(AO_HAVE_short_fetch_and_add1_write) # define AO_short_fetch_and_add1_release_write(addr) \ AO_short_fetch_and_add1_write(addr) # define AO_HAVE_short_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_short_fetch_and_add1_release_write) \ && defined(AO_HAVE_short_fetch_and_add1_release) # define AO_short_fetch_and_add1_release_write(addr) \ AO_short_fetch_and_add1_release(addr) # define AO_HAVE_short_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_short_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_short_fetch_and_add1_read) # define AO_short_fetch_and_add1_acquire_read(addr) \ AO_short_fetch_and_add1_read(addr) # define AO_HAVE_short_fetch_and_add1_acquire_read #endif #if !defined(AO_HAVE_short_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_short_fetch_and_add1_acquire) # define AO_short_fetch_and_add1_acquire_read(addr) \ AO_short_fetch_and_add1_acquire(addr) # define AO_HAVE_short_fetch_and_add1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_short_fetch_and_add1_acquire_read) # define AO_short_fetch_and_add1_dd_acquire_read(addr) \ AO_short_fetch_and_add1_acquire_read(addr) # define AO_HAVE_short_fetch_and_add1_dd_acquire_read # endif #else # if defined(AO_HAVE_short_fetch_and_add1) # define AO_short_fetch_and_add1_dd_acquire_read(addr) \ AO_short_fetch_and_add1(addr) # define AO_HAVE_short_fetch_and_add1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* short_fetch_and_sub1 */ #if defined(AO_HAVE_short_fetch_and_add_full) \ && !defined(AO_HAVE_short_fetch_and_sub1_full) # define AO_short_fetch_and_sub1_full(addr) \ AO_short_fetch_and_add_full(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1_full #endif #if defined(AO_HAVE_short_fetch_and_add_release) \ && !defined(AO_HAVE_short_fetch_and_sub1_release) # define AO_short_fetch_and_sub1_release(addr) \ AO_short_fetch_and_add_release(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1_release #endif #if defined(AO_HAVE_short_fetch_and_add_acquire) \ && !defined(AO_HAVE_short_fetch_and_sub1_acquire) # define AO_short_fetch_and_sub1_acquire(addr) \ AO_short_fetch_and_add_acquire(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1_acquire #endif #if defined(AO_HAVE_short_fetch_and_add_write) \ && !defined(AO_HAVE_short_fetch_and_sub1_write) # define AO_short_fetch_and_sub1_write(addr) \ AO_short_fetch_and_add_write(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1_write #endif #if defined(AO_HAVE_short_fetch_and_add_read) \ && !defined(AO_HAVE_short_fetch_and_sub1_read) # define AO_short_fetch_and_sub1_read(addr) \ AO_short_fetch_and_add_read(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1_read #endif #if defined(AO_HAVE_short_fetch_and_add_release_write) \ && !defined(AO_HAVE_short_fetch_and_sub1_release_write) # define AO_short_fetch_and_sub1_release_write(addr) \ AO_short_fetch_and_add_release_write(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1_release_write #endif #if defined(AO_HAVE_short_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_short_fetch_and_sub1_acquire_read) # define AO_short_fetch_and_sub1_acquire_read(addr) \ AO_short_fetch_and_add_acquire_read(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1_acquire_read #endif #if defined(AO_HAVE_short_fetch_and_add) \ && !defined(AO_HAVE_short_fetch_and_sub1) # define AO_short_fetch_and_sub1(addr) \ AO_short_fetch_and_add(addr,(unsigned short)(-1)) # define AO_HAVE_short_fetch_and_sub1 #endif #if defined(AO_HAVE_short_fetch_and_sub1_full) # if !defined(AO_HAVE_short_fetch_and_sub1_release) # define AO_short_fetch_and_sub1_release(addr) \ AO_short_fetch_and_sub1_full(addr) # define AO_HAVE_short_fetch_and_sub1_release # endif # if !defined(AO_HAVE_short_fetch_and_sub1_acquire) # define AO_short_fetch_and_sub1_acquire(addr) \ AO_short_fetch_and_sub1_full(addr) # define AO_HAVE_short_fetch_and_sub1_acquire # endif # if !defined(AO_HAVE_short_fetch_and_sub1_write) # define AO_short_fetch_and_sub1_write(addr) \ AO_short_fetch_and_sub1_full(addr) # define AO_HAVE_short_fetch_and_sub1_write # endif # if !defined(AO_HAVE_short_fetch_and_sub1_read) # define AO_short_fetch_and_sub1_read(addr) \ AO_short_fetch_and_sub1_full(addr) # define AO_HAVE_short_fetch_and_sub1_read # endif #endif /* AO_HAVE_short_fetch_and_sub1_full */ #if !defined(AO_HAVE_short_fetch_and_sub1) \ && defined(AO_HAVE_short_fetch_and_sub1_release) # define AO_short_fetch_and_sub1(addr) AO_short_fetch_and_sub1_release(addr) # define AO_HAVE_short_fetch_and_sub1 #endif #if !defined(AO_HAVE_short_fetch_and_sub1) \ && defined(AO_HAVE_short_fetch_and_sub1_acquire) # define AO_short_fetch_and_sub1(addr) AO_short_fetch_and_sub1_acquire(addr) # define AO_HAVE_short_fetch_and_sub1 #endif #if !defined(AO_HAVE_short_fetch_and_sub1) \ && defined(AO_HAVE_short_fetch_and_sub1_write) # define AO_short_fetch_and_sub1(addr) AO_short_fetch_and_sub1_write(addr) # define AO_HAVE_short_fetch_and_sub1 #endif #if !defined(AO_HAVE_short_fetch_and_sub1) \ && defined(AO_HAVE_short_fetch_and_sub1_read) # define AO_short_fetch_and_sub1(addr) AO_short_fetch_and_sub1_read(addr) # define AO_HAVE_short_fetch_and_sub1 #endif #if defined(AO_HAVE_short_fetch_and_sub1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_short_fetch_and_sub1_full) # define AO_short_fetch_and_sub1_full(addr) \ (AO_nop_full(), AO_short_fetch_and_sub1_acquire(addr)) # define AO_HAVE_short_fetch_and_sub1_full #endif #if !defined(AO_HAVE_short_fetch_and_sub1_release_write) \ && defined(AO_HAVE_short_fetch_and_sub1_write) # define AO_short_fetch_and_sub1_release_write(addr) \ AO_short_fetch_and_sub1_write(addr) # define AO_HAVE_short_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_short_fetch_and_sub1_release_write) \ && defined(AO_HAVE_short_fetch_and_sub1_release) # define AO_short_fetch_and_sub1_release_write(addr) \ AO_short_fetch_and_sub1_release(addr) # define AO_HAVE_short_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_short_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_short_fetch_and_sub1_read) # define AO_short_fetch_and_sub1_acquire_read(addr) \ AO_short_fetch_and_sub1_read(addr) # define AO_HAVE_short_fetch_and_sub1_acquire_read #endif #if !defined(AO_HAVE_short_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_short_fetch_and_sub1_acquire) # define AO_short_fetch_and_sub1_acquire_read(addr) \ AO_short_fetch_and_sub1_acquire(addr) # define AO_HAVE_short_fetch_and_sub1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_short_fetch_and_sub1_acquire_read) # define AO_short_fetch_and_sub1_dd_acquire_read(addr) \ AO_short_fetch_and_sub1_acquire_read(addr) # define AO_HAVE_short_fetch_and_sub1_dd_acquire_read # endif #else # if defined(AO_HAVE_short_fetch_and_sub1) # define AO_short_fetch_and_sub1_dd_acquire_read(addr) \ AO_short_fetch_and_sub1(addr) # define AO_HAVE_short_fetch_and_sub1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* int_load */ #if defined(AO_HAVE_int_load_acquire) && !defined(AO_HAVE_int_load) # define AO_int_load(addr) AO_int_load_acquire(addr) # define AO_HAVE_int_load #endif #if defined(AO_HAVE_int_load_full) && !defined(AO_HAVE_int_load_acquire) # define AO_int_load_acquire(addr) AO_int_load_full(addr) # define AO_HAVE_int_load_acquire #endif #if defined(AO_HAVE_int_load_full) && !defined(AO_HAVE_int_load_read) # define AO_int_load_read(addr) AO_int_load_full(addr) # define AO_HAVE_int_load_read #endif #if !defined(AO_HAVE_int_load_acquire_read) \ && defined(AO_HAVE_int_load_acquire) # define AO_int_load_acquire_read(addr) AO_int_load_acquire(addr) # define AO_HAVE_int_load_acquire_read #endif #if defined(AO_HAVE_int_load) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_int_load_acquire) AO_INLINE unsigned int AO_int_load_acquire(const volatile unsigned int *addr) { unsigned int result = AO_int_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_full(); return result; } # define AO_HAVE_int_load_acquire #endif #if defined(AO_HAVE_int_load) && defined(AO_HAVE_nop_read) \ && !defined(AO_HAVE_int_load_read) AO_INLINE unsigned int AO_int_load_read(const volatile unsigned int *addr) { unsigned int result = AO_int_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_read(); return result; } # define AO_HAVE_int_load_read #endif #if defined(AO_HAVE_int_load_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_int_load_full) # define AO_int_load_full(addr) (AO_nop_full(), AO_int_load_acquire(addr)) # define AO_HAVE_int_load_full #endif #if !defined(AO_HAVE_int_load_acquire_read) \ && defined(AO_HAVE_int_load_read) # define AO_int_load_acquire_read(addr) AO_int_load_read(addr) # define AO_HAVE_int_load_acquire_read #endif #if defined(AO_HAVE_int_load_acquire_read) && !defined(AO_HAVE_int_load) # define AO_int_load(addr) AO_int_load_acquire_read(addr) # define AO_HAVE_int_load #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_int_load_acquire_read) # define AO_int_load_dd_acquire_read(addr) AO_int_load_acquire_read(addr) # define AO_HAVE_int_load_dd_acquire_read # endif #else # if defined(AO_HAVE_int_load) # define AO_int_load_dd_acquire_read(addr) AO_int_load(addr) # define AO_HAVE_int_load_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* int_store */ #if defined(AO_HAVE_int_store_release) && !defined(AO_HAVE_int_store) # define AO_int_store(addr, val) AO_int_store_release(addr,val) # define AO_HAVE_int_store #endif #if defined(AO_HAVE_int_store_full) && !defined(AO_HAVE_int_store_release) # define AO_int_store_release(addr,val) AO_int_store_full(addr,val) # define AO_HAVE_int_store_release #endif #if defined(AO_HAVE_int_store_full) && !defined(AO_HAVE_int_store_write) # define AO_int_store_write(addr,val) AO_int_store_full(addr,val) # define AO_HAVE_int_store_write #endif #if defined(AO_HAVE_int_store_release) \ && !defined(AO_HAVE_int_store_release_write) # define AO_int_store_release_write(addr, val) \ AO_int_store_release(addr,val) # define AO_HAVE_int_store_release_write #endif #if defined(AO_HAVE_int_store_write) && !defined(AO_HAVE_int_store) # define AO_int_store(addr, val) AO_int_store_write(addr,val) # define AO_HAVE_int_store #endif #if defined(AO_HAVE_int_store) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_int_store_release) # define AO_int_store_release(addr,val) \ (AO_nop_full(), AO_int_store(addr,val)) # define AO_HAVE_int_store_release #endif #if defined(AO_HAVE_nop_write) && defined(AO_HAVE_int_store) \ && !defined(AO_HAVE_int_store_write) # define AO_int_store_write(addr, val) \ (AO_nop_write(), AO_int_store(addr,val)) # define AO_HAVE_int_store_write #endif #if defined(AO_HAVE_int_store_write) \ && !defined(AO_HAVE_int_store_release_write) # define AO_int_store_release_write(addr, val) AO_int_store_write(addr,val) # define AO_HAVE_int_store_release_write #endif #if defined(AO_HAVE_int_store_release) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_int_store_full) # define AO_int_store_full(addr, val) \ (AO_int_store_release(addr, val), AO_nop_full()) # define AO_HAVE_int_store_full #endif /* int_fetch_and_add */ #if defined(AO_HAVE_int_compare_and_swap_full) \ && !defined(AO_HAVE_int_fetch_and_add_full) AO_INLINE int AO_int_fetch_and_add_full(volatile unsigned int *addr, unsigned int incr) { unsigned int old; do { old = *addr; } while (!AO_int_compare_and_swap_full(addr, old, old+incr)); return old; } # define AO_HAVE_int_fetch_and_add_full #endif #if defined(AO_HAVE_int_compare_and_swap_acquire) \ && !defined(AO_HAVE_int_fetch_and_add_acquire) AO_INLINE int AO_int_fetch_and_add_acquire(volatile unsigned int *addr, unsigned int incr) { unsigned int old; do { old = *addr; } while (!AO_int_compare_and_swap_acquire(addr, old, old+incr)); return old; } # define AO_HAVE_int_fetch_and_add_acquire #endif #if defined(AO_HAVE_int_compare_and_swap_release) \ && !defined(AO_HAVE_int_fetch_and_add_release) AO_INLINE int AO_int_fetch_and_add_release(volatile unsigned int *addr, unsigned int incr) { unsigned int old; do { old = *addr; } while (!AO_int_compare_and_swap_release(addr, old, old+incr)); return old; } # define AO_HAVE_int_fetch_and_add_release #endif #if defined(AO_HAVE_int_fetch_and_add_full) # if !defined(AO_HAVE_int_fetch_and_add_release) # define AO_int_fetch_and_add_release(addr, val) \ AO_int_fetch_and_add_full(addr, val) # define AO_HAVE_int_fetch_and_add_release # endif # if !defined(AO_HAVE_int_fetch_and_add_acquire) # define AO_int_fetch_and_add_acquire(addr, val) \ AO_int_fetch_and_add_full(addr, val) # define AO_HAVE_int_fetch_and_add_acquire # endif # if !defined(AO_HAVE_int_fetch_and_add_write) # define AO_int_fetch_and_add_write(addr, val) \ AO_int_fetch_and_add_full(addr, val) # define AO_HAVE_int_fetch_and_add_write # endif # if !defined(AO_HAVE_int_fetch_and_add_read) # define AO_int_fetch_and_add_read(addr, val) \ AO_int_fetch_and_add_full(addr, val) # define AO_HAVE_int_fetch_and_add_read # endif #endif /* AO_HAVE_int_fetch_and_add_full */ #if !defined(AO_HAVE_int_fetch_and_add) \ && defined(AO_HAVE_int_fetch_and_add_release) # define AO_int_fetch_and_add(addr, val) \ AO_int_fetch_and_add_release(addr, val) # define AO_HAVE_int_fetch_and_add #endif #if !defined(AO_HAVE_int_fetch_and_add) \ && defined(AO_HAVE_int_fetch_and_add_acquire) # define AO_int_fetch_and_add(addr, val) \ AO_int_fetch_and_add_acquire(addr, val) # define AO_HAVE_int_fetch_and_add #endif #if !defined(AO_HAVE_int_fetch_and_add) \ && defined(AO_HAVE_int_fetch_and_add_write) # define AO_int_fetch_and_add(addr, val) \ AO_int_fetch_and_add_write(addr, val) # define AO_HAVE_int_fetch_and_add #endif #if !defined(AO_HAVE_int_fetch_and_add) \ && defined(AO_HAVE_int_fetch_and_add_read) # define AO_int_fetch_and_add(addr, val) \ AO_int_fetch_and_add_read(addr, val) # define AO_HAVE_int_fetch_and_add #endif #if defined(AO_HAVE_int_fetch_and_add_acquire) \ && defined(AO_HAVE_nop_full) && !defined(AO_HAVE_int_fetch_and_add_full) # define AO_int_fetch_and_add_full(addr, val) \ (AO_nop_full(), AO_int_fetch_and_add_acquire(addr, val)) # define AO_HAVE_int_fetch_and_add_full #endif #if !defined(AO_HAVE_int_fetch_and_add_release_write) \ && defined(AO_HAVE_int_fetch_and_add_write) # define AO_int_fetch_and_add_release_write(addr, val) \ AO_int_fetch_and_add_write(addr, val) # define AO_HAVE_int_fetch_and_add_release_write #endif #if !defined(AO_HAVE_int_fetch_and_add_release_write) \ && defined(AO_HAVE_int_fetch_and_add_release) # define AO_int_fetch_and_add_release_write(addr, val) \ AO_int_fetch_and_add_release(addr, val) # define AO_HAVE_int_fetch_and_add_release_write #endif #if !defined(AO_HAVE_int_fetch_and_add_acquire_read) \ && defined(AO_HAVE_int_fetch_and_add_read) # define AO_int_fetch_and_add_acquire_read(addr, val) \ AO_int_fetch_and_add_read(addr, val) # define AO_HAVE_int_fetch_and_add_acquire_read #endif #if !defined(AO_HAVE_int_fetch_and_add_acquire_read) \ && defined(AO_HAVE_int_fetch_and_add_acquire) # define AO_int_fetch_and_add_acquire_read(addr, val) \ AO_int_fetch_and_add_acquire(addr, val) # define AO_HAVE_int_fetch_and_add_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_int_fetch_and_add_acquire_read) # define AO_int_fetch_and_add_dd_acquire_read(addr, val) \ AO_int_fetch_and_add_acquire_read(addr, val) # define AO_HAVE_int_fetch_and_add_dd_acquire_read # endif #else # if defined(AO_HAVE_int_fetch_and_add) # define AO_int_fetch_and_add_dd_acquire_read(addr, val) \ AO_int_fetch_and_add(addr, val) # define AO_HAVE_int_fetch_and_add_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* int_fetch_and_add1 */ #if defined(AO_HAVE_int_fetch_and_add_full) \ && !defined(AO_HAVE_int_fetch_and_add1_full) # define AO_int_fetch_and_add1_full(addr) \ AO_int_fetch_and_add_full(addr,1) # define AO_HAVE_int_fetch_and_add1_full #endif #if defined(AO_HAVE_int_fetch_and_add_release) \ && !defined(AO_HAVE_int_fetch_and_add1_release) # define AO_int_fetch_and_add1_release(addr) \ AO_int_fetch_and_add_release(addr,1) # define AO_HAVE_int_fetch_and_add1_release #endif #if defined(AO_HAVE_int_fetch_and_add_acquire) \ && !defined(AO_HAVE_int_fetch_and_add1_acquire) # define AO_int_fetch_and_add1_acquire(addr) \ AO_int_fetch_and_add_acquire(addr,1) # define AO_HAVE_int_fetch_and_add1_acquire #endif #if defined(AO_HAVE_int_fetch_and_add_write) \ && !defined(AO_HAVE_int_fetch_and_add1_write) # define AO_int_fetch_and_add1_write(addr) \ AO_int_fetch_and_add_write(addr,1) # define AO_HAVE_int_fetch_and_add1_write #endif #if defined(AO_HAVE_int_fetch_and_add_read) \ && !defined(AO_HAVE_int_fetch_and_add1_read) # define AO_int_fetch_and_add1_read(addr) \ AO_int_fetch_and_add_read(addr,1) # define AO_HAVE_int_fetch_and_add1_read #endif #if defined(AO_HAVE_int_fetch_and_add_release_write) \ && !defined(AO_HAVE_int_fetch_and_add1_release_write) # define AO_int_fetch_and_add1_release_write(addr) \ AO_int_fetch_and_add_release_write(addr,1) # define AO_HAVE_int_fetch_and_add1_release_write #endif #if defined(AO_HAVE_int_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_int_fetch_and_add1_acquire_read) # define AO_int_fetch_and_add1_acquire_read(addr) \ AO_int_fetch_and_add_acquire_read(addr,1) # define AO_HAVE_int_fetch_and_add1_acquire_read #endif #if defined(AO_HAVE_int_fetch_and_add) \ && !defined(AO_HAVE_int_fetch_and_add1) # define AO_int_fetch_and_add1(addr) AO_int_fetch_and_add(addr,1) # define AO_HAVE_int_fetch_and_add1 #endif #if defined(AO_HAVE_int_fetch_and_add1_full) # if !defined(AO_HAVE_int_fetch_and_add1_release) # define AO_int_fetch_and_add1_release(addr) \ AO_int_fetch_and_add1_full(addr) # define AO_HAVE_int_fetch_and_add1_release # endif # if !defined(AO_HAVE_int_fetch_and_add1_acquire) # define AO_int_fetch_and_add1_acquire(addr) \ AO_int_fetch_and_add1_full(addr) # define AO_HAVE_int_fetch_and_add1_acquire # endif # if !defined(AO_HAVE_int_fetch_and_add1_write) # define AO_int_fetch_and_add1_write(addr) \ AO_int_fetch_and_add1_full(addr) # define AO_HAVE_int_fetch_and_add1_write # endif # if !defined(AO_HAVE_int_fetch_and_add1_read) # define AO_int_fetch_and_add1_read(addr) \ AO_int_fetch_and_add1_full(addr) # define AO_HAVE_int_fetch_and_add1_read # endif #endif /* AO_HAVE_int_fetch_and_add1_full */ #if !defined(AO_HAVE_int_fetch_and_add1) \ && defined(AO_HAVE_int_fetch_and_add1_release) # define AO_int_fetch_and_add1(addr) AO_int_fetch_and_add1_release(addr) # define AO_HAVE_int_fetch_and_add1 #endif #if !defined(AO_HAVE_int_fetch_and_add1) \ && defined(AO_HAVE_int_fetch_and_add1_acquire) # define AO_int_fetch_and_add1(addr) AO_int_fetch_and_add1_acquire(addr) # define AO_HAVE_int_fetch_and_add1 #endif #if !defined(AO_HAVE_int_fetch_and_add1) \ && defined(AO_HAVE_int_fetch_and_add1_write) # define AO_int_fetch_and_add1(addr) AO_int_fetch_and_add1_write(addr) # define AO_HAVE_int_fetch_and_add1 #endif #if !defined(AO_HAVE_int_fetch_and_add1) \ && defined(AO_HAVE_int_fetch_and_add1_read) # define AO_int_fetch_and_add1(addr) AO_int_fetch_and_add1_read(addr) # define AO_HAVE_int_fetch_and_add1 #endif #if defined(AO_HAVE_int_fetch_and_add1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_int_fetch_and_add1_full) # define AO_int_fetch_and_add1_full(addr) \ (AO_nop_full(), AO_int_fetch_and_add1_acquire(addr)) # define AO_HAVE_int_fetch_and_add1_full #endif #if !defined(AO_HAVE_int_fetch_and_add1_release_write) \ && defined(AO_HAVE_int_fetch_and_add1_write) # define AO_int_fetch_and_add1_release_write(addr) \ AO_int_fetch_and_add1_write(addr) # define AO_HAVE_int_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_int_fetch_and_add1_release_write) \ && defined(AO_HAVE_int_fetch_and_add1_release) # define AO_int_fetch_and_add1_release_write(addr) \ AO_int_fetch_and_add1_release(addr) # define AO_HAVE_int_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_int_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_int_fetch_and_add1_read) # define AO_int_fetch_and_add1_acquire_read(addr) \ AO_int_fetch_and_add1_read(addr) # define AO_HAVE_int_fetch_and_add1_acquire_read #endif #if !defined(AO_HAVE_int_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_int_fetch_and_add1_acquire) # define AO_int_fetch_and_add1_acquire_read(addr) \ AO_int_fetch_and_add1_acquire(addr) # define AO_HAVE_int_fetch_and_add1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_int_fetch_and_add1_acquire_read) # define AO_int_fetch_and_add1_dd_acquire_read(addr) \ AO_int_fetch_and_add1_acquire_read(addr) # define AO_HAVE_int_fetch_and_add1_dd_acquire_read # endif #else # if defined(AO_HAVE_int_fetch_and_add1) # define AO_int_fetch_and_add1_dd_acquire_read(addr) \ AO_int_fetch_and_add1(addr) # define AO_HAVE_int_fetch_and_add1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* int_fetch_and_sub1 */ #if defined(AO_HAVE_int_fetch_and_add_full) \ && !defined(AO_HAVE_int_fetch_and_sub1_full) # define AO_int_fetch_and_sub1_full(addr) \ AO_int_fetch_and_add_full(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1_full #endif #if defined(AO_HAVE_int_fetch_and_add_release) \ && !defined(AO_HAVE_int_fetch_and_sub1_release) # define AO_int_fetch_and_sub1_release(addr) \ AO_int_fetch_and_add_release(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1_release #endif #if defined(AO_HAVE_int_fetch_and_add_acquire) \ && !defined(AO_HAVE_int_fetch_and_sub1_acquire) # define AO_int_fetch_and_sub1_acquire(addr) \ AO_int_fetch_and_add_acquire(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1_acquire #endif #if defined(AO_HAVE_int_fetch_and_add_write) \ && !defined(AO_HAVE_int_fetch_and_sub1_write) # define AO_int_fetch_and_sub1_write(addr) \ AO_int_fetch_and_add_write(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1_write #endif #if defined(AO_HAVE_int_fetch_and_add_read) \ && !defined(AO_HAVE_int_fetch_and_sub1_read) # define AO_int_fetch_and_sub1_read(addr) \ AO_int_fetch_and_add_read(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1_read #endif #if defined(AO_HAVE_int_fetch_and_add_release_write) \ && !defined(AO_HAVE_int_fetch_and_sub1_release_write) # define AO_int_fetch_and_sub1_release_write(addr) \ AO_int_fetch_and_add_release_write(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1_release_write #endif #if defined(AO_HAVE_int_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_int_fetch_and_sub1_acquire_read) # define AO_int_fetch_and_sub1_acquire_read(addr) \ AO_int_fetch_and_add_acquire_read(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1_acquire_read #endif #if defined(AO_HAVE_int_fetch_and_add) \ && !defined(AO_HAVE_int_fetch_and_sub1) # define AO_int_fetch_and_sub1(addr) \ AO_int_fetch_and_add(addr,(unsigned int)(-1)) # define AO_HAVE_int_fetch_and_sub1 #endif #if defined(AO_HAVE_int_fetch_and_sub1_full) # if !defined(AO_HAVE_int_fetch_and_sub1_release) # define AO_int_fetch_and_sub1_release(addr) \ AO_int_fetch_and_sub1_full(addr) # define AO_HAVE_int_fetch_and_sub1_release # endif # if !defined(AO_HAVE_int_fetch_and_sub1_acquire) # define AO_int_fetch_and_sub1_acquire(addr) \ AO_int_fetch_and_sub1_full(addr) # define AO_HAVE_int_fetch_and_sub1_acquire # endif # if !defined(AO_HAVE_int_fetch_and_sub1_write) # define AO_int_fetch_and_sub1_write(addr) \ AO_int_fetch_and_sub1_full(addr) # define AO_HAVE_int_fetch_and_sub1_write # endif # if !defined(AO_HAVE_int_fetch_and_sub1_read) # define AO_int_fetch_and_sub1_read(addr) \ AO_int_fetch_and_sub1_full(addr) # define AO_HAVE_int_fetch_and_sub1_read # endif #endif /* AO_HAVE_int_fetch_and_sub1_full */ #if !defined(AO_HAVE_int_fetch_and_sub1) \ && defined(AO_HAVE_int_fetch_and_sub1_release) # define AO_int_fetch_and_sub1(addr) AO_int_fetch_and_sub1_release(addr) # define AO_HAVE_int_fetch_and_sub1 #endif #if !defined(AO_HAVE_int_fetch_and_sub1) \ && defined(AO_HAVE_int_fetch_and_sub1_acquire) # define AO_int_fetch_and_sub1(addr) AO_int_fetch_and_sub1_acquire(addr) # define AO_HAVE_int_fetch_and_sub1 #endif #if !defined(AO_HAVE_int_fetch_and_sub1) \ && defined(AO_HAVE_int_fetch_and_sub1_write) # define AO_int_fetch_and_sub1(addr) AO_int_fetch_and_sub1_write(addr) # define AO_HAVE_int_fetch_and_sub1 #endif #if !defined(AO_HAVE_int_fetch_and_sub1) \ && defined(AO_HAVE_int_fetch_and_sub1_read) # define AO_int_fetch_and_sub1(addr) AO_int_fetch_and_sub1_read(addr) # define AO_HAVE_int_fetch_and_sub1 #endif #if defined(AO_HAVE_int_fetch_and_sub1_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_int_fetch_and_sub1_full) # define AO_int_fetch_and_sub1_full(addr) \ (AO_nop_full(), AO_int_fetch_and_sub1_acquire(addr)) # define AO_HAVE_int_fetch_and_sub1_full #endif #if !defined(AO_HAVE_int_fetch_and_sub1_release_write) \ && defined(AO_HAVE_int_fetch_and_sub1_write) # define AO_int_fetch_and_sub1_release_write(addr) \ AO_int_fetch_and_sub1_write(addr) # define AO_HAVE_int_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_int_fetch_and_sub1_release_write) \ && defined(AO_HAVE_int_fetch_and_sub1_release) # define AO_int_fetch_and_sub1_release_write(addr) \ AO_int_fetch_and_sub1_release(addr) # define AO_HAVE_int_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_int_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_int_fetch_and_sub1_read) # define AO_int_fetch_and_sub1_acquire_read(addr) \ AO_int_fetch_and_sub1_read(addr) # define AO_HAVE_int_fetch_and_sub1_acquire_read #endif #if !defined(AO_HAVE_int_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_int_fetch_and_sub1_acquire) # define AO_int_fetch_and_sub1_acquire_read(addr) \ AO_int_fetch_and_sub1_acquire(addr) # define AO_HAVE_int_fetch_and_sub1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_int_fetch_and_sub1_acquire_read) # define AO_int_fetch_and_sub1_dd_acquire_read(addr) \ AO_int_fetch_and_sub1_acquire_read(addr) # define AO_HAVE_int_fetch_and_sub1_dd_acquire_read # endif #else # if defined(AO_HAVE_int_fetch_and_sub1) # define AO_int_fetch_and_sub1_dd_acquire_read(addr) \ AO_int_fetch_and_sub1(addr) # define AO_HAVE_int_fetch_and_sub1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ libatomic_ops-7.2/src/atomic_ops/sysdeps/0000755000175000017500000000000011753234214015627 500000000000000libatomic_ops-7.2/src/atomic_ops/sysdeps/char_atomic_load_store.h0000644000175000017500000000331011753234157022407 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* Definitions for architectures on which loads and stores of unsigned */ /* char are atomic for all legal alignments. */ AO_INLINE unsigned char AO_char_load(const volatile unsigned char *addr) { /* Cast away the volatile for architectures like IA64 where */ /* volatile adds barrier semantics. */ return (*(const unsigned char *)addr); } #define AO_HAVE_char_load AO_INLINE void AO_char_store(volatile unsigned char *addr, unsigned char new_val) { (*(unsigned char *)addr) = new_val; } #define AO_HAVE_char_store libatomic_ops-7.2/src/atomic_ops/sysdeps/all_atomic_load_store.h0000644000175000017500000000265411753234157022254 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Describes architectures on which AO_t, unsigned char, unsigned short, * and unsigned int loads and stores are atomic for all normally legal * alignments. */ #include "atomic_load_store.h" #include "char_atomic_load_store.h" #include "short_atomic_load_store.h" #include "int_atomic_load_store.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/int_aligned_atomic_load_store.h0000644000175000017500000000345011753234157023754 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* Definitions for architectures on which loads and stores of unsigned */ /* int are atomic for all legal alignments. */ AO_INLINE unsigned int AO_int_load(const volatile unsigned int *addr) { assert(((size_t)addr & (sizeof(unsigned int) - 1)) == 0); /* Cast away the volatile for architectures like IA64 where */ /* volatile adds barrier semantics. */ return (*(unsigned int *)addr); } #define AO_HAVE_int_load AO_INLINE void AO_int_store(volatile unsigned int *addr, unsigned int new_val) { assert(((size_t)addr & (sizeof(unsigned int) - 1)) == 0); (*(unsigned int *)addr) = new_val; } #define AO_HAVE_int_store libatomic_ops-7.2/src/atomic_ops/sysdeps/int_atomic_load_store.h0000644000175000017500000000327611753234157022277 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* Definitions for architectures on which loads and stores of unsigned */ /* int are atomic for all legal alignments. */ AO_INLINE unsigned int AO_int_load(const volatile unsigned int *addr) { /* Cast away the volatile for architectures like IA64 where */ /* volatile adds barrier semantics. */ return (*(const unsigned int *)addr); } #define AO_HAVE_int_load AO_INLINE void AO_int_store(volatile unsigned int *addr, unsigned int new_val) { (*(unsigned int *)addr) = new_val; } #define AO_HAVE_int_store libatomic_ops-7.2/src/atomic_ops/sysdeps/Makefile.in0000644000175000017500000003441311753234204017620 00000000000000# Makefile.in generated by automake 1.11.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, # Inc. # This Makefile.in is free software; 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IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * This file specifies Itanimum primitives for use with the HP compiler * under HP/UX. We use intrinsics instead of the inline assembly code in the * gcc file. */ #include "../all_atomic_load_store.h" #include "../all_acquire_release_volatile.h" #include "../test_and_set_t_is_char.h" #include #ifdef __LP64__ # define AO_T_FASIZE _FASZ_D # define AO_T_SIZE _SZ_D #else # define AO_T_FASIZE _FASZ_W # define AO_T_SIZE _SZ_W #endif AO_INLINE void AO_nop_full(void) { _Asm_mf(); } #define AO_HAVE_nop_full AO_INLINE AO_t AO_fetch_and_add1_acquire (volatile AO_t *p) { return _Asm_fetchadd(AO_T_FASIZE, _SEM_ACQ, p, 1, _LDHINT_NONE, _DOWN_MEM_FENCE); } #define AO_HAVE_fetch_and_add1_acquire AO_INLINE AO_t AO_fetch_and_add1_release (volatile AO_t *p) { return _Asm_fetchadd(AO_T_FASIZE, _SEM_REL, p, 1, _LDHINT_NONE, _UP_MEM_FENCE); } #define AO_HAVE_fetch_and_add1_release AO_INLINE AO_t AO_fetch_and_sub1_acquire (volatile AO_t *p) { return _Asm_fetchadd(AO_T_FASIZE, _SEM_ACQ, p, -1, _LDHINT_NONE, _DOWN_MEM_FENCE); } #define AO_HAVE_fetch_and_sub1_acquire AO_INLINE AO_t AO_fetch_and_sub1_release (volatile AO_t *p) { return _Asm_fetchadd(AO_T_FASIZE, _SEM_REL, p, -1, _LDHINT_NONE, _UP_MEM_FENCE); } #define AO_HAVE_fetch_and_sub1_release AO_INLINE int AO_compare_and_swap_acquire(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t oldval; _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE); oldval = _Asm_cmpxchg(AO_T_SIZE, _SEM_ACQ, addr, new_val, _LDHINT_NONE, _DOWN_MEM_FENCE); return (oldval == old); } #define AO_HAVE_compare_and_swap_acquire AO_INLINE int AO_compare_and_swap_release(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t oldval; _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE); oldval = _Asm_cmpxchg(AO_T_SIZE, _SEM_REL, addr, new_val, _LDHINT_NONE, _UP_MEM_FENCE); /* Hopefully the compiler knows not to reorder the above two? */ return (oldval == old); } #define AO_HAVE_compare_and_swap_release AO_INLINE int AO_char_compare_and_swap_acquire(volatile unsigned char *addr, unsigned char old, unsigned char new_val) { unsigned char oldval; _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE); oldval = _Asm_cmpxchg(_SZ_B, _SEM_ACQ, addr, new_val, _LDHINT_NONE, _DOWN_MEM_FENCE); return (oldval == old); } #define AO_HAVE_char_compare_and_swap_acquire AO_INLINE int AO_char_compare_and_swap_release(volatile unsigned char *addr, unsigned char old, unsigned char new_val) { unsigned char oldval; _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE); oldval = _Asm_cmpxchg(_SZ_B, _SEM_REL, addr, new_val, _LDHINT_NONE, _UP_MEM_FENCE); /* Hopefully the compiler knows not to reorder the above two? */ return (oldval == old); } #define AO_HAVE_char_compare_and_swap_release AO_INLINE int AO_short_compare_and_swap_acquire(volatile unsigned short *addr, unsigned short old, unsigned short new_val) { unsigned short oldval; _Asm_mov_to_ar(_AREG_CCV, old, _DOWN_MEM_FENCE); oldval = _Asm_cmpxchg(_SZ_B, _SEM_ACQ, addr, new_val, _LDHINT_NONE, _DOWN_MEM_FENCE); return (oldval == old); } #define AO_HAVE_short_compare_and_swap_acquire AO_INLINE int AO_short_compare_and_swap_release(volatile unsigned short *addr, unsigned short old, unsigned short new_val) { unsigned short oldval; _Asm_mov_to_ar(_AREG_CCV, old, _UP_MEM_FENCE); oldval = _Asm_cmpxchg(_SZ_B, _SEM_REL, addr, new_val, _LDHINT_NONE, _UP_MEM_FENCE); /* Hopefully the compiler knows not to reorder the above two? */ return (oldval == old); } #define AO_HAVE_short_compare_and_swap_release #ifndef __LP64__ /* Generalize first to define more AO_int_... primitives. */ # include "../../generalize.h" # include "../ao_t_is_int.h" #endif libatomic_ops-7.2/src/atomic_ops/sysdeps/hpc/hppa.h0000644000175000017500000001020511753234157017426 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Derived from the corresponding header file for gcc. * */ #include "../atomic_load_store.h" /* Some architecture set descriptions include special "ordered" memory */ /* operations. As far as we can tell, no existing processors actually */ /* require those. Nor does it appear likely that future processors */ /* will. */ /* FIXME: */ /* The PA emulator on Itanium may obey weaker restrictions. */ /* There should be a mode in which we don't assume sequential */ /* consistency here. */ #include "../ordered.h" #include /* GCC will not guarantee the alignment we need, use four lock words */ /* and select the correctly aligned datum. See the glibc 2.3.2 */ /* linuxthread port for the original implementation. */ struct AO_pa_clearable_loc { int data[4]; }; #undef AO_TS_INITIALIZER #define AO_TS_t struct AO_pa_clearable_loc #define AO_TS_INITIALIZER {1,1,1,1} /* Switch meaning of set and clear, since we only have an atomic clear */ /* instruction. */ typedef enum {AO_PA_TS_set = 0, AO_PA_TS_clear = 1} AO_PA_TS_val; #define AO_TS_VAL_t AO_PA_TS_val #define AO_TS_CLEAR AO_PA_TS_clear #define AO_TS_SET AO_PA_TS_set /* The hppa only has one atomic read and modify memory operation, */ /* load and clear, so hppa spinlocks must use zero to signify that */ /* someone is holding the lock. The address used for the ldcw */ /* semaphore must be 16-byte aligned. */ #define __ldcw(a, ret) \ _LDCWX(0 /* index */, 0 /* s */, a /* base */, ret); /* Because malloc only guarantees 8-byte alignment for malloc'd data, */ /* and GCC only guarantees 8-byte alignment for stack locals, we can't */ /* be assured of 16-byte alignment for atomic lock data even if we */ /* specify "__attribute ((aligned(16)))" in the type declaration. So, */ /* we use a struct containing an array of four ints for the atomic lock */ /* type and dynamically select the 16-byte aligned int from the array */ /* for the semaphore. */ #define __PA_LDCW_ALIGNMENT 16 #define __ldcw_align(a, ret) { \ ret = (unsigned long) a; \ ret += __PA_LDCW_ALIGNMENT - 1; \ ret &= ~(__PA_LDCW_ALIGNMENT - 1); \ } /* Works on PA 1.1 and PA 2.0 systems */ AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t * addr) { register unsigned int ret; register unsigned long a; __ldcw_align (addr, a); __ldcw (a, ret); return ret; } #define AO_HAVE_test_and_set_full AO_INLINE void AO_pa_clear(volatile AO_TS_t * addr) { unsigned long a; __ldcw_align (addr,a); AO_compiler_barrier(); *(volatile unsigned int *)a = 1; } #define AO_CLEAR(addr) AO_pa_clear(addr) libatomic_ops-7.2/src/atomic_ops/sysdeps/int_acquire_release_volatile.h0000644000175000017500000000371311753234157023634 00000000000000/* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * This file adds definitions appropriate for environments in which an unsigned * int volatile load has acquire semantics, and an unsigned short volatile * store has release semantics. This is true with the standard Itanium ABI. */ #if !defined(AO_GCC_BARRIER) # if defined(__GNUC__) # define AO_GCC_BARRIER() AO_compiler_barrier() # else # define AO_GCC_BARRIER() # endif #endif AO_INLINE unsigned int AO_int_load_acquire(const volatile unsigned int *p) { unsigned int result = *p; /* A normal volatile load generates an ld.acq */ AO_GCC_BARRIER(); return result; } #define AO_HAVE_int_load_acquire AO_INLINE void AO_int_store_release(volatile unsigned int *p, unsigned int val) { AO_GCC_BARRIER(); /* A normal volatile store generates an st.rel */ *p = val; } #define AO_HAVE_int_store_release libatomic_ops-7.2/src/atomic_ops/sysdeps/emul_cas.h0000644000175000017500000000625611753234157017527 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Ensure, if at all possible, that AO_compare_and_swap_full() is * available. The emulation should be brute-force signal-safe, even * though it actually blocks. * Including this file will generate an error if AO_compare_and_swap_full() * cannot be made available. * This will be included from platform-specific atomic_ops files * if appropriate, and if AO_REQUIRE_CAS is defined. It should not be * included directly, especially since it affects the implementation * of other atomic update primitives. * The implementation assumes that only AO_store_XXX and AO_test_and_set_XXX * variants are defined, and that AO_test_and_set_XXX is not used to * operate on compare_and_swap locations. */ #if !defined(ATOMIC_OPS_H) # error This file should not be included directly. #endif #ifndef AO_HAVE_double_t # include "standard_ao_double_t.h" #endif int AO_compare_and_swap_emulation(volatile AO_t *addr, AO_t old, AO_t new_val); int AO_compare_double_and_swap_double_emulation(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2); void AO_store_full_emulation(volatile AO_t *addr, AO_t val); #define AO_compare_and_swap_full(addr, old, newval) \ AO_compare_and_swap_emulation(addr, old, newval) #define AO_HAVE_compare_and_swap_full #ifndef AO_HAVE_compare_double_and_swap_double # define AO_compare_double_and_swap_double_full(addr, old1, old2, \ newval1, newval2) \ AO_compare_double_and_swap_double_emulation(addr, old1, old2, \ newval1, newval2) # define AO_HAVE_compare_double_and_swap_double_full #endif #undef AO_store #undef AO_HAVE_store #undef AO_store_write #undef AO_HAVE_store_write #undef AO_store_release #undef AO_HAVE_store_release #undef AO_store_full #undef AO_HAVE_store_full #define AO_store_full(addr, val) AO_store_full_emulation(addr, val) #define AO_HAVE_store_full libatomic_ops-7.2/src/atomic_ops/sysdeps/atomic_load_store.h0000644000175000017500000000316611753234157021423 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* Definitions for architectures on which loads and stores of AO_t are */ /* atomic for all legal alignments. */ AO_INLINE AO_t AO_load(const volatile AO_t *addr) { /* Cast away the volatile for architectures like IA64 where */ /* volatile adds barrier semantics. */ return (*(const AO_t *)addr); } #define AO_HAVE_load AO_INLINE void AO_store(volatile AO_t *addr, AO_t new_val) { (*(AO_t *)addr) = new_val; } #define AO_HAVE_store libatomic_ops-7.2/src/atomic_ops/sysdeps/aligned_atomic_load_store.h0000644000175000017500000000332611753234157023104 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* Definitions for architectures on which loads and stores of AO_t are */ /* atomic fo all legal alignments. */ AO_INLINE AO_t AO_load(const volatile AO_t *addr) { assert(((size_t)addr & (sizeof(AO_t) - 1)) == 0); /* Cast away the volatile for architectures where */ /* volatile adds barrier semantics. */ return *(AO_t *)addr; } #define AO_HAVE_load AO_INLINE void AO_store(volatile AO_t *addr, AO_t new_val) { assert(((size_t)addr & (sizeof(AO_t) - 1)) == 0); (*(AO_t *)addr) = new_val; } #define AO_HAVE_store libatomic_ops-7.2/src/atomic_ops/sysdeps/generic_pthread.h0000644000175000017500000001601711753234157021056 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* The following is useful primarily for debugging and documentation. */ /* We define various atomic operations by acquiring a global pthread */ /* lock. The resulting implementation will perform poorly, but should */ /* be correct unless it is used from signal handlers. */ /* We assume that all pthread operations act like full memory barriers. */ /* (We believe that is the intent of the specification.) */ #include #include "test_and_set_t_is_ao_t.h" /* This is not necessarily compatible with the native */ /* implementation. But those can't be safely mixed anyway. */ /* We define only the full barrier variants, and count on the */ /* generalization section below to fill in the rest. */ extern pthread_mutex_t AO_pt_lock; AO_INLINE void AO_nop_full(void) { pthread_mutex_lock(&AO_pt_lock); pthread_mutex_unlock(&AO_pt_lock); } #define AO_HAVE_nop_full AO_INLINE AO_t AO_load_full(const volatile AO_t *addr) { AO_t result; pthread_mutex_lock(&AO_pt_lock); result = *addr; pthread_mutex_unlock(&AO_pt_lock); return result; } #define AO_HAVE_load_full AO_INLINE void AO_store_full(volatile AO_t *addr, AO_t val) { pthread_mutex_lock(&AO_pt_lock); *addr = val; pthread_mutex_unlock(&AO_pt_lock); } #define AO_HAVE_store_full AO_INLINE unsigned char AO_char_load_full(const volatile unsigned char *addr) { unsigned char result; pthread_mutex_lock(&AO_pt_lock); result = *addr; pthread_mutex_unlock(&AO_pt_lock); return result; } #define AO_HAVE_char_load_full AO_INLINE void AO_char_store_full(volatile unsigned char *addr, unsigned char val) { pthread_mutex_lock(&AO_pt_lock); *addr = val; pthread_mutex_unlock(&AO_pt_lock); } #define AO_HAVE_char_store_full AO_INLINE unsigned short AO_short_load_full(const volatile unsigned short *addr) { unsigned short result; pthread_mutex_lock(&AO_pt_lock); result = *addr; pthread_mutex_unlock(&AO_pt_lock); return result; } #define AO_HAVE_short_load_full AO_INLINE void AO_short_store_full(volatile unsigned short *addr, unsigned short val) { pthread_mutex_lock(&AO_pt_lock); *addr = val; pthread_mutex_unlock(&AO_pt_lock); } #define AO_HAVE_short_store_full AO_INLINE unsigned int AO_int_load_full(const volatile unsigned int *addr) { unsigned int result; pthread_mutex_lock(&AO_pt_lock); result = *addr; pthread_mutex_unlock(&AO_pt_lock); return result; } #define AO_HAVE_int_load_full AO_INLINE void AO_int_store_full(volatile unsigned int *addr, unsigned int val) { pthread_mutex_lock(&AO_pt_lock); *addr = val; pthread_mutex_unlock(&AO_pt_lock); } #define AO_HAVE_int_store_full AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { AO_TS_VAL_t result; pthread_mutex_lock(&AO_pt_lock); result = (AO_TS_VAL_t)(*addr); *addr = AO_TS_SET; pthread_mutex_unlock(&AO_pt_lock); assert(result == AO_TS_SET || result == AO_TS_CLEAR); return result; } #define AO_HAVE_test_and_set_full AO_INLINE AO_t AO_fetch_and_add_full(volatile AO_t *p, AO_t incr) { AO_t tmp; pthread_mutex_lock(&AO_pt_lock); tmp = *p; *p = tmp + incr; pthread_mutex_unlock(&AO_pt_lock); return tmp; } #define AO_HAVE_fetch_and_add_full AO_INLINE unsigned char AO_char_fetch_and_add_full(volatile unsigned char *p, unsigned char incr) { unsigned char tmp; pthread_mutex_lock(&AO_pt_lock); tmp = *p; *p = tmp + incr; pthread_mutex_unlock(&AO_pt_lock); return tmp; } #define AO_HAVE_char_fetch_and_add_full AO_INLINE unsigned short AO_short_fetch_and_add_full(volatile unsigned short *p, unsigned short incr) { unsigned short tmp; pthread_mutex_lock(&AO_pt_lock); tmp = *p; *p = tmp + incr; pthread_mutex_unlock(&AO_pt_lock); return tmp; } #define AO_HAVE_short_fetch_and_add_full AO_INLINE unsigned int AO_int_fetch_and_add_full(volatile unsigned int *p, unsigned int incr) { unsigned int tmp; pthread_mutex_lock(&AO_pt_lock); tmp = *p; *p = tmp + incr; pthread_mutex_unlock(&AO_pt_lock); return tmp; } #define AO_HAVE_int_fetch_and_add_full AO_INLINE void AO_or_full(volatile AO_t *p, AO_t incr) { AO_t tmp; pthread_mutex_lock(&AO_pt_lock); tmp = *p; *p = (tmp | incr); pthread_mutex_unlock(&AO_pt_lock); } #define AO_HAVE_or_full AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { pthread_mutex_lock(&AO_pt_lock); if (*addr == old) { *addr = new_val; pthread_mutex_unlock(&AO_pt_lock); return 1; } else pthread_mutex_unlock(&AO_pt_lock); return 0; } #define AO_HAVE_compare_and_swap_full /* Unlike real architectures, we define both double-width CAS variants. */ typedef struct { AO_t AO_val1; AO_t AO_val2; } AO_double_t; #define AO_HAVE_double_t AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old1, AO_t old2, AO_t new1, AO_t new2) { pthread_mutex_lock(&AO_pt_lock); if (addr -> AO_val1 == old1 && addr -> AO_val2 == old2) { addr -> AO_val1 = new1; addr -> AO_val2 = new2; pthread_mutex_unlock(&AO_pt_lock); return 1; } else pthread_mutex_unlock(&AO_pt_lock); return 0; } #define AO_HAVE_compare_double_and_swap_double_full AO_INLINE int AO_compare_and_swap_double_full(volatile AO_double_t *addr, AO_t old1, AO_t new1, AO_t new2) { pthread_mutex_lock(&AO_pt_lock); if (addr -> AO_val1 == old1) { addr -> AO_val1 = new1; addr -> AO_val2 = new2; pthread_mutex_unlock(&AO_pt_lock); return 1; } else pthread_mutex_unlock(&AO_pt_lock); return 0; } #define AO_HAVE_compare_and_swap_double_full /* We can't use hardware loads and stores, since they don't */ /* interact correctly with atomic updates. */ libatomic_ops-7.2/src/atomic_ops/sysdeps/short_aligned_atomic_load_store.h0000644000175000017500000000344611753234157024326 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Definitions for architectures on which loads and stores of unsigned short * are atomic for all legal alignments. */ AO_INLINE unsigned short AO_short_load(const volatile unsigned short *addr) { assert(((size_t)addr & (sizeof(unsigned short) - 1)) == 0); /* Cast away the volatile for architectures like IA64 where */ /* volatile adds barrier semantics. */ return (*(unsigned short *)addr); } #define AO_HAVE_short_load AO_INLINE void AO_short_store(volatile unsigned short *addr, unsigned short new_val) { assert(((size_t)addr & (sizeof(unsigned short) - 1)) == 0); (*(unsigned short *)addr) = new_val; } #define AO_HAVE_short_store libatomic_ops-7.2/src/atomic_ops/sysdeps/char_acquire_release_volatile.h0000644000175000017500000000372411753234157023761 00000000000000/* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * This file adds definitions appropriate for environments in which an unsigned char * volatile load has acquire semantics, and an unsigned char volatile store has release * semantics. This is true with the standard Itanium ABI. */ #if !defined(AO_GCC_BARRIER) # if defined(__GNUC__) # define AO_GCC_BARRIER() AO_compiler_barrier() # else # define AO_GCC_BARRIER() # endif #endif AO_INLINE unsigned char AO_char_load_acquire(const volatile unsigned char *p) { unsigned char result = *p; /* A normal volatile load generates an ld.acq */ AO_GCC_BARRIER(); return result; } #define AO_HAVE_char_load_acquire AO_INLINE void AO_char_store_release(volatile unsigned char *p, unsigned char val) { AO_GCC_BARRIER(); /* A normal volatile store generates an st.rel */ *p = val; } #define AO_HAVE_char_store_release libatomic_ops-7.2/src/atomic_ops/sysdeps/icc/0000755000175000017500000000000011753234214016365 500000000000000libatomic_ops-7.2/src/atomic_ops/sysdeps/icc/ia64.h0000644000175000017500000001416011753234157017231 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * This file specifies Itanimum primitives for use with the Intel (ecc) * compiler. We use intrinsics instead of the inline assembly code in the * gcc file. */ #include "../all_atomic_load_store.h" #include "../test_and_set_t_is_char.h" #include /* The acquire release semantics of volatile can be turned off. And volatile */ /* operations in icc9 don't imply ordering with respect to other nonvolatile */ /* operations. */ #define AO_INTEL_PTR_t void * AO_INLINE AO_t AO_load_acquire(const volatile AO_t *p) { return (AO_t)(__ld8_acq((AO_INTEL_PTR_t)p)); } #define AO_HAVE_load_acquire AO_INLINE void AO_store_release(volatile AO_t *p, AO_t val) { __st8_rel((AO_INTEL_PTR_t)p, (__int64)val); } #define AO_HAVE_store_release AO_INLINE unsigned char AO_char_load_acquire(const volatile unsigned char *p) { /* A normal volatile load generates an ld.acq */ return (__ld1_acq((AO_INTEL_PTR_t)p)); } #define AO_HAVE_char_load_acquire AO_INLINE void AO_char_store_release(volatile unsigned char *p, unsigned char val) { __st1_rel((AO_INTEL_PTR_t)p, val); } #define AO_HAVE_char_store_release AO_INLINE unsigned short AO_short_load_acquire(const volatile unsigned short *p) { /* A normal volatile load generates an ld.acq */ return (__ld2_acq((AO_INTEL_PTR_t)p)); } #define AO_HAVE_short_load_acquire AO_INLINE void AO_short_store_release(volatile unsigned short *p, unsigned short val) { __st2_rel((AO_INTEL_PTR_t)p, val); } #define AO_HAVE_short_store_release AO_INLINE unsigned int AO_int_load_acquire(const volatile unsigned int *p) { /* A normal volatile load generates an ld.acq */ return (__ld4_acq((AO_INTEL_PTR_t)p)); } #define AO_HAVE_int_load_acquire AO_INLINE void AO_int_store_release(volatile unsigned int *p, unsigned int val) { __st4_rel((AO_INTEL_PTR_t)p, val); } #define AO_HAVE_int_store_release AO_INLINE void AO_nop_full(void) { __mf(); } #define AO_HAVE_nop_full AO_INLINE AO_t AO_fetch_and_add1_acquire (volatile AO_t *p) { return __fetchadd8_acq((unsigned __int64 *)p, 1); } #define AO_HAVE_fetch_and_add1_acquire AO_INLINE AO_t AO_fetch_and_add1_release (volatile AO_t *p) { return __fetchadd8_rel((unsigned __int64 *)p, 1); } #define AO_HAVE_fetch_and_add1_release AO_INLINE AO_t AO_fetch_and_sub1_acquire (volatile AO_t *p) { return __fetchadd8_acq((unsigned __int64 *)p, -1); } #define AO_HAVE_fetch_and_sub1_acquire AO_INLINE AO_t AO_fetch_and_sub1_release (volatile AO_t *p) { return __fetchadd8_rel((unsigned __int64 *)p, -1); } #define AO_HAVE_fetch_and_sub1_release AO_INLINE int AO_compare_and_swap_acquire(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t oldval; oldval = _InterlockedCompareExchange64_acq(addr, new_val, old); return (oldval == old); } #define AO_HAVE_compare_and_swap_acquire AO_INLINE int AO_compare_and_swap_release(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t oldval; oldval = _InterlockedCompareExchange64_rel(addr, new_val, old); return (oldval == old); } #define AO_HAVE_compare_and_swap_release AO_INLINE int AO_char_compare_and_swap_acquire(volatile unsigned char *addr, unsigned char old, unsigned char new_val) { unsigned char oldval; oldval = _InterlockedCompareExchange8_acq(addr, new_val, old); return (oldval == old); } #define AO_HAVE_char_compare_and_swap_acquire AO_INLINE int AO_char_compare_and_swap_release(volatile unsigned char *addr, unsigned char old, unsigned char new_val) { unsigned char oldval; oldval = _InterlockedCompareExchange8_rel(addr, new_val, old); return (oldval == old); } #define AO_HAVE_char_compare_and_swap_release AO_INLINE int AO_short_compare_and_swap_acquire(volatile unsigned short *addr, unsigned short old, unsigned short new_val) { unsigned short oldval; oldval = _InterlockedCompareExchange16_acq(addr, new_val, old); return (oldval == old); } #define AO_HAVE_short_compare_and_swap_acquire AO_INLINE int AO_short_compare_and_swap_release(volatile unsigned short *addr, unsigned short old, unsigned short new_val) { unsigned short oldval; oldval = _InterlockedCompareExchange16_rel(addr, new_val, old); return (oldval == old); } #define AO_HAVE_short_compare_and_swap_release AO_INLINE int AO_int_compare_and_swap_acquire(volatile unsigned int *addr, unsigned int old, unsigned int new_val) { unsigned int oldval; oldval = _InterlockedCompareExchange_acq(addr, new_val, old); return (oldval == old); } #define AO_HAVE_int_compare_and_swap_acquire AO_INLINE int AO_int_compare_and_swap_release(volatile unsigned int *addr, unsigned int old, unsigned int new_val) { unsigned int oldval; oldval = _InterlockedCompareExchange_rel(addr, new_val, old); return (oldval == old); } #define AO_HAVE_int_compare_and_swap_release libatomic_ops-7.2/src/atomic_ops/sysdeps/ibmc/0000755000175000017500000000000011753234214016541 500000000000000libatomic_ops-7.2/src/atomic_ops/sysdeps/ibmc/powerpc.h0000644000175000017500000000730211753234157020321 00000000000000/* FIXME. This is only a placeholder for the AIX compiler. */ /* It doesn't work. Please send a patch. */ /* Memory model documented at http://www-106.ibm.com/developerworks/ */ /* eserver/articles/archguide.html and (clearer) */ /* http://www-106.ibm.com/developerworks/eserver/articles/powerpc.html. */ /* There appears to be no implicit ordering between any kind of */ /* independent memory references. */ /* Architecture enforces some ordering based on control dependence. */ /* I don't know if that could help. */ /* Data-dependent loads are always ordered. */ /* Based on the above references, eieio is intended for use on */ /* uncached memory, which we don't support. It does not order loads */ /* from cached memory. */ /* Thanks to Maged Michael, Doug Lea, and Roger Hoover for helping to */ /* track some of this down and correcting my misunderstandings. -HB */ #include "../all_aligned_atomic_load_store.h" void AO_sync(void); #pragma mc_func AO_sync { "7c0004ac" } #ifdef __NO_LWSYNC__ # define AO_lwsync AO_sync #else void AO_lwsync(void); #pragma mc_func AO_lwsync { "7c2004ac" } #endif #define AO_nop_write() AO_lwsync() #define AO_HAVE_nop_write #define AO_nop_read() AO_lwsync() #define AO_HAVE_nop_read /* We explicitly specify load_acquire and store_release, since these */ /* rely on the fact that lwsync is also a LoadStore barrier. */ AO_INLINE AO_t AO_load_acquire(const volatile AO_t *addr) { AO_t result = *addr; AO_lwsync(); return result; } #define AO_HAVE_load_acquire AO_INLINE void AO_store_release(volatile AO_t *addr, AO_t value) { AO_lwsync(); *addr = value; } #define AO_HAVE_store_release /* This is similar to the code in the garbage collector. Deleting */ /* this and having it synthesized from compare_and_swap would probably */ /* only cost us a load immediate instruction. */ /*AO_INLINE AO_TS_VAL_t AO_test_and_set(volatile AO_TS_t *addr) { # error FIXME Implement me } #define AO_HAVE_test_and_set*/ AO_INLINE AO_TS_VAL_t AO_test_and_set_acquire(volatile AO_TS_t *addr) { AO_TS_VAL_t result = AO_test_and_set(addr); AO_lwsync(); return result; } #define AO_HAVE_test_and_set_acquire AO_INLINE AO_TS_VAL_t AO_test_and_set_release(volatile AO_TS_t *addr) { AO_lwsync(); return AO_test_and_set(addr); } #define AO_HAVE_test_and_set_release AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { AO_TS_VAL_t result; AO_lwsync(); result = AO_test_and_set(addr); AO_lwsync(); return result; } #define AO_HAVE_test_and_set_full /*AO_INLINE int AO_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val) { # error FIXME Implement me } #define AO_HAVE_compare_and_swap*/ AO_INLINE int AO_compare_and_swap_acquire(volatile AO_t *addr, AO_t old, AO_t new_val) { int result = AO_compare_and_swap(addr, old, new_val); AO_lwsync(); return result; } #define AO_HAVE_compare_and_swap_acquire AO_INLINE int AO_compare_and_swap_release(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_lwsync(); return AO_compare_and_swap(addr, old, new_val); } #define AO_HAVE_compare_and_swap_release AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { int result; AO_lwsync(); result = AO_compare_and_swap(addr, old, new_val); AO_lwsync(); return result; } #define AO_HAVE_compare_and_swap_full /* FIXME: We should also implement fetch_and_add and or primitives */ /* directly. */ libatomic_ops-7.2/src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h0000644000175000017500000000313411753234157022423 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * These are common definitions for architectures on which test_and_set * operates on pointer-sized quantities, the "clear" value contains * all zeroes, and the "set" value contains only one lowest bit set. * This can be used if test_and_set is synthesized from compare_and_swap. */ typedef enum {AO_TS_clear = 0, AO_TS_set = 1} AO_TS_val; #define AO_TS_VAL_t AO_TS_val #define AO_TS_CLEAR AO_TS_clear #define AO_TS_SET AO_TS_set #define AO_TS_t AO_t #define AO_AO_TS_T 1 libatomic_ops-7.2/src/atomic_ops/sysdeps/ao_t_is_int.h0000644000175000017500000001234411753234157020221 00000000000000/* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Inclusion of this file signifies that AO_t is in fact int. Hence * any AO_... operations can also server as AO_int_... operations. * We currently define only the more important ones here, and allow for * the normal generalization process to define the others. * We should probably add others in the future. */ #if defined(AO_HAVE_compare_and_swap_full) && \ !defined(AO_HAVE_int_compare_and_swap_full) # define AO_int_compare_and_swap_full(addr, old, new_val) \ AO_compare_and_swap_full((volatile AO_t *)(addr), \ (AO_t)(old), (AO_t)(new_val)) # define AO_HAVE_int_compare_and_swap_full # endif #if defined(AO_HAVE_compare_and_swap_acquire) && \ !defined(AO_HAVE_int_compare_and_swap_acquire) # define AO_int_compare_and_swap_acquire(addr, old, new_val) \ AO_compare_and_swap_acquire((volatile AO_t *)(addr), \ (AO_t)(old), (AO_t)(new_val)) # define AO_HAVE_int_compare_and_swap_acquire # endif #if defined(AO_HAVE_compare_and_swap_release) && \ !defined(AO_HAVE_int_compare_and_swap_release) # define AO_int_compare_and_swap_release(addr, old, new_val) \ AO_compare_and_swap_release((volatile AO_t *)(addr), \ (AO_t)(old), (AO_t)(new_val)) # define AO_HAVE_int_compare_and_swap_release # endif #if defined(AO_HAVE_compare_and_swap_write) && \ !defined(AO_HAVE_int_compare_and_swap_write) # define AO_int_compare_and_swap_write(addr, old, new_val) \ AO_compare_and_swap_write((volatile AO_t *)(addr), \ (AO_t)(old), (AO_t)(new_val)) # define AO_HAVE_int_compare_and_swap_write # endif #if defined(AO_HAVE_compare_and_swap_read) && \ !defined(AO_HAVE_int_compare_and_swap_read) # define AO_int_compare_and_swap_read(addr, old, new_val) \ AO_compare_and_swap_read((volatile AO_t *)(addr), \ (AO_t)(old), (AO_t)(new_val)) # define AO_HAVE_int_compare_and_swap_read # endif #if defined(AO_HAVE_compare_and_swap) && \ !defined(AO_HAVE_int_compare_and_swap) # define AO_int_compare_and_swap(addr, old, new_val) \ AO_compare_and_swap((volatile AO_t *)(addr), \ (AO_t)(old), (AO_t)(new_val)) # define AO_HAVE_int_compare_and_swap # endif #if defined(AO_HAVE_load_acquire) && \ !defined(AO_HAVE_int_load_acquire) # define AO_int_load_acquire(addr) \ (int)AO_load_acquire((const volatile AO_t *)(addr)) # define AO_HAVE_int_load_acquire # endif #if defined(AO_HAVE_store_release) && \ !defined(AO_HAVE_int_store_release) # define AO_int_store_release(addr, val) \ AO_store_release((volatile AO_t *)(addr), (AO_t)(val)) # define AO_HAVE_int_store_release # endif #if defined(AO_HAVE_fetch_and_add_full) && \ !defined(AO_HAVE_int_fetch_and_add_full) # define AO_int_fetch_and_add_full(addr, incr) \ (int)AO_fetch_and_add_full((volatile AO_t *)(addr), (AO_t)(incr)) # define AO_HAVE_int_fetch_and_add_full # endif #if defined(AO_HAVE_fetch_and_add1_acquire) && \ !defined(AO_HAVE_int_fetch_and_add1_acquire) # define AO_int_fetch_and_add1_acquire(addr) \ (int)AO_fetch_and_add1_acquire((volatile AO_t *)(addr)) # define AO_HAVE_int_fetch_and_add1_acquire # endif #if defined(AO_HAVE_fetch_and_add1_release) && \ !defined(AO_HAVE_int_fetch_and_add1_release) # define AO_int_fetch_and_add1_release(addr) \ (int)AO_fetch_and_add1_release((volatile AO_t *)(addr)) # define AO_HAVE_int_fetch_and_add1_release # endif #if defined(AO_HAVE_fetch_and_sub1_acquire) && \ !defined(AO_HAVE_int_fetch_and_sub1_acquire) # define AO_int_fetch_and_sub1_acquire(addr) \ (int)AO_fetch_and_sub1_acquire((volatile AO_t *)(addr)) # define AO_HAVE_int_fetch_and_sub1_acquire # endif #if defined(AO_HAVE_fetch_and_sub1_release) && \ !defined(AO_HAVE_int_fetch_and_sub1_release) # define AO_int_fetch_and_sub1_release(addr) \ (int)AO_fetch_and_sub1_release((volatile AO_t *)(addr)) # define AO_HAVE_int_fetch_and_sub1_release # endif libatomic_ops-7.2/src/atomic_ops/sysdeps/Makefile.am0000644000175000017500000000242611753234157017615 00000000000000#General sysdep utility headers, followed by the arch-specific ones nobase_sysdep_HEADERS= generic_pthread.h \ atomic_load_store.h \ aligned_atomic_load_store.h \ acquire_release_volatile.h \ char_acquire_release_volatile.h \ char_atomic_load_store.h \ short_acquire_release_volatile.h \ short_aligned_atomic_load_store.h \ short_atomic_load_store.h \ int_acquire_release_volatile.h \ int_aligned_atomic_load_store.h \ int_atomic_load_store.h \ all_acquire_release_volatile.h \ all_aligned_atomic_load_store.h \ all_atomic_load_store.h \ read_ordered.h \ ordered_except_wr.h \ ordered.h \ ao_t_is_int.h \ test_and_set_t_is_ao_t.h \ test_and_set_t_is_char.h \ emul_cas.h \ standard_ao_double_t.h \ README \ \ armcc/arm_v6.h \ \ gcc/alpha.h gcc/arm.h gcc/avr32.h gcc/cris.h \ gcc/hexagon.h gcc/hppa.h gcc/ia64.h gcc/m68k.h \ gcc/mips.h gcc/powerpc.h gcc/s390.h \ gcc/sh.h gcc/sparc.h gcc/x86.h gcc/x86_64.h \ \ hpc/hppa.h hpc/ia64.h \ \ ibmc/powerpc.h \ \ icc/ia64.h \ \ msftc/arm.h msftc/common32_defs.h msftc/x86.h \ msftc/x86_64.h \ \ sunc/sparc.h sunc/x86.h sunc/x86_64.h sysdepdir= ${includedir}/atomic_ops/sysdeps # A few architectures require special .S files EXTRA_DIST = sunc/sparc.S libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/0000755000175000017500000000000011753234214016363 500000000000000libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/alpha.h0000644000175000017500000000367511753234157017562 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * */ #include "../atomic_load_store.h" #include "../test_and_set_t_is_ao_t.h" #define AO_NO_DD_ORDERING /* Data dependence does not imply read ordering. */ AO_INLINE void AO_nop_full(void) { __asm__ __volatile__("mb" : : : "memory"); } #define AO_HAVE_nop_full AO_INLINE void AO_nop_write(void) { __asm__ __volatile__("wmb" : : : "memory"); } #define AO_HAVE_nop_write /* mb should be used for AO_nop_read(). That's the default. */ /* We believe that ldq_l ... stq_c does not imply any memory barrier. */ /* We should add an explicit fetch_and_add definition. */ AO_INLINE int AO_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val) { unsigned long was_equal; unsigned long temp; __asm__ __volatile__( "1: ldq_l %0,%1\n" " cmpeq %0,%4,%2\n" " mov %3,%0\n" " beq %2,2f\n" " stq_c %0,%1\n" " beq %0,1b\n" "2:\n" :"=&r" (temp), "=m" (*addr), "=&r" (was_equal) : "r" (new_val), "Ir" (old) :"memory"); return (int)was_equal; } #define AO_HAVE_compare_and_swap libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/arm.h0000644000175000017500000003207111753234157017244 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * */ #include "../read_ordered.h" #include "../test_and_set_t_is_ao_t.h" /* Probably suboptimal */ /* NEC LE-IT: ARMv6 is the first architecture providing support for */ /* simple LL/SC. A data memory barrier must be raised via CP15 command */ /* (see documentation). */ /* ARMv7 is compatible to ARMv6 but has a simpler command for issuing */ /* a memory barrier (DMB). Raising it via CP15 should still work as */ /* told me by the support engineers. If it turns out to be much quicker */ /* than we should implement custom code for ARMv7 using the asm { dmb } */ /* instruction. */ /* If only a single processor is used, we can define AO_UNIPROCESSOR */ /* and do not need to access CP15 for ensuring a DMB. */ #if defined(__thumb__) && !defined(__thumb2__) /* Thumb One mode does not have ARM "mcr", "swp" and some load/store */ /* instructions, so we temporarily switch to ARM mode and go back */ /* afterwards (clobbering "r3" register). */ # define AO_THUMB_GO_ARM \ " adr r3, 4f\n" \ " bx r3\n" \ " .align\n" \ " .arm\n" \ "4:\n" # define AO_THUMB_RESTORE_MODE \ " adr r3, 5f + 1\n" \ " bx r3\n" \ " .thumb\n" \ "5:\n" # define AO_THUMB_SWITCH_CLOBBERS "r3", #else # define AO_THUMB_GO_ARM /* empty */ # define AO_THUMB_RESTORE_MODE /* empty */ # define AO_THUMB_SWITCH_CLOBBERS /* empty */ #endif /* !__thumb__ */ /* NEC LE-IT: gcc has no way to easily check the arm architecture */ /* but it defines only one (or several) of __ARM_ARCH_x__ to be true. */ #if !defined(__ARM_ARCH_2__) && !defined(__ARM_ARCH_3__) \ && !defined(__ARM_ARCH_3M__) && !defined(__ARM_ARCH_4__) \ && !defined(__ARM_ARCH_4T__) \ && ((!defined(__ARM_ARCH_5__) && !defined(__ARM_ARCH_5E__) \ && !defined(__ARM_ARCH_5T__) && !defined(__ARM_ARCH_5TE__) \ && !defined(__ARM_ARCH_5TEJ__) && !defined(__ARM_ARCH_6M__)) \ || defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)) #include "../standard_ao_double_t.h" AO_INLINE void AO_nop_full(void) { # ifndef AO_UNIPROCESSOR unsigned dest = 0; /* Issue a data memory barrier (keeps ordering of memory */ /* transactions before and after this operation). */ __asm__ __volatile__("@AO_nop_full\n" AO_THUMB_GO_ARM " mcr p15,0,%0,c7,c10,5\n" AO_THUMB_RESTORE_MODE : "=&r"(dest) : /* empty */ : AO_THUMB_SWITCH_CLOBBERS "memory"); # endif } #define AO_HAVE_nop_full /* NEC LE-IT: AO_t load is simple reading */ AO_INLINE AO_t AO_load(const volatile AO_t *addr) { /* Cast away the volatile for architectures like IA64 where */ /* volatile adds barrier semantics. */ return (*(const AO_t *)addr); } #define AO_HAVE_load /* NEC LE-IT: atomic "store" - according to ARM documentation this is * the only safe way to set variables also used in LL/SC environment. * A direct write won't be recognized by the LL/SC construct on the _same_ CPU. * * Support engineers response for behaviour of ARMv6: * Core1 Core2 SUCCESS =================================== LDREX(x) STREX(x) Yes ----------------------------------- LDREX(x) STR(x) STREX(x) No ----------------------------------- LDREX(x) STR(x) STREX(x) Yes ----------------------------------- * * ARMv7 behaves similar, see documentation CortexA8 TRM, point 8.5 * * HB: I think this is only a problem if interrupt handlers do not clear * the reservation, as they almost certainly should. Probably change this back * in a while? */ AO_INLINE void AO_store(volatile AO_t *addr, AO_t value) { AO_t flag; __asm__ __volatile__("@AO_store\n" AO_THUMB_GO_ARM "1: ldrex %0, [%2]\n" " strex %0, %3, [%2]\n" " teq %0, #0\n" " bne 1b\n" AO_THUMB_RESTORE_MODE : "=&r"(flag), "+m"(*addr) : "r" (addr), "r"(value) : AO_THUMB_SWITCH_CLOBBERS "cc"); } #define AO_HAVE_store /* NEC LE-IT: replace the SWAP as recommended by ARM: "Applies to: ARM11 Cores Though the SWP instruction will still work with ARM V6 cores, it is recommended to use the new V6 synchronization instructions. The SWP instruction produces 'locked' read and write accesses which are atomic, i.e. another operation cannot be done between these locked accesses which ties up external bus (AHB, AXI) bandwidth and can increase worst case interrupt latencies. LDREX, STREX are more flexible, other instructions can be done between the LDREX and STREX accesses." */ #if !defined(AO_FORCE_USE_SWP) || defined(__thumb2__) /* But, on the other hand, there could be a considerable performance */ /* degradation in case of a race. Eg., test_atomic.c executing */ /* test_and_set test on a dual-core ARMv7 processor using LDREX/STREX */ /* showed around 35 times lower performance than that using SWP. */ /* To force use of SWP instruction, use -D AO_FORCE_USE_SWP option */ /* (this is ignored in the Thumb-2 mode as SWP is missing there). */ AO_INLINE AO_TS_VAL_t AO_test_and_set(volatile AO_TS_t *addr) { AO_TS_VAL_t oldval; unsigned long flag; __asm__ __volatile__("@AO_test_and_set\n" AO_THUMB_GO_ARM "1: ldrex %0, [%3]\n" " strex %1, %4, [%3]\n" " teq %1, #0\n" " bne 1b\n" AO_THUMB_RESTORE_MODE : "=&r"(oldval), "=&r"(flag), "+m"(*addr) : "r"(addr), "r"(1) : AO_THUMB_SWITCH_CLOBBERS "cc"); return oldval; } # define AO_HAVE_test_and_set #endif /* !AO_FORCE_USE_SWP */ /* NEC LE-IT: fetch and add for ARMv6 */ AO_INLINE AO_t AO_fetch_and_add(volatile AO_t *p, AO_t incr) { unsigned long flag, tmp; AO_t result; __asm__ __volatile__("@AO_fetch_and_add\n" AO_THUMB_GO_ARM "1: ldrex %0, [%5]\n" /* get original */ " add %2, %0, %4\n" /* sum up in incr */ " strex %1, %2, [%5]\n" /* store them */ " teq %1, #0\n" " bne 1b\n" AO_THUMB_RESTORE_MODE : "=&r"(result), "=&r"(flag), "=&r"(tmp), "+m"(*p) /* 0..3 */ : "r"(incr), "r"(p) /* 4..5 */ : AO_THUMB_SWITCH_CLOBBERS "cc"); return result; } #define AO_HAVE_fetch_and_add /* NEC LE-IT: fetch and add1 for ARMv6 */ AO_INLINE AO_t AO_fetch_and_add1(volatile AO_t *p) { unsigned long flag, tmp; AO_t result; __asm__ __volatile__("@AO_fetch_and_add1\n" AO_THUMB_GO_ARM "1: ldrex %0, [%4]\n" /* get original */ " add %1, %0, #1\n" /* increment */ " strex %2, %1, [%4]\n" /* store them */ " teq %2, #0\n" " bne 1b\n" AO_THUMB_RESTORE_MODE : "=&r"(result), "=&r"(tmp), "=&r"(flag), "+m"(*p) : "r"(p) : AO_THUMB_SWITCH_CLOBBERS "cc"); return result; } #define AO_HAVE_fetch_and_add1 /* NEC LE-IT: fetch and sub for ARMv6 */ AO_INLINE AO_t AO_fetch_and_sub1(volatile AO_t *p) { unsigned long flag, tmp; AO_t result; __asm__ __volatile__("@AO_fetch_and_sub1\n" AO_THUMB_GO_ARM "1: ldrex %0, [%4]\n" /* get original */ " sub %1, %0, #1\n" /* decrement */ " strex %2, %1, [%4]\n" /* store them */ " teq %2, #0\n" " bne 1b\n" AO_THUMB_RESTORE_MODE : "=&r"(result), "=&r"(tmp), "=&r"(flag), "+m"(*p) : "r"(p) : AO_THUMB_SWITCH_CLOBBERS "cc"); return result; } #define AO_HAVE_fetch_and_sub1 /* NEC LE-IT: compare and swap */ /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap(volatile AO_t *addr, AO_t old_val, AO_t new_val) { AO_t result, tmp; __asm__ __volatile__("@AO_compare_and_swap\n" AO_THUMB_GO_ARM "1: mov %0, #2\n" /* store a flag */ " ldrex %1, [%3]\n" /* get original */ " teq %1, %4\n" /* see if match */ # ifdef __thumb2__ " it eq\n" # endif " strexeq %0, %5, [%3]\n" /* store new one if matched */ " teq %0, #1\n" " beq 1b\n" /* if update failed, repeat */ AO_THUMB_RESTORE_MODE : "=&r"(result), "=&r"(tmp), "+m"(*addr) : "r"(addr), "r"(old_val), "r"(new_val) : AO_THUMB_SWITCH_CLOBBERS "cc"); return !(result&2); /* if succeded, return 1, else 0 */ } #define AO_HAVE_compare_and_swap #if !defined(__ARM_ARCH_6__) && !defined(__ARM_ARCH_6J__) \ && !defined(__ARM_ARCH_6T2__) && !defined(__ARM_ARCH_6Z__) \ && !defined(__ARM_ARCH_6ZT2__) && (!defined(__thumb__) \ || (defined(__thumb2__) && !defined(__ARM_ARCH_7__) \ && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__))) /* LDREXD/STREXD present in ARMv6K/M+ (see gas/config/tc-arm.c) */ /* In the Thumb mode, this works only starting from ARMv7 (except for */ /* the base and 'M' models). */ AO_INLINE int AO_compare_double_and_swap_double(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { double_ptr_storage old_val = ((double_ptr_storage)old_val2 << 32) | old_val1; double_ptr_storage new_val = ((double_ptr_storage)new_val2 << 32) | new_val1; double_ptr_storage tmp; int result = 1; do { __asm__ __volatile__("@AO_compare_double_and_swap_double\n" " ldrexd %0, [%1]\n" /* get original to r1 & r2 */ : "=&r"(tmp) : "r"(addr) : "cc"); if (tmp != old_val) break; __asm__ __volatile__( " strexd %0, %2, [%3]\n" /* store new one if matched */ : "=&r"(result), "+m"(*addr) : "r"(new_val), "r"(addr) : "cc"); } while (result); return !result; /* if succeded, return 1 else 0 */ } # define AO_HAVE_compare_double_and_swap_double #endif #else /* pre ARMv6 architectures ... */ /* I found a slide set that, if I read it correctly, claims that */ /* Loads followed by either a Load or Store are ordered, but nothing */ /* else is. */ /* It appears that SWP is the only simple memory barrier. */ #include "../all_atomic_load_store.h" /* The code should run correctly on a multi-core ARMv6+ as well. */ /* There is only a single concern related to AO_store (defined in */ /* atomic_load_store.h file): */ /* HB: Based on subsequent discussion, I think it would be OK to use an */ /* ordinary store here if we knew that interrupt handlers always */ /* cleared the reservation. They should, but there is some doubt that */ /* this is currently always the case, e.g., for Linux. */ /* ARMv6M does not support ARM mode. */ #endif /* __ARM_ARCH_x */ #if !defined(AO_HAVE_test_and_set_full) && !defined(AO_HAVE_test_and_set) \ && !defined(__ARM_ARCH_2__) && !defined(__ARM_ARCH_6M__) AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { AO_TS_VAL_t oldval; /* SWP on ARM is very similar to XCHG on x86. */ /* The first operand is the result, the second the value */ /* to be stored. Both registers must be different from addr. */ /* Make the address operand an early clobber output so it */ /* doesn't overlap with the other operands. The early clobber */ /* on oldval is necessary to prevent the compiler allocating */ /* them to the same register if they are both unused. */ __asm__ __volatile__("@AO_test_and_set_full\n" AO_THUMB_GO_ARM " swp %0, %2, [%3]\n" /* Ignore GCC "SWP is deprecated for this architecture" */ /* warning here (for ARMv6+). */ AO_THUMB_RESTORE_MODE : "=&r"(oldval), "=&r"(addr) : "r"(1), "1"(addr) : AO_THUMB_SWITCH_CLOBBERS "memory"); return oldval; } # define AO_HAVE_test_and_set_full #endif /* !AO_HAVE_test_and_set[_full] */ libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/x86_64.h0000644000175000017500000001425611753234157017430 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * * Some of the machine specific code was borrowed from our GC distribution. */ #include "../all_aligned_atomic_load_store.h" /* Real X86 implementations appear */ /* to enforce ordering between memory operations, EXCEPT that a later */ /* read can pass earlier writes, presumably due to the visible */ /* presence of store buffers. */ /* We ignore the fact that the official specs */ /* seem to be much weaker (and arguably too weak to be usable). */ #include "../ordered_except_wr.h" #include "../test_and_set_t_is_char.h" #include "../standard_ao_double_t.h" AO_INLINE void AO_nop_full(void) { /* Note: "mfence" (SSE2) is supported on all x86_64/amd64 chips. */ __asm__ __volatile__("mfence" : : : "memory"); } #define AO_HAVE_nop_full /* As far as we can tell, the lfence and sfence instructions are not */ /* currently needed or useful for cached memory accesses. */ AO_INLINE AO_t AO_fetch_and_add_full (volatile AO_t *p, AO_t incr) { AO_t result; __asm__ __volatile__ ("lock; xadd %0, %1" : "=r" (result), "=m" (*p) : "0" (incr), "m" (*p) : "memory"); return result; } #define AO_HAVE_fetch_and_add_full AO_INLINE unsigned char AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr) { unsigned char result; __asm__ __volatile__ ("lock; xaddb %0, %1" : "=q" (result), "=m" (*p) : "0" (incr), "m" (*p) : "memory"); return result; } #define AO_HAVE_char_fetch_and_add_full AO_INLINE unsigned short AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr) { unsigned short result; __asm__ __volatile__ ("lock; xaddw %0, %1" : "=r" (result), "=m" (*p) : "0" (incr), "m" (*p) : "memory"); return result; } #define AO_HAVE_short_fetch_and_add_full AO_INLINE unsigned int AO_int_fetch_and_add_full (volatile unsigned int *p, unsigned int incr) { unsigned int result; __asm__ __volatile__ ("lock; xaddl %0, %1" : "=r" (result), "=m" (*p) : "0" (incr), "m" (*p) : "memory"); return result; } #define AO_HAVE_int_fetch_and_add_full AO_INLINE void AO_or_full (volatile AO_t *p, AO_t incr) { __asm__ __volatile__ ("lock; or %1, %0" : "=m" (*p) : "r" (incr), "m" (*p) : "memory"); } #define AO_HAVE_or_full AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { unsigned char oldval; /* Note: the "xchg" instruction does not need a "lock" prefix */ __asm__ __volatile__("xchgb %0, %1" : "=q"(oldval), "=m"(*addr) : "0"((unsigned char)0xff), "m"(*addr) : "memory"); return (AO_TS_VAL_t)oldval; } #define AO_HAVE_test_and_set_full /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { # ifdef AO_USE_SYNC_CAS_BUILTIN return (int)__sync_bool_compare_and_swap(addr, old, new_val); # else char result; __asm__ __volatile__("lock; cmpxchg %3, %0; setz %1" : "=m" (*addr), "=a" (result) : "m" (*addr), "r" (new_val), "a" (old) : "memory"); return (int) result; # endif } #define AO_HAVE_compare_and_swap_full #ifdef AO_CMPXCHG16B_AVAILABLE /* NEC LE-IT: older AMD Opterons are missing this instruction. * On these machines SIGILL will be thrown. * Define AO_WEAK_DOUBLE_CAS_EMULATION to have an emulated * (lock based) version available */ /* HB: Changed this to not define either by default. There are * enough machines and tool chains around on which cmpxchg16b * doesn't work. And the emulation is unsafe by our usual rules. * Hoewever both are clearly useful in certain cases. */ AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { char result; __asm__ __volatile__("lock; cmpxchg16b %0; setz %1" : "=m"(*addr), "=a"(result) : "m"(*addr), "d" (old_val2), "a" (old_val1), "c" (new_val2), "b" (new_val1) : "memory"); return (int) result; } #define AO_HAVE_compare_double_and_swap_double_full #else /* this one provides spinlock based emulation of CAS implemented in */ /* atomic_ops.c. We probably do not want to do this here, since it is */ /* not atomic with respect to other kinds of updates of *addr. On the */ /* other hand, this may be a useful facility on occasion. */ #ifdef AO_WEAK_DOUBLE_CAS_EMULATION int AO_compare_double_and_swap_double_emulation(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2); AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { return AO_compare_double_and_swap_double_emulation(addr, old_val1, old_val2, new_val1, new_val2); } #define AO_HAVE_compare_double_and_swap_double_full #endif /* AO_WEAK_DOUBLE_CAS_EMULATION */ #endif /* AO_CMPXCHG16B_AVAILABLE */ #ifdef __ILP32__ # define AO_T_IS_INT #endif libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/powerpc.h0000644000175000017500000002412011753234157020140 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2004 Hewlett-Packard Development Company, L.P. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * */ /* Memory model documented at http://www-106.ibm.com/developerworks/ */ /* eserver/articles/archguide.html and (clearer) */ /* http://www-106.ibm.com/developerworks/eserver/articles/powerpc.html. */ /* There appears to be no implicit ordering between any kind of */ /* independent memory references. */ /* Architecture enforces some ordering based on control dependence. */ /* I don't know if that could help. */ /* Data-dependent loads are always ordered. */ /* Based on the above references, eieio is intended for use on */ /* uncached memory, which we don't support. It does not order loads */ /* from cached memory. */ /* Thanks to Maged Michael, Doug Lea, and Roger Hoover for helping to */ /* track some of this down and correcting my misunderstandings. -HB */ /* Earl Chew subsequently contributed further fixes & additions. */ #include "../all_aligned_atomic_load_store.h" #include "../test_and_set_t_is_ao_t.h" /* There seems to be no byte equivalent of lwarx, so this */ /* may really be what we want, at least in the 32-bit case. */ AO_INLINE void AO_nop_full(void) { __asm__ __volatile__("sync" : : : "memory"); } #define AO_HAVE_nop_full /* lwsync apparently works for everything but a StoreLoad barrier. */ AO_INLINE void AO_lwsync(void) { #ifdef __NO_LWSYNC__ __asm__ __volatile__("sync" : : : "memory"); #else __asm__ __volatile__("lwsync" : : : "memory"); #endif } #define AO_nop_write() AO_lwsync() #define AO_HAVE_nop_write #define AO_nop_read() AO_lwsync() #define AO_HAVE_nop_read /* We explicitly specify load_acquire, since it is important, and can */ /* be implemented relatively cheaply. It could be implemented */ /* with an ordinary load followed by a lwsync. But the general wisdom */ /* seems to be that a data dependent branch followed by an isync is */ /* cheaper. And the documentation is fairly explicit that this also */ /* has acquire semantics. */ /* ppc64 uses ld not lwz */ AO_INLINE AO_t AO_load_acquire(const volatile AO_t *addr) { AO_t result; #if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__) __asm__ __volatile__ ( "ld%U1%X1 %0,%1\n" "cmpw %0,%0\n" "bne- 1f\n" "1: isync\n" : "=r" (result) : "m"(*addr) : "memory", "cr0"); #else /* FIXME: We should get gcc to allocate one of the condition */ /* registers. I always got "impossible constraint" when I */ /* tried the "y" constraint. */ __asm__ __volatile__ ( "lwz%U1%X1 %0,%1\n" "cmpw %0,%0\n" "bne- 1f\n" "1: isync\n" : "=r" (result) : "m"(*addr) : "memory", "cc"); #endif return result; } #define AO_HAVE_load_acquire /* We explicitly specify store_release, since it relies */ /* on the fact that lwsync is also a LoadStore barrier. */ AO_INLINE void AO_store_release(volatile AO_t *addr, AO_t value) { AO_lwsync(); *addr = value; } #define AO_HAVE_store_release /* This is similar to the code in the garbage collector. Deleting */ /* this and having it synthesized from compare_and_swap would probably */ /* only cost us a load immediate instruction. */ AO_INLINE AO_TS_VAL_t AO_test_and_set(volatile AO_TS_t *addr) { #if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__) /* Completely untested. And we should be using smaller objects anyway. */ unsigned long oldval; unsigned long temp = 1; /* locked value */ __asm__ __volatile__( "1:ldarx %0,0,%1\n" /* load and reserve */ "cmpdi %0, 0\n" /* if load is */ "bne 2f\n" /* non-zero, return already set */ "stdcx. %2,0,%1\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ "2:\n" /* oldval is zero if we set */ : "=&r"(oldval) : "r"(addr), "r"(temp) : "memory", "cr0"); #else int oldval; int temp = 1; /* locked value */ __asm__ __volatile__( "1:lwarx %0,0,%1\n" /* load and reserve */ "cmpwi %0, 0\n" /* if load is */ "bne 2f\n" /* non-zero, return already set */ "stwcx. %2,0,%1\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ "2:\n" /* oldval is zero if we set */ : "=&r"(oldval) : "r"(addr), "r"(temp) : "memory", "cr0"); #endif return (AO_TS_VAL_t)oldval; } #define AO_HAVE_test_and_set AO_INLINE AO_TS_VAL_t AO_test_and_set_acquire(volatile AO_TS_t *addr) { AO_TS_VAL_t result = AO_test_and_set(addr); AO_lwsync(); return result; } #define AO_HAVE_test_and_set_acquire AO_INLINE AO_TS_VAL_t AO_test_and_set_release(volatile AO_TS_t *addr) { AO_lwsync(); return AO_test_and_set(addr); } #define AO_HAVE_test_and_set_release AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { AO_TS_VAL_t result; AO_lwsync(); result = AO_test_and_set(addr); AO_lwsync(); return result; } #define AO_HAVE_test_and_set_full AO_INLINE int AO_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t oldval; int result = 0; #if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__) /* FIXME: Completely untested. */ __asm__ __volatile__( "1:ldarx %0,0,%2\n" /* load and reserve */ "cmpd %0, %4\n" /* if load is not equal to */ "bne 2f\n" /* old, fail */ "stdcx. %3,0,%2\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ "li %1,1\n" /* result = 1; */ "2:\n" : "=&r"(oldval), "=&r"(result) : "r"(addr), "r"(new_val), "r"(old), "1"(result) : "memory", "cr0"); #else __asm__ __volatile__( "1:lwarx %0,0,%2\n" /* load and reserve */ "cmpw %0, %4\n" /* if load is not equal to */ "bne 2f\n" /* old, fail */ "stwcx. %3,0,%2\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ "li %1,1\n" /* result = 1; */ "2:\n" : "=&r"(oldval), "=&r"(result) : "r"(addr), "r"(new_val), "r"(old), "1"(result) : "memory", "cr0"); #endif return result; } #define AO_HAVE_compare_and_swap AO_INLINE int AO_compare_and_swap_acquire(volatile AO_t *addr, AO_t old, AO_t new_val) { int result = AO_compare_and_swap(addr, old, new_val); AO_lwsync(); return result; } #define AO_HAVE_compare_and_swap_acquire AO_INLINE int AO_compare_and_swap_release(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_lwsync(); return AO_compare_and_swap(addr, old, new_val); } #define AO_HAVE_compare_and_swap_release AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { int result; AO_lwsync(); result = AO_compare_and_swap(addr, old, new_val); AO_lwsync(); return result; } #define AO_HAVE_compare_and_swap_full AO_INLINE AO_t AO_fetch_and_add(volatile AO_t *addr, AO_t incr) { AO_t oldval; AO_t newval; #if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__) /* FIXME: Completely untested. */ __asm__ __volatile__( "1:ldarx %0,0,%2\n" /* load and reserve */ "add %1,%0,%3\n" /* increment */ "stdcx. %1,0,%2\n" /* store conditional */ "bne- 1b\n" /* retry if lost reservation */ : "=&r"(oldval), "=&r"(newval) : "r"(addr), "r"(incr) : "memory", "cr0"); #else __asm__ __volatile__( "1:lwarx %0,0,%2\n" /* load and reserve */ "add %1,%0,%3\n" /* increment */ "stwcx. %1,0,%2\n" /* store conditional */ "bne- 1b\n" /* retry if lost reservation */ : "=&r"(oldval), "=&r"(newval) : "r"(addr), "r"(incr) : "memory", "cr0"); #endif return oldval; } #define AO_HAVE_fetch_and_add AO_INLINE AO_t AO_fetch_and_add_acquire(volatile AO_t *addr, AO_t incr) { AO_t result = AO_fetch_and_add(addr, incr); AO_lwsync(); return result; } #define AO_HAVE_fetch_and_add_acquire AO_INLINE AO_t AO_fetch_and_add_release(volatile AO_t *addr, AO_t incr) { AO_lwsync(); return AO_fetch_and_add(addr, incr); } #define AO_HAVE_fetch_and_add_release AO_INLINE AO_t AO_fetch_and_add_full(volatile AO_t *addr, AO_t incr) { AO_t result; AO_lwsync(); result = AO_fetch_and_add(addr, incr); AO_lwsync(); return result; } #define AO_HAVE_fetch_and_add_full #if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__) #else # include "../ao_t_is_int.h" #endif libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/mips.h0000644000175000017500000000603511753234157017436 00000000000000/* * Copyright (c) 2005,2007 Thiemo Seufer * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. */ /* * FIXME: This should probably make finer distinctions. SGI MIPS is * much more strongly ordered, and in fact closer to sequentially * consistent. This is really aimed at modern embedded implementations. * It looks to me like this assumes a 32-bit ABI. -HB */ #include "../all_aligned_atomic_load_store.h" #include "../acquire_release_volatile.h" #include "../test_and_set_t_is_ao_t.h" #include "../standard_ao_double_t.h" /* Data dependence does not imply read ordering. */ #define AO_NO_DD_ORDERING AO_INLINE void AO_nop_full(void) { __asm__ __volatile__( " .set push \n" " .set mips2 \n" " .set noreorder \n" " .set nomacro \n" " sync \n" " .set pop " : : : "memory"); } #define AO_HAVE_nop_full AO_INLINE int AO_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val) { register int was_equal = 0; register int temp; __asm__ __volatile__( " .set push \n" " .set mips2 \n" " .set noreorder \n" " .set nomacro \n" "1: ll %0, %1 \n" " bne %0, %4, 2f \n" " move %0, %3 \n" " sc %0, %1 \n" " .set pop \n" " beqz %0, 1b \n" " li %2, 1 \n" "2: " : "=&r" (temp), "+R" (*addr), "+r" (was_equal) : "r" (new_val), "r" (old) : "memory"); return was_equal; } #define AO_HAVE_compare_and_swap /* FIXME: I think the implementations below should be automatically */ /* generated if we omit them. - HB */ AO_INLINE int AO_compare_and_swap_acquire(volatile AO_t *addr, AO_t old, AO_t new_val) { int result = AO_compare_and_swap(addr, old, new_val); AO_nop_full(); return result; } #define AO_HAVE_compare_and_swap_acquire AO_INLINE int AO_compare_and_swap_release(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_nop_full(); return AO_compare_and_swap(addr, old, new_val); } #define AO_HAVE_compare_and_swap_release AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { int result; AO_nop_full(); result = AO_compare_and_swap(addr, old, new_val); AO_nop_full(); return result; } #define AO_HAVE_compare_and_swap_full /* * FIXME: We should also implement fetch_and_add and or primitives * directly. */ #include "../ao_t_is_int.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/s390.h0000644000175000017500000000475111753234157017167 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * */ /* FIXME: untested. */ /* The relevant documentation appears to be at */ /* http://publibz.boulder.ibm.com/epubs/pdf/dz9zr003.pdf */ /* around page 5-96. Apparently: */ /* - Memory references in general are atomic only for a single */ /* byte. But it appears that the most common load/store */ /* instructions also guarantee atomicity for aligned */ /* operands of standard types. WE FOOLISHLY ASSUME that */ /* compilers only generate those. If that turns out to be */ /* wrong, we need inline assembly code for AO_load and */ /* AO_store. */ /* - A store followed by a load is unordered since the store */ /* may be delayed. Otherwise everything is ordered. */ /* - There is a hardware compare-and-swap (CS) instruction. */ #include "../ordered_except_wr.h" #include "../all_aligned_atomic_load_store.h" #include "../test_and_set_t_is_ao_t.h" /* FIXME: Is there a way to do byte-sized test-and-set? */ /* FIXME: AO_nop_full should probably be implemented directly. */ /* It appears that certain BCR instructions have that effect. */ /* Presumably they're cheaper than CS? */ AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { int retval; __asm__ __volatile__ ( # ifndef __s390x__ " cs %1,%2,0(%3)\n" # else " csg %1,%2,0(%3)\n" # endif " ipm %0\n" " srl %0,28\n" : "=&d" (retval), "+d" (old) : "d" (new_val), "a" (addr) : "cc", "memory"); return retval == 0; } #define AO_HAVE_compare_and_swap_full /* FIXME: Add double-wide compare-and-swap for 32-bit executables. */ libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/m68k.h0000644000175000017500000000425611753234157017256 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * */ /* The cas instruction causes an emulation trap for the */ /* 060 with a misaligned pointer, so let's avoid this. */ #undef AO_t typedef unsigned long AO_t __attribute__ ((aligned (4))); /* FIXME. Very incomplete. */ #include "../all_aligned_atomic_load_store.h" /* Are there any m68k multiprocessors still around? */ /* AFAIK, Alliants were sequentially consistent. */ #include "../ordered.h" #include "../test_and_set_t_is_char.h" /* Contributed by Tony Mantler or new. Should be changed to MIT license? */ AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { AO_TS_t oldval; /* The value at addr is semi-phony. */ /* 'tas' sets bit 7 while the return */ /* value pretends all bits were set, */ /* which at least matches AO_TS_SET. */ __asm__ __volatile__( "tas %1; sne %0" : "=d" (oldval), "=m" (*addr) : "m" (*addr) : "memory"); /* This cast works due to the above. */ return (AO_TS_VAL_t)oldval; } #define AO_HAVE_test_and_set_full /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { char result; __asm__ __volatile__( "cas.l %3,%4,%1; seq %0" : "=d" (result), "=m" (*addr) : "m" (*addr), "d" (old), "d" (new_val) : "memory"); return -result; } #define AO_HAVE_compare_and_swap_full #include "../ao_t_is_int.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/ia64.h0000644000175000017500000002251711753234157017234 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include "../all_atomic_load_store.h" #include "../all_acquire_release_volatile.h" #include "../test_and_set_t_is_char.h" #ifdef _ILP32 /* 32-bit HP/UX code. */ /* This requires pointer "swizzling". Pointers need to be expanded */ /* to 64 bits using the addp4 instruction before use. This makes it */ /* hard to share code, but we try anyway. */ # define AO_LEN "4" /* We assume that addr always appears in argument position 1 in asm */ /* code. If it is clobbered due to swizzling, we also need it in */ /* second position. Any later arguments are referenced symbolically, */ /* so that we don't have to worry about their position. This requires*/ /* gcc 3.1, but you shouldn't be using anything older than that on */ /* IA64 anyway. */ /* The AO_MASK macro is a workaround for the fact that HP/UX gcc */ /* appears to otherwise store 64-bit pointers in ar.ccv, i.e. it */ /* doesn't appear to clear high bits in a pointer value we pass into */ /* assembly code, even if it is supposedly of type AO_t. */ # define AO_IN_ADDR "1"(addr) # define AO_OUT_ADDR , "=r"(addr) # define AO_SWIZZLE "addp4 %1=0,%1;;\n" # define AO_MASK(ptr) __asm__ __volatile__("zxt4 %1=%1": "=r"(ptr) : "0"(ptr)) #else # define AO_LEN "8" # define AO_IN_ADDR "r"(addr) # define AO_OUT_ADDR # define AO_SWIZZLE # define AO_MASK(ptr) /* empty */ #endif AO_INLINE void AO_nop_full(void) { __asm__ __volatile__("mf" : : : "memory"); } #define AO_HAVE_nop_full AO_INLINE AO_t AO_fetch_and_add1_acquire (volatile AO_t *addr) { AO_t result; __asm__ __volatile__ (AO_SWIZZLE "fetchadd" AO_LEN ".acq %0=[%1],1": "=r" (result) AO_OUT_ADDR: AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_fetch_and_add1_acquire AO_INLINE AO_t AO_fetch_and_add1_release (volatile AO_t *addr) { AO_t result; __asm__ __volatile__ (AO_SWIZZLE "fetchadd" AO_LEN ".rel %0=[%1],1": "=r" (result) AO_OUT_ADDR: AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_fetch_and_add1_release AO_INLINE AO_t AO_fetch_and_sub1_acquire (volatile AO_t *addr) { AO_t result; __asm__ __volatile__ (AO_SWIZZLE "fetchadd" AO_LEN ".acq %0=[%1],-1": "=r" (result) AO_OUT_ADDR: AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_fetch_and_sub1_acquire AO_INLINE AO_t AO_fetch_and_sub1_release (volatile AO_t *addr) { AO_t result; __asm__ __volatile__ (AO_SWIZZLE "fetchadd" AO_LEN ".rel %0=[%1],-1": "=r" (result) AO_OUT_ADDR: AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_fetch_and_sub1_release #ifndef _ILP32 AO_INLINE unsigned int AO_int_fetch_and_add1_acquire (volatile unsigned int *addr) { unsigned int result; __asm__ __volatile__ ("fetchadd4.acq %0=[%1],1": "=r" (result): AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_int_fetch_and_add1_acquire AO_INLINE unsigned int AO_int_fetch_and_add1_release (volatile unsigned int *addr) { unsigned int result; __asm__ __volatile__ ("fetchadd4.rel %0=[%1],1": "=r" (result): AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_int_fetch_and_add1_release AO_INLINE unsigned int AO_int_fetch_and_sub1_acquire (volatile unsigned int *addr) { unsigned int result; __asm__ __volatile__ ("fetchadd4.acq %0=[%1],-1": "=r" (result): AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_int_fetch_and_sub1_acquire AO_INLINE unsigned int AO_int_fetch_and_sub1_release (volatile unsigned int *addr) { unsigned int result; __asm__ __volatile__ ("fetchadd4.rel %0=[%1],-1": "=r" (result): AO_IN_ADDR :"memory"); return result; } #define AO_HAVE_int_fetch_and_sub1_release #endif /* !_ILP32 */ AO_INLINE int AO_compare_and_swap_acquire(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t oldval; AO_MASK(old); __asm__ __volatile__(AO_SWIZZLE "mov ar.ccv=%[old] ;; cmpxchg" AO_LEN ".acq %0=[%1],%[new_val],ar.ccv" : "=r"(oldval) AO_OUT_ADDR : AO_IN_ADDR, [new_val]"r"(new_val), [old]"r"(old) : "memory"); return (oldval == old); } #define AO_HAVE_compare_and_swap_acquire AO_INLINE int AO_compare_and_swap_release(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t oldval; AO_MASK(old); __asm__ __volatile__(AO_SWIZZLE "mov ar.ccv=%[old] ;; cmpxchg" AO_LEN ".rel %0=[%1],%[new_val],ar.ccv" : "=r"(oldval) AO_OUT_ADDR : AO_IN_ADDR, [new_val]"r"(new_val), [old]"r"(old) : "memory"); return (oldval == old); } #define AO_HAVE_compare_and_swap_release AO_INLINE int AO_char_compare_and_swap_acquire(volatile unsigned char *addr, unsigned char old, unsigned char new_val) { unsigned char oldval; __asm__ __volatile__(AO_SWIZZLE "mov ar.ccv=%[old] ;; cmpxchg1.acq %0=[%1],%[new_val],ar.ccv" : "=r"(oldval) AO_OUT_ADDR : AO_IN_ADDR, [new_val]"r"(new_val), [old]"r"((AO_t)old) : "memory"); return (oldval == old); } #define AO_HAVE_char_compare_and_swap_acquire AO_INLINE int AO_char_compare_and_swap_release(volatile unsigned char *addr, unsigned char old, unsigned char new_val) { unsigned char oldval; __asm__ __volatile__(AO_SWIZZLE "mov ar.ccv=%[old] ;; cmpxchg1.rel %0=[%1],%[new_val],ar.ccv" : "=r"(oldval) AO_OUT_ADDR : AO_IN_ADDR, [new_val]"r"(new_val), [old]"r"((AO_t)old) : "memory"); return (oldval == old); } #define AO_HAVE_char_compare_and_swap_release AO_INLINE int AO_short_compare_and_swap_acquire(volatile unsigned short *addr, unsigned short old, unsigned short new_val) { unsigned short oldval; __asm__ __volatile__(AO_SWIZZLE "mov ar.ccv=%[old] ;; cmpxchg2.acq %0=[%1],%[new_val],ar.ccv" : "=r"(oldval) AO_OUT_ADDR : AO_IN_ADDR, [new_val]"r"(new_val), [old]"r"((AO_t)old) : "memory"); return (oldval == old); } #define AO_HAVE_short_compare_and_swap_acquire AO_INLINE int AO_short_compare_and_swap_release(volatile unsigned short *addr, unsigned short old, unsigned short new_val) { unsigned short oldval; __asm__ __volatile__(AO_SWIZZLE "mov ar.ccv=%[old] ;; cmpxchg2.rel %0=[%1],%[new_val],ar.ccv" : "=r"(oldval) AO_OUT_ADDR : AO_IN_ADDR, [new_val]"r"(new_val), [old]"r"((AO_t)old) : "memory"); return (oldval == old); } #define AO_HAVE_short_compare_and_swap_release #ifndef _ILP32 AO_INLINE int AO_int_compare_and_swap_acquire(volatile unsigned int *addr, unsigned int old, unsigned int new_val) { unsigned int oldval; __asm__ __volatile__("mov ar.ccv=%3 ;; cmpxchg4.acq %0=[%1],%2,ar.ccv" : "=r"(oldval) : AO_IN_ADDR, "r"(new_val), "r"((AO_t)old) : "memory"); return (oldval == old); } #define AO_HAVE_int_compare_and_swap_acquire AO_INLINE int AO_int_compare_and_swap_release(volatile unsigned int *addr, unsigned int old, unsigned int new_val) { unsigned int oldval; __asm__ __volatile__("mov ar.ccv=%3 ;; cmpxchg4.rel %0=[%1],%2,ar.ccv" : "=r"(oldval) : AO_IN_ADDR, "r"(new_val), "r"((AO_t)old) : "memory"); return (oldval == old); } #define AO_HAVE_int_compare_and_swap_release #endif /* !_ILP32 */ /* FIXME: Add compare_and_swap_double as soon as there is widely */ /* available hardware that implements it. */ /* FIXME: Add compare_double_and_swap_double for the _ILP32 case. */ #ifdef _ILP32 /* Generalize first to define more AO_int_... primitives. */ # include "../../generalize.h" # include "../ao_t_is_int.h" #endif libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/sh.h0000644000175000017500000000170111753234157017073 00000000000000/* * Copyright (c) 2009 by Takashi YOSHII. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. */ #include "../all_atomic_load_store.h" #include "../ordered.h" /* sh has tas.b(byte) only */ #include "../test_and_set_t_is_char.h" AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { int oldval; __asm__ __volatile__( "tas.b @%1; movt %0" : "=r" (oldval) : "r" (addr) : "t", "memory"); return oldval? AO_TS_CLEAR : AO_TS_SET; } #define AO_HAVE_test_and_set_full libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/hexagon.h0000644000175000017500000000653111753234157020120 00000000000000/* * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. */ #include "../all_aligned_atomic_load_store.h" #include "../test_and_set_t_is_ao_t.h" /* There's also "isync" and "barrier"; however, for all current CPU */ /* versions, "syncht" should suffice. Likewise, it seems that the */ /* auto-defined versions of *_acquire, *_release or *_full suffice for */ /* all current ISA implementations. */ AO_INLINE void AO_nop_full(void) { __asm__ __volatile__("syncht" : : : "memory"); } #define AO_HAVE_nop_full /* The Hexagon has load-locked, store-conditional primitives, and so */ /* resulting code is very nearly identical to that of PowerPC. */ AO_INLINE AO_t AO_fetch_and_add(volatile AO_t *addr, AO_t incr) { AO_t oldval; AO_t newval; __asm__ __volatile__( "1:\n" " %0 = memw_locked(%3);\n" /* load and reserve */ " %1 = add (%0,%4);\n" /* increment */ " memw_locked(%3,p1) = %1;\n" /* store conditional */ " if (!p1) jump 1b;\n" /* retry if lost reservation */ : "=&r"(oldval), "=&r"(newval), "+m"(*addr) : "r"(addr), "r"(incr) : "memory", "p1"); return oldval; } #define AO_HAVE_fetch_and_add AO_INLINE AO_TS_VAL_t AO_test_and_set(volatile AO_TS_t *addr) { int oldval; int locked_value = 1; __asm__ __volatile__( "1:\n" " %0 = memw_locked(%2);\n" /* load and reserve */ " {\n" " p2 = cmp.eq(%0,#0);\n" /* if load is not zero, */ " if (!p2.new) jump:nt 2f; \n" /* we are done */ " }\n" " memw_locked(%2,p1) = %3;\n" /* else store conditional */ " if (!p1) jump 1b;\n" /* retry if lost reservation */ "2:\n" /* oldval is zero if we set */ : "=&r"(oldval), "+m"(*addr) : "r"(addr), "r"(locked_value) : "memory", "p1", "p2"); return (AO_TS_VAL_t)oldval; } #define AO_HAVE_test_and_set AO_INLINE int AO_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_t __oldval; int result = 0; __asm__ __volatile__( "1:\n" " %0 = memw_locked(%3);\n" /* load and reserve */ " {\n" " p2 = cmp.eq(%0,%4);\n" /* if load is not equal to */ " if (!p2.new) jump:nt 2f; \n" /* old, fail */ " }\n" " memw_locked(%3,p1) = %5;\n" /* else store conditional */ " if (!p1) jump 1b;\n" /* retry if lost reservation */ " %1 = #1\n" /* success, result = 1 */ "2:\n" : "=&r" (__oldval), "+r" (result), "+m"(*addr) : "r" (addr), "r" (old), "r" (new_val) : "p1", "p2", "memory" ); return result; } #define AO_HAVE_compare_and_swap /* Generalize first to define more AO_int_... primitives. */ #include "../../generalize.h" #include "../ao_t_is_int.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/sparc.h0000644000175000017500000000523211753234157017574 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * */ /* FIXME. Very incomplete. No support for sparc64. */ /* Non-ancient SPARCs provide compare-and-swap (casa). */ /* We should make that available. */ #include "../all_atomic_load_store.h" /* Real SPARC code uses TSO: */ #include "../ordered_except_wr.h" /* Test_and_set location is just a byte. */ #include "../test_and_set_t_is_char.h" AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { AO_TS_VAL_t oldval; __asm__ __volatile__("ldstub %1,%0" : "=r"(oldval), "=m"(*addr) : "m"(*addr) : "memory"); return oldval; } #define AO_HAVE_test_and_set_full #ifndef AO_NO_SPARC_V9 /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { char ret; __asm__ __volatile__ ("membar #StoreLoad | #LoadLoad\n\t" # if defined(__arch64__) "casx [%2],%0,%1\n\t" # else "cas [%2],%0,%1\n\t" /* 32-bit version */ # endif "membar #StoreLoad | #StoreStore\n\t" "cmp %0,%1\n\t" "be,a 0f\n\t" "mov 1,%0\n\t"/* one insn after branch always executed */ "clr %0\n\t" "0:\n\t" : "=r" (ret), "+r" (new_val) : "r" (addr), "0" (old) : "memory", "cc"); return (int)ret; } #define AO_HAVE_compare_and_swap_full #endif /* !AO_NO_SPARC_V9 */ /* FIXME: This needs to be extended for SPARC v8 and v9. */ /* SPARC V8 also has swap. V9 has CAS. */ /* There are barriers like membar #LoadStore. */ /* CASA (32-bit) and CASXA(64-bit) instructions were */ /* added in V9. */ libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/x86.h0000644000175000017500000001411711753234157017113 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * * Some of the machine specific code was borrowed from our GC distribution. */ /* The following really assume we have a 486 or better. Unfortunately */ /* gcc doesn't define a suitable feature test macro based on command */ /* line options. */ /* We should perhaps test dynamically. */ #include "../all_aligned_atomic_load_store.h" /* Real X86 implementations, except for some old WinChips, appear */ /* to enforce ordering between memory operations, EXCEPT that a later */ /* read can pass earlier writes, presumably due to the visible */ /* presence of store buffers. */ /* We ignore both the WinChips, and the fact that the official specs */ /* seem to be much weaker (and arguably too weak to be usable). */ #include "../ordered_except_wr.h" #include "../test_and_set_t_is_char.h" #include "../standard_ao_double_t.h" #if defined(AO_USE_PENTIUM4_INSTRS) AO_INLINE void AO_nop_full(void) { __asm__ __volatile__("mfence" : : : "memory"); } #define AO_HAVE_nop_full #else /* We could use the cpuid instruction. But that seems to be slower */ /* than the default implementation based on test_and_set_full. Thus */ /* we omit that bit of misinformation here. */ #endif /* As far as we can tell, the lfence and sfence instructions are not */ /* currently needed or useful for cached memory accesses. */ /* Really only works for 486 and later */ AO_INLINE AO_t AO_fetch_and_add_full (volatile AO_t *p, AO_t incr) { AO_t result; __asm__ __volatile__ ("lock; xaddl %0, %1" : "=r" (result), "=m" (*p) : "0" (incr), "m" (*p) : "memory"); return result; } #define AO_HAVE_fetch_and_add_full AO_INLINE unsigned char AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr) { unsigned char result; __asm__ __volatile__ ("lock; xaddb %0, %1" : "=q" (result), "=m" (*p) : "0" (incr), "m" (*p) : "memory"); return result; } #define AO_HAVE_char_fetch_and_add_full AO_INLINE unsigned short AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr) { unsigned short result; __asm__ __volatile__ ("lock; xaddw %0, %1" : "=r" (result), "=m" (*p) : "0" (incr), "m" (*p) : "memory"); return result; } #define AO_HAVE_short_fetch_and_add_full /* Really only works for 486 and later */ AO_INLINE void AO_or_full (volatile AO_t *p, AO_t incr) { __asm__ __volatile__ ("lock; orl %1, %0" : "=m" (*p) : "r" (incr), "m" (*p) : "memory"); } #define AO_HAVE_or_full AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { unsigned char oldval; /* Note: the "xchg" instruction does not need a "lock" prefix */ __asm__ __volatile__("xchgb %0, %1" : "=q"(oldval), "=m"(*addr) : "0"((unsigned char)0xff), "m"(*addr) : "memory"); return (AO_TS_VAL_t)oldval; } #define AO_HAVE_test_and_set_full /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { # ifdef AO_USE_SYNC_CAS_BUILTIN return (int)__sync_bool_compare_and_swap(addr, old, new_val); # else char result; __asm__ __volatile__("lock; cmpxchgl %3, %0; setz %1" : "=m" (*addr), "=a" (result) : "m" (*addr), "r" (new_val), "a" (old) : "memory"); return (int)result; # endif } #define AO_HAVE_compare_and_swap_full /* Returns nonzero if the comparison succeeded. */ /* Really requires at least a Pentium. */ AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { char result; #if __PIC__ /* If PIC is turned on, we can't use %ebx as it is reserved for the GOT pointer. We can save and restore %ebx because GCC won't be using it for anything else (such as any of the m operands) */ /* We use %edi (for new_val1) instead of a memory operand and swap */ /* instruction instead of push/pop because some GCC releases have */ /* a bug in processing memory operands (if address base is %esp) in */ /* the inline assembly after push. */ __asm__ __volatile__("xchg %%ebx,%6;" /* swap GOT ptr and new_val1 */ "lock; cmpxchg8b %0; setz %1;" "xchg %%ebx,%6;" /* restore ebx and edi */ : "=m"(*addr), "=a"(result) : "m"(*addr), "d" (old_val2), "a" (old_val1), "c" (new_val2), "D" (new_val1) : "memory"); #else /* We can't just do the same thing in non-PIC mode, because GCC * might be using %ebx as the memory operand. We could have ifdef'd * in a clobber, but there's no point doing the push/pop if we don't * have to. */ __asm__ __volatile__("lock; cmpxchg8b %0; setz %1;" : "=m"(*addr), "=a"(result) : "m"(*addr), "d" (old_val2), "a" (old_val1), "c" (new_val2), "b" (new_val1) : "memory"); #endif return (int) result; } #define AO_HAVE_compare_double_and_swap_double_full #include "../ao_t_is_int.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/avr32.h0000644000175000017500000000437111753234157017424 00000000000000/* * Copyright (C) 2009 Bradley Smith * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sublicense, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice shall be included * in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ #include "../all_atomic_load_store.h" #include "../ordered.h" /* There are no multiprocessor implementations. */ #include "../test_and_set_t_is_ao_t.h" AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { register long ret; __asm__ __volatile__( "xchg %[oldval], %[mem], %[newval]" : [oldval] "=&r"(ret) : [mem] "r"(addr), [newval] "r"(1) : "memory"); return (AO_TS_VAL_t)ret; } #define AO_HAVE_test_and_set_full AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { register long ret; __asm__ __volatile__( "1: ssrf 5\n" " ld.w %[res], %[mem]\n" " eor %[res], %[oldval]\n" " brne 2f\n" " stcond %[mem], %[newval]\n" " brne 1b\n" "2:\n" : [res] "=&r"(ret), [mem] "=m"(*addr) : "m"(*addr), [newval] "r"(new_val), [oldval] "r"(old) : "cc", "memory"); return (int)ret; } #define AO_HAVE_compare_and_swap_full libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/hppa.h0000644000175000017500000001013711753234157017414 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Modified by Carlos O'Donell , 2003 * - Added self-aligning lock. * */ #include "../all_atomic_load_store.h" /* Some architecture set descriptions include special "ordered" memory */ /* operations. As far as we can tell, no existing processors actually */ /* require those. Nor does it appear likely that future processors */ /* will. */ #include "../ordered.h" /* GCC will not guarantee the alignment we need, use four lock words */ /* and select the correctly aligned datum. See the glibc 2.3.2 */ /* linuxthread port for the original implementation. */ struct AO_pa_clearable_loc { int data[4]; }; #undef AO_TS_INITIALIZER #define AO_TS_t struct AO_pa_clearable_loc #define AO_TS_INITIALIZER {1,1,1,1} /* Switch meaning of set and clear, since we only have an atomic clear */ /* instruction. */ typedef enum {AO_PA_TS_set = 0, AO_PA_TS_clear = 1} AO_PA_TS_val; #define AO_TS_VAL_t AO_PA_TS_val #define AO_TS_CLEAR AO_PA_TS_clear #define AO_TS_SET AO_PA_TS_set /* The hppa only has one atomic read and modify memory operation, */ /* load and clear, so hppa spinlocks must use zero to signify that */ /* someone is holding the lock. The address used for the ldcw */ /* semaphore must be 16-byte aligned. */ #define __ldcw(a) ({ \ volatile unsigned int __ret; \ __asm__ __volatile__("ldcw 0(%2),%0" \ : "=r" (__ret), "=m" (*(a)) : "r" (a)); \ __ret; \ }) /* Because malloc only guarantees 8-byte alignment for malloc'd data, */ /* and GCC only guarantees 8-byte alignment for stack locals, we can't */ /* be assured of 16-byte alignment for atomic lock data even if we */ /* specify "__attribute ((aligned(16)))" in the type declaration. So, */ /* we use a struct containing an array of four ints for the atomic lock */ /* type and dynamically select the 16-byte aligned int from the array */ /* for the semaphore. */ #define __PA_LDCW_ALIGNMENT 16 #define __ldcw_align(a) ({ \ unsigned long __ret = (unsigned long) a; \ __ret += __PA_LDCW_ALIGNMENT - 1; \ __ret &= ~(__PA_LDCW_ALIGNMENT - 1); \ (volatile unsigned int *) __ret; \ }) /* Works on PA 1.1 and PA 2.0 systems */ AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t * addr) { volatile unsigned int *a = __ldcw_align (addr); return (AO_TS_VAL_t) __ldcw (a); } #define AO_HAVE_test_and_set_full AO_INLINE void AO_pa_clear(volatile AO_TS_t * addr) { volatile unsigned int *a = __ldcw_align (addr); AO_compiler_barrier(); *a = 1; } #define AO_CLEAR(addr) AO_pa_clear(addr) libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/cris.h0000644000175000017500000000553311753234157017430 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Most of this code originally comes from Hans-Peter Nilsson. It is included * here with his permission. * * This version has not been tested. It was coped here from a GC * patch so that we wouldn't lose the code in the upgrade to gc7. */ #include "../all_atomic_load_store.h" #include "../ordered.h" /* There are no multiprocessor implementations. */ #include "../test_and_set_t_is_ao_t.h" /* * The architecture apparently supports an "f" flag which is * set on preemption. This essentially gives us load-locked, * store-conditional primitives, though I'm not quite sure how * this would work on a hypothetical multiprocessor. -HB * * For details, see * http://developer.axis.com/doc/hardware/etrax100lx/prog_man/ * 1_architectural_description.pdf * * Presumably many other primitives (notably CAS, including the double- * width versions) could be implemented in this manner, if someone got * around to it. */ AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { /* Ripped from linuxthreads/sysdeps/cris/pt-machine.h */ register unsigned long int ret; /* Note the use of a dummy output of *addr to expose the write. The memory barrier is to stop *other* writes being moved past this code. */ __asm__ __volatile__("clearf\n" "0:\n\t" "movu.b [%2],%0\n\t" "ax\n\t" "move.b %3,[%2]\n\t" "bwf 0b\n\t" "clearf" : "=&r" (ret), "=m" (*addr) : "r" (addr), "r" ((int) 1), "m" (*addr) : "memory"); return ret; } #define AO_HAVE_test_and_set_full libatomic_ops-7.2/src/atomic_ops/sysdeps/short_acquire_release_volatile.h0000644000175000017500000000373711753234157024207 00000000000000/* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * This file adds definitions appropriate for environments in which an unsigned short * volatile load has acquire semantics, and an unsigned short volatile store has release * semantics. This is true with the standard Itanium ABI. */ #if !defined(AO_GCC_BARRIER) # if defined(__GNUC__) # define AO_GCC_BARRIER() AO_compiler_barrier() # else # define AO_GCC_BARRIER() # endif #endif AO_INLINE unsigned short AO_short_load_acquire(const volatile unsigned short *p) { unsigned short result = *p; /* A normal volatile load generates an ld.acq */ AO_GCC_BARRIER(); return result; } #define AO_HAVE_short_load_acquire AO_INLINE void AO_short_store_release(volatile unsigned short *p, unsigned short val) { AO_GCC_BARRIER(); /* A normal volatile store generates an st.rel */ *p = val; } #define AO_HAVE_short_store_release libatomic_ops-7.2/src/atomic_ops/sysdeps/armcc/0000755000175000017500000000000011753234214016714 500000000000000libatomic_ops-7.2/src/atomic_ops/sysdeps/armcc/arm_v6.h0000644000175000017500000001500411753234157020205 00000000000000/* * Copyright (c) 2007 by NEC LE-IT: All rights reserved. * A transcription of ARMv6 atomic operations for the ARM Realview Toolchain. * This code works with armcc from RVDS 3.1 * This is based on work in gcc/arm.h by * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * */ #include "../read_ordered.h" #include "../test_and_set_t_is_ao_t.h" /* Probably suboptimal */ #if __TARGET_ARCH_ARM < 6 Dont use with ARM instruction sets lower than v6 #else #include "../standard_ao_double_t.h" /* NEC LE-IT: ARMv6 is the first architecture providing support for simple LL/SC * A data memory barrier must be raised via CP15 command (see documentation). * * ARMv7 is compatible to ARMv6 but has a simpler command for issuing a * memory barrier (DMB). Raising it via CP15 should still work as told me by the * support engineers. If it turns out to be much quicker than we should implement * custom code for ARMv7 using the asm { dmb } command. * * If only a single processor is used, we can define AO_UNIPROCESSOR * and do not need to access CP15 for ensuring a DMB at all. */ AO_INLINE void AO_nop_full(void) { # ifndef AO_UNIPROCESSOR unsigned int dest=0; /* issue an data memory barrier (keeps ordering of memory transactions */ /* before and after this operation) */ __asm { mcr p15,0,dest,c7,c10,5 }; # endif } #define AO_HAVE_nop_full AO_INLINE AO_t AO_load(const volatile AO_t *addr) { /* Cast away the volatile in case it adds fence semantics */ return (*(const AO_t *)addr); } #define AO_HAVE_load /* NEC LE-IT: atomic "store" - according to ARM documentation this is * the only safe way to set variables also used in LL/SC environment. * A direct write won't be recognized by the LL/SC construct in other CPUs. * * HB: Based on subsequent discussion, I think it would be OK to use an * ordinary store here if we knew that interrupt handlers always cleared * the reservation. They should, but there is some doubt that this is * currently always the case for e.g. Linux. */ AO_INLINE void AO_store(volatile AO_t *addr, AO_t value) { unsigned long tmp; retry: __asm { ldrex tmp, [addr] strex tmp, value, [addr] teq tmp, #0 bne retry }; } #define AO_HAVE_store /* NEC LE-IT: replace the SWAP as recommended by ARM: "Applies to: ARM11 Cores Though the SWP instruction will still work with ARM V6 cores, it is recommended to use the new V6 synchronization instructions. The SWP instruction produces locked read and write accesses which are atomic, i.e. another operation cannot be done between these locked accesses which ties up external bus (AHB,AXI) bandwidth and can increase worst case interrupt latencies. LDREX,STREX are more flexible, other instructions can be done between the LDREX and STREX accesses. " */ AO_INLINE AO_TS_VAL_t AO_test_and_set(volatile AO_TS_t *addr) { AO_TS_VAL_t oldval; unsigned long tmp; unsigned long one = 1; retry: __asm { ldrex oldval, [addr] strex tmp, one, [addr] teq tmp, #0 bne retry } return oldval; } #define AO_HAVE_test_and_set /* NEC LE-IT: fetch and add for ARMv6 */ AO_INLINE AO_t AO_fetch_and_add(volatile AO_t *p, AO_t incr) { unsigned long tmp,tmp2; AO_t result; retry: __asm { ldrex result, [p] add tmp, incr, result strex tmp2, tmp, [p] teq tmp2, #0 bne retry } return result; } #define AO_HAVE_fetch_and_add /* NEC LE-IT: fetch and add1 for ARMv6 */ AO_INLINE AO_t AO_fetch_and_add1(volatile AO_t *p) { unsigned long tmp,tmp2; AO_t result; retry: __asm { ldrex result, [p] add tmp, result, #1 strex tmp2, tmp, [p] teq tmp2, #0 bne retry } return result; } #define AO_HAVE_fetch_and_add1 /* NEC LE-IT: fetch and sub for ARMv6 */ AO_INLINE AO_t AO_fetch_and_sub1(volatile AO_t *p) { unsigned long tmp,tmp2; AO_t result; retry: __asm { ldrex result, [p] sub tmp, result, #1 strex tmp2, tmp, [p] teq tmp2, #0 bne retry } return result; } #define AO_HAVE_fetch_and_sub1 /* NEC LE-IT: compare and swap */ /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap(volatile AO_t *addr, AO_t old_val, AO_t new_val) { AO_t result,tmp; retry: __asm__ { mov result, #2 ldrex tmp, [addr] teq tmp, old_val # ifdef __thumb__ it eq # endif strexeq result, new_val, [addr] teq result, #1 beq retry } return !(result&2); } #define AO_HAVE_compare_and_swap /* helper functions for the Realview compiler: LDREXD is not usable * with inline assembler, so use the "embedded" assembler as * suggested by ARM Dev. support (June 2008). */ __asm inline double_ptr_storage load_ex(volatile AO_double_t *addr) { LDREXD r0,r1,[r0] } __asm inline int store_ex(AO_t val1, AO_t val2, volatile AO_double_t *addr) { STREXD r3,r0,r1,[r2] MOV r0,r3 } AO_INLINE int AO_compare_double_and_swap_double(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { double_ptr_storage old_val = ((double_ptr_storage)old_val2 << 32) | old_val1; double_ptr_storage tmp; int result; while(1) { tmp = load_ex(addr); if(tmp != old_val) return 0; result = store_ex(new_val1, new_val2, addr); if(!result) return 1; } } #define AO_HAVE_compare_double_and_swap_double #endif // __TARGET_ARCH_ARM libatomic_ops-7.2/src/atomic_ops/sysdeps/acquire_release_volatile.h0000644000175000017500000000441411753234157022761 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * This file adds definitions appropriate for environments in which an AO_t * volatile load has acquire semantics, and an AO_t volatile store has release * semantics. This is arguably supposed to be true with the standard Itanium * software conventions. */ /* * Empirically gcc/ia64 does some reordering of ordinary operations around volatiles * even when we think it shouldn't. Gcc 3.3 and earlier could reorder a volatile store * with another store. As of March 2005, gcc pre-4 reused previously computed * common subexpressions across a volatile load. * Hence we now add compiler barriers for gcc. */ #if !defined(AO_GCC_BARRIER) # if defined(__GNUC__) # define AO_GCC_BARRIER() AO_compiler_barrier() # else # define AO_GCC_BARRIER() # endif #endif AO_INLINE AO_t AO_load_acquire(const volatile AO_t *p) { AO_t result = *p; /* A normal volatile load generates an ld.acq */ AO_GCC_BARRIER(); return result; } #define AO_HAVE_load_acquire AO_INLINE void AO_store_release(volatile AO_t *p, AO_t val) { AO_GCC_BARRIER(); /* A normal volatile store generates an st.rel */ *p = val; } #define AO_HAVE_store_release libatomic_ops-7.2/src/atomic_ops/sysdeps/ordered_except_wr.h0000644000175000017500000000576411753234157021446 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * These are common definitions for architectures that provide processor * ordered memory operations except that a later read may pass an * earlier write. Real x86 implementations seem to be in this category, * except apparently for some IDT WinChips, which we ignore. */ #include "read_ordered.h" AO_INLINE void AO_nop_write(void) { AO_compiler_barrier(); /* sfence according to Intel docs. Pentium 3 and up. */ /* Unnecessary for cached accesses? */ } #define AO_HAVE_nop_write #if defined(AO_HAVE_store) AO_INLINE void AO_store_write(volatile AO_t *addr, AO_t val) { AO_compiler_barrier(); AO_store(addr, val); } # define AO_HAVE_store_write # define AO_store_release(addr, val) AO_store_write(addr, val) # define AO_HAVE_store_release #endif /* AO_HAVE_store */ #if defined(AO_HAVE_char_store) AO_INLINE void AO_char_store_write(volatile unsigned char *addr, unsigned char val) { AO_compiler_barrier(); AO_char_store(addr, val); } # define AO_HAVE_char_store_write # define AO_char_store_release(addr, val) AO_char_store_write(addr, val) # define AO_HAVE_char_store_release #endif /* AO_HAVE_char_store */ #if defined(AO_HAVE_short_store) AO_INLINE void AO_short_store_write(volatile unsigned short *addr, unsigned short val) { AO_compiler_barrier(); AO_short_store(addr, val); } # define AO_HAVE_short_store_write # define AO_short_store_release(addr, val) AO_short_store_write(addr, val) # define AO_HAVE_short_store_release #endif /* AO_HAVE_short_store */ #if defined(AO_HAVE_int_store) AO_INLINE void AO_int_store_write(volatile unsigned int *addr, unsigned int val) { AO_compiler_barrier(); AO_int_store(addr, val); } # define AO_HAVE_int_store_write # define AO_int_store_release(addr, val) AO_int_store_write(addr, val) # define AO_HAVE_int_store_release #endif /* AO_HAVE_int_store */ libatomic_ops-7.2/src/atomic_ops/sysdeps/sunc/0000755000175000017500000000000011753234214016577 500000000000000libatomic_ops-7.2/src/atomic_ops/sysdeps/sunc/x86_64.h0000644000175000017500000001423711753234157017643 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * * Some of the machine specific code was borrowed from our GC distribution. */ #include "../all_aligned_atomic_load_store.h" /* Real X86 implementations, appear */ /* to enforce ordering between memory operations, EXCEPT that a later */ /* read can pass earlier writes, presumably due to the visible */ /* presence of store buffers. */ /* We ignore the fact that the official specs */ /* seem to be much weaker (and arguably too weak to be usable). */ #include "../ordered_except_wr.h" #include "../test_and_set_t_is_char.h" #include "../standard_ao_double_t.h" AO_INLINE void AO_nop_full(void) { /* Note: "mfence" (SSE2) is supported on all x86_64/amd64 chips. */ __asm__ __volatile__ ("mfence" : : : "memory"); } #define AO_HAVE_nop_full /* As far as we can tell, the lfence and sfence instructions are not */ /* currently needed or useful for cached memory accesses. */ AO_INLINE AO_t AO_fetch_and_add_full (volatile AO_t *p, AO_t incr) { AO_t result; __asm__ __volatile__ ("lock; xaddq %0, %1" : "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ : "memory"); return result; } #define AO_HAVE_fetch_and_add_full AO_INLINE unsigned char AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr) { unsigned char result; __asm__ __volatile__ ("lock; xaddb %0, %1" : "=q" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ : "memory"); return result; } #define AO_HAVE_char_fetch_and_add_full AO_INLINE unsigned short AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr) { unsigned short result; __asm__ __volatile__ ("lock; xaddw %0, %1" : "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ : "memory"); return result; } #define AO_HAVE_short_fetch_and_add_full AO_INLINE unsigned int AO_int_fetch_and_add_full (volatile unsigned int *p, unsigned int incr) { unsigned int result; __asm__ __volatile__ ("lock; xaddl %0, %1" : "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ : "memory"); return result; } #define AO_HAVE_int_fetch_and_add_full AO_INLINE void AO_or_full (volatile AO_t *p, AO_t incr) { __asm__ __volatile__ ("lock; orq %1, %0" : "=m" (*p) : "r" (incr) /* , "m" (*p) */ : "memory"); } #define AO_HAVE_or_full AO_INLINE AO_TS_VAL_t AO_test_and_set_full (volatile AO_TS_t *addr) { AO_TS_t oldval; /* Note: the "xchg" instruction does not need a "lock" prefix */ __asm__ __volatile__ ("xchg %b0, %1" : "=q"(oldval), "=m"(*addr) : "0"(0xff) /* , "m"(*addr) */ : "memory"); return (AO_TS_VAL_t)oldval; } #define AO_HAVE_test_and_set_full /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap_full (volatile AO_t *addr, AO_t old, AO_t new_val) { char result; __asm__ __volatile__ ("lock; cmpxchgq %2, %0; setz %1" : "=m"(*addr), "=a"(result) : "r" (new_val), "a"(old) : "memory"); return (int) result; } #define AO_HAVE_compare_and_swap_full #ifdef AO_CMPXCHG16B_AVAILABLE /* NEC LE-IT: older AMD Opterons are missing this instruction. * On these machines SIGILL will be thrown. * Define AO_WEAK_DOUBLE_CAS_EMULATION to have an emulated * (lock based) version available */ /* HB: Changed this to not define either by default. There are * enough machines and tool chains around on which cmpxchg16b * doesn't work. And the emulation is unsafe by our usual rules. * Hoewever both are clearly useful in certain cases. */ AO_INLINE int AO_compare_double_and_swap_double_full (volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { char result; __asm__ __volatile__ ("lock; cmpxchg16b %0; setz %1" : "=m"(*addr), "=a"(result) : "m"(*addr), "d" (old_val2), "a" (old_val1), "c" (new_val2), "b" (new_val1) : "memory"); return (int) result; } #define AO_HAVE_compare_double_and_swap_double_full #else /* this one provides spinlock based emulation of CAS implemented in */ /* atomic_ops.c. We probably do not want to do this here, since it is */ /* not atomic with respect to other kinds of updates of *addr. On the */ /* other hand, this may be a useful facility on occasion. */ #ifdef AO_WEAK_DOUBLE_CAS_EMULATION int AO_compare_double_and_swap_double_emulation(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2); AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { return AO_compare_double_and_swap_double_emulation(addr, old_val1, old_val2, new_val1, new_val2); } #define AO_HAVE_compare_double_and_swap_double_full #endif /* AO_WEAK_DOUBLE_CAS_EMULATION */ #endif /* AO_CMPXCHG16B_AVAILABLE */ libatomic_ops-7.2/src/atomic_ops/sysdeps/sunc/sparc.h0000644000175000017500000000322011753234157020003 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include "../all_atomic_load_store.h" /* Real SPARC code uses TSO: */ #include "../ordered_except_wr.h" /* Test_and_set location is just a byte. */ #include "../test_and_set_t_is_char.h" extern AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr); /* Implemented in separate .S file, for now. */ #define AO_HAVE_test_and_set_full /* FIXME: Like the gcc version, this needs to be extended for V8 */ /* and V9. */ libatomic_ops-7.2/src/atomic_ops/sysdeps/sunc/sparc.S0000644000175000017500000000013311753234157017756 00000000000000 .seg "text" .globl AO_test_and_set_full AO_test_and_set_full: retl ldstub [%o0],%o0 libatomic_ops-7.2/src/atomic_ops/sysdeps/sunc/x86.h0000644000175000017500000001332711753234157017331 00000000000000/* * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved. * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved. * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved. * * * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. * * Permission is hereby granted to use or copy this program * for any purpose, provided the above notices are retained on all copies. * Permission to modify the code and to distribute modified code is granted, * provided the above notices are retained, and a notice that the code was * modified is included with the above copyright notice. * * Some of the machine specific code was borrowed from our GC distribution. */ /* The following really assume we have a 486 or better. */ #include "../all_aligned_atomic_load_store.h" /* Real X86 implementations, except for some old WinChips, appear */ /* to enforce ordering between memory operations, EXCEPT that a later */ /* read can pass earlier writes, presumably due to the visible */ /* presence of store buffers. */ /* We ignore both the WinChips, and the fact that the official specs */ /* seem to be much weaker (and arguably too weak to be usable). */ #include "../ordered_except_wr.h" #include "../test_and_set_t_is_char.h" #include "../standard_ao_double_t.h" #if defined(AO_USE_PENTIUM4_INSTRS) AO_INLINE void AO_nop_full(void) { __asm__ __volatile__ ("mfence" : : : "memory"); } #define AO_HAVE_nop_full #else /* We could use the cpuid instruction. But that seems to be slower */ /* than the default implementation based on test_and_set_full. Thus */ /* we omit that bit of misinformation here. */ #endif /* As far as we can tell, the lfence and sfence instructions are not */ /* currently needed or useful for cached memory accesses. */ /* Really only works for 486 and later */ AO_INLINE AO_t AO_fetch_and_add_full (volatile AO_t *p, AO_t incr) { AO_t result; __asm__ __volatile__ ("lock; xaddl %0, %1" : "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ : "memory"); return result; } #define AO_HAVE_fetch_and_add_full AO_INLINE unsigned char AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr) { unsigned char result; __asm__ __volatile__ ("lock; xaddb %0, %1" : "=q" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ : "memory"); return result; } #define AO_HAVE_char_fetch_and_add_full AO_INLINE unsigned short AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr) { unsigned short result; __asm__ __volatile__ ("lock; xaddw %0, %1" : "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ : "memory"); return result; } #define AO_HAVE_short_fetch_and_add_full /* Really only works for 486 and later */ AO_INLINE void AO_or_full (volatile AO_t *p, AO_t incr) { __asm__ __volatile__ ("lock; orl %1, %0" : "=m" (*p) : "r" (incr) /* , "m" (*p) */ : "memory"); } #define AO_HAVE_or_full AO_INLINE AO_TS_VAL_t AO_test_and_set_full (volatile AO_TS_t *addr) { AO_TS_t oldval; /* Note: the "xchg" instruction does not need a "lock" prefix */ __asm__ __volatile__ ("xchg %b0, %1" : "=q"(oldval), "=m"(*addr) : "0"(0xff) /* , "m"(*addr) */ : "memory"); return (AO_TS_VAL_t)oldval; } #define AO_HAVE_test_and_set_full /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap_full (volatile AO_t *addr, AO_t old, AO_t new_val) { char result; __asm__ __volatile__ ("lock; cmpxchgl %2, %0; setz %1" : "=m"(*addr), "=a"(result) : "r" (new_val), "a"(old) : "memory"); return (int) result; } #define AO_HAVE_compare_and_swap_full #if 0 /* FIXME: not tested (and probably wrong). Besides, */ /* it tickles a bug in Sun C 5.10 (when optimizing). */ /* Returns nonzero if the comparison succeeded. */ /* Really requires at least a Pentium. */ AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { char result; #if __PIC__ /* If PIC is turned on, we can't use %ebx as it is reserved for the GOT pointer. We can save and restore %ebx because GCC won't be using it for anything else (such as any of the m operands) */ __asm__ __volatile__("pushl %%ebx;" /* save ebx used for PIC GOT ptr */ "movl %6,%%ebx;" /* move new_val1 to %ebx */ "lock; cmpxchg8b %0; setz %1;" "pop %%ebx;" /* restore %ebx */ : "=m"(*addr), "=a"(result) : "m"(*addr), "d" (old_val2), "a" (old_val1), "c" (new_val2), "m" (new_val1) : "memory"); #else /* We can't just do the same thing in non-PIC mode, because GCC * might be using %ebx as the memory operand. We could have ifdef'd * in a clobber, but there's no point doing the push/pop if we don't * have to. */ __asm__ __volatile__("lock; cmpxchg8b %0; setz %1;" : "=m"(*addr), "=a"(result) : /* "m"(*addr), */ "d" (old_val2), "a" (old_val1), "c" (new_val2), "b" (new_val1) : "memory"); #endif return (int) result; } #define AO_HAVE_compare_double_and_swap_double_full #endif #include "../ao_t_is_int.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/short_atomic_load_store.h0000644000175000017500000000327011753234157022636 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Definitions for architectures on which loads and stores of unsigned short * are atomic for all legal alignments. */ AO_INLINE unsigned short AO_short_load(const volatile unsigned short *addr) { /* Cast away the volatile for architectures like IA64 where */ /* volatile adds barrier semantics. */ return (*(const unsigned short *)addr); } #define AO_HAVE_short_load AO_INLINE void AO_short_store(volatile unsigned short *addr, unsigned short new_val) { (*(unsigned short *)addr) = new_val; } #define AO_HAVE_short_store libatomic_ops-7.2/src/atomic_ops/sysdeps/README0000644000175000017500000000054111753234157016435 00000000000000There are two kinds of entities in this directory: - Subdirectories corresponding to specific compilers (or compiler/OS combinations). Each of these includes one or more architecture-specific headers. - More generic header files corresponding to a particular ordering and/or atomicity property that might be shared by multiple hardware platforms. libatomic_ops-7.2/src/atomic_ops/sysdeps/read_ordered.h0000644000175000017500000000547211753234157020355 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * These are common definitions for architectures that provide processor * ordered memory operations except that a later read may pass an * earlier write. Real x86 implementations seem to be in this category, * except apparently for some IDT WinChips, which we ignore. */ AO_INLINE void AO_nop_read(void) { AO_compiler_barrier(); } #define AO_HAVE_nop_read #ifdef AO_HAVE_load AO_INLINE AO_t AO_load_read(const volatile AO_t *addr) { AO_t result = AO_load(addr); AO_compiler_barrier(); return result; } # define AO_HAVE_load_read # define AO_load_acquire(addr) AO_load_read(addr) # define AO_HAVE_load_acquire #endif /* AO_HAVE_load */ #ifdef AO_HAVE_char_load AO_INLINE AO_t AO_char_load_read(const volatile unsigned char *addr) { AO_t result = AO_char_load(addr); AO_compiler_barrier(); return result; } # define AO_HAVE_char_load_read # define AO_char_load_acquire(addr) AO_char_load_read(addr) # define AO_HAVE_char_load_acquire #endif /* AO_HAVE_char_load */ #ifdef AO_HAVE_short_load AO_INLINE AO_t AO_short_load_read(const volatile unsigned short *addr) { AO_t result = AO_short_load(addr); AO_compiler_barrier(); return result; } # define AO_HAVE_short_load_read # define AO_short_load_acquire(addr) AO_short_load_read(addr) # define AO_HAVE_short_load_acquire #endif /* AO_HAVE_short_load */ #ifdef AO_HAVE_int_load AO_INLINE AO_t AO_int_load_read(const volatile unsigned int *addr) { AO_t result = AO_int_load(addr); AO_compiler_barrier(); return result; } # define AO_HAVE_int_load_read # define AO_int_load_acquire(addr) AO_int_load_read(addr) # define AO_HAVE_int_load_acquire #endif /* AO_HAVE_int_load */ libatomic_ops-7.2/src/atomic_ops/sysdeps/msftc/0000755000175000017500000000000011753234214016743 500000000000000libatomic_ops-7.2/src/atomic_ops/sysdeps/msftc/common32_defs.h0000644000175000017500000001051111753234157021476 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* This file contains AO primitives based on VC++ built-in intrinsic */ /* functions commonly available across 32-bit architectures. */ /* This file should be included from arch-specific header files. */ /* Define AO_USE_INTERLOCKED_INTRINSICS if _Interlocked primitives */ /* (used below) are available as intrinsic ones for a target arch */ /* (otherwise "Interlocked" functions family is used instead). */ /* Define AO_ASSUME_WINDOWS98 if CAS is available. */ #include /* Seems like over-kill, but that's what MSDN recommends. */ /* And apparently winbase.h is not always self-contained. */ #if _MSC_VER < 1310 || !defined(AO_USE_INTERLOCKED_INTRINSICS) # define _InterlockedIncrement InterlockedIncrement # define _InterlockedDecrement InterlockedDecrement # define _InterlockedExchange InterlockedExchange # define _InterlockedExchangeAdd InterlockedExchangeAdd # define _InterlockedCompareExchange InterlockedCompareExchange # define AO_INTERLOCKED_VOLATILE /**/ #else /* elif _MSC_VER >= 1310 */ # if _MSC_VER >= 1400 # ifndef _WIN32_WCE # include # endif # pragma intrinsic (_ReadWriteBarrier) # else /* elif _MSC_VER < 1400 */ # ifdef __cplusplus extern "C" { # endif LONG __cdecl _InterlockedIncrement(LONG volatile *); LONG __cdecl _InterlockedDecrement(LONG volatile *); LONG __cdecl _InterlockedExchangeAdd(LONG volatile *, LONG); LONG __cdecl _InterlockedExchange(LONG volatile *, LONG); LONG __cdecl _InterlockedCompareExchange(LONG volatile *, LONG /* Exchange */, LONG /* Comp */); # ifdef __cplusplus } # endif # endif /* _MSC_VER < 1400 */ # pragma intrinsic (_InterlockedIncrement) # pragma intrinsic (_InterlockedDecrement) # pragma intrinsic (_InterlockedExchange) # pragma intrinsic (_InterlockedExchangeAdd) # pragma intrinsic (_InterlockedCompareExchange) # define AO_INTERLOCKED_VOLATILE volatile #endif /* _MSC_VER >= 1310 */ AO_INLINE AO_t AO_fetch_and_add_full(volatile AO_t *p, AO_t incr) { return _InterlockedExchangeAdd((LONG AO_INTERLOCKED_VOLATILE *)p, (LONG)incr); } #define AO_HAVE_fetch_and_add_full AO_INLINE AO_t AO_fetch_and_add1_full(volatile AO_t *p) { return _InterlockedIncrement((LONG AO_INTERLOCKED_VOLATILE *)p) - 1; } #define AO_HAVE_fetch_and_add1_full AO_INLINE AO_t AO_fetch_and_sub1_full(volatile AO_t *p) { return _InterlockedDecrement((LONG AO_INTERLOCKED_VOLATILE *)p) + 1; } #define AO_HAVE_fetch_and_sub1_full #ifdef AO_ASSUME_WINDOWS98 /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { # ifdef AO_OLD_STYLE_INTERLOCKED_COMPARE_EXCHANGE return _InterlockedCompareExchange((PVOID AO_INTERLOCKED_VOLATILE *)addr, (PVOID)new_val, (PVOID)old) == (PVOID)old; # else return _InterlockedCompareExchange((LONG AO_INTERLOCKED_VOLATILE *)addr, (LONG)new_val, (LONG)old) == (LONG)old; # endif } # define AO_HAVE_compare_and_swap_full #endif /* AO_ASSUME_WINDOWS98 */ libatomic_ops-7.2/src/atomic_ops/sysdeps/msftc/arm.h0000644000175000017500000000643311753234157017627 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include "../read_ordered.h" #ifndef AO_ASSUME_WINDOWS98 /* CAS is always available */ # define AO_ASSUME_WINDOWS98 #endif #include "common32_defs.h" /* FIXME: Do _InterlockedOps really have a full memory barrier? */ /* (MSDN WinCE docs say nothing about it.) */ #if _M_ARM >= 6 /* ARMv6 is the first architecture providing support for simple LL/SC. */ #include "../standard_ao_double_t.h" /* If only a single processor is used, we can define AO_UNIPROCESSOR */ /* and do not need to access CP15 for ensuring a DMB at all. */ #ifdef AO_UNIPROCESSOR AO_INLINE void AO_nop_full(void) {} # define AO_HAVE_nop_full #else /* AO_nop_full() is emulated using AO_test_and_set_full(). */ #endif #include "../test_and_set_t_is_ao_t.h" /* AO_test_and_set() is emulated using CAS. */ AO_INLINE AO_t AO_load(const volatile AO_t *addr) { /* Cast away the volatile in case it adds fence semantics */ return (*(const AO_t *)addr); } #define AO_HAVE_load AO_INLINE void AO_store_full(volatile AO_t *addr, AO_t value) { /* Emulate atomic store using CAS. */ AO_t old = AO_load(addr); AO_t current; # ifdef AO_OLD_STYLE_INTERLOCKED_COMPARE_EXCHANGE while ((current = (AO_t)_InterlockedCompareExchange( (PVOID AO_INTERLOCKED_VOLATILE *)addr, (PVOID)value, (PVOID)old)) != old) old = current; # else while ((current = (AO_t)_InterlockedCompareExchange( (LONG AO_INTERLOCKED_VOLATILE *)addr, (LONG)value, (LONG)old)) != old) old = current; # endif } #define AO_HAVE_store_full /* FIXME: implement AO_compare_double_and_swap_double() */ #else /* _M_ARM < 6 */ /* Some slide set, if it has been red correctly, claims that Loads */ /* followed by either a Load or a Store are ordered, but nothing */ /* else is. It appears that SWP is the only simple memory barrier. */ #include "../all_atomic_load_store.h" #include "../test_and_set_t_is_ao_t.h" /* AO_test_and_set_full() is emulated using CAS. */ #endif /* _M_ARM < 6 */ libatomic_ops-7.2/src/atomic_ops/sysdeps/msftc/x86_64.h0000644000175000017500000001261111753234157020001 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include "../all_aligned_atomic_load_store.h" /* Real X86 implementations appear */ /* to enforce ordering between memory operations, EXCEPT that a later */ /* read can pass earlier writes, presumably due to the visible */ /* presence of store buffers. */ /* We ignore the fact that the official specs */ /* seem to be much weaker (and arguably too weak to be usable). */ #include "../ordered_except_wr.h" #ifdef AO_ASM_X64_AVAILABLE # include "../test_and_set_t_is_char.h" #else # include "../test_and_set_t_is_ao_t.h" #endif #include "../standard_ao_double_t.h" #include /* Seems like over-kill, but that's what MSDN recommends. */ /* And apparently winbase.h is not always self-contained. */ /* Assume _MSC_VER >= 1400 */ #include #pragma intrinsic (_ReadWriteBarrier) #pragma intrinsic (_InterlockedIncrement64) #pragma intrinsic (_InterlockedDecrement64) #pragma intrinsic (_InterlockedExchange64) #pragma intrinsic (_InterlockedExchangeAdd64) #pragma intrinsic (_InterlockedCompareExchange64) AO_INLINE AO_t AO_fetch_and_add_full (volatile AO_t *p, AO_t incr) { return _InterlockedExchangeAdd64((LONGLONG volatile *)p, (LONGLONG)incr); } #define AO_HAVE_fetch_and_add_full AO_INLINE AO_t AO_fetch_and_add1_full (volatile AO_t *p) { return _InterlockedIncrement64((LONGLONG volatile *)p) - 1; } #define AO_HAVE_fetch_and_add1_full AO_INLINE AO_t AO_fetch_and_sub1_full (volatile AO_t *p) { return _InterlockedDecrement64((LONGLONG volatile *)p) + 1; } #define AO_HAVE_fetch_and_sub1_full AO_INLINE int AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) { return _InterlockedCompareExchange64((LONGLONG volatile *)addr, (LONGLONG)new_val, (LONGLONG)old) == (LONGLONG)old; } #define AO_HAVE_compare_and_swap_full /* As far as we can tell, the lfence and sfence instructions are not */ /* currently needed or useful for cached memory accesses. */ #ifdef AO_ASM_X64_AVAILABLE AO_INLINE void AO_nop_full(void) { /* Note: "mfence" (SSE2) is supported on all x86_64/amd64 chips. */ __asm { mfence } } #define AO_HAVE_nop_full AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { __asm { mov rax,AO_TS_SET ; mov rbx,addr ; xchg byte ptr [rbx],al ; } } #define AO_HAVE_test_and_set_full #endif /* AO_ASM_X64_AVAILABLE */ #ifdef AO_CMPXCHG16B_AVAILABLE /* AO_compare_double_and_swap_double_full needs implementation for Win64. * Also see ../gcc/x86_64.h for partial old Opteron workaround. */ # if _MSC_VER >= 1500 #pragma intrinsic (_InterlockedCompareExchange128) AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { __int64 comparandResult[2]; comparandResult[0] = old_val1; /* low */ comparandResult[1] = old_val2; /* high */ return _InterlockedCompareExchange128((volatile __int64 *)addr, new_val2 /* high */, new_val1 /* low */, comparandResult); } # define AO_HAVE_compare_double_and_swap_double_full # elif defined(AO_ASM_X64_AVAILABLE) /* If there is no intrinsic _InterlockedCompareExchange128 then we */ /* need basically what's given below. */ AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { __asm { mov rdx,QWORD PTR [old_val2] ; mov rax,QWORD PTR [old_val1] ; mov rcx,QWORD PTR [new_val2] ; mov rbx,QWORD PTR [new_val1] ; lock cmpxchg16b [addr] ; setz rax ; } } # define AO_HAVE_compare_double_and_swap_double_full # endif /* _MSC_VER >= 1500 || AO_ASM_X64_AVAILABLE */ #endif /* AO_CMPXCHG16B_AVAILABLE */ libatomic_ops-7.2/src/atomic_ops/sysdeps/msftc/x86.h0000644000175000017500000001055411753234157017474 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* If AO_ASSUME_WINDOWS98 is defined, we assume Windows 98 or newer. */ /* If AO_ASSUME_VISTA is defined, we assume Windows Server 2003, Vista */ /* or later. */ #include "../all_aligned_atomic_load_store.h" /* Real X86 implementations, except for some old WinChips, appear */ /* to enforce ordering between memory operations, EXCEPT that a later */ /* read can pass earlier writes, presumably due to the visible */ /* presence of store buffers. */ /* We ignore both the WinChips, and the fact that the official specs */ /* seem to be much weaker (and arguably too weak to be usable). */ #include "../ordered_except_wr.h" #include "../test_and_set_t_is_char.h" #ifndef AO_USE_INTERLOCKED_INTRINSICS /* _Interlocked primitives (Inc, Dec, Xchg, Add) are always available */ # define AO_USE_INTERLOCKED_INTRINSICS #endif #include "common32_defs.h" /* As far as we can tell, the lfence and sfence instructions are not */ /* currently needed or useful for cached memory accesses. */ /* Unfortunately mfence doesn't exist everywhere. */ /* IsProcessorFeaturePresent(PF_COMPARE_EXCHANGE128) is */ /* probably a conservative test for it? */ #if defined(AO_USE_PENTIUM4_INSTRS) AO_INLINE void AO_nop_full(void) { __asm { mfence } } #define AO_HAVE_nop_full #else /* We could use the cpuid instruction. But that seems to be slower */ /* than the default implementation based on test_and_set_full. Thus */ /* we omit that bit of misinformation here. */ #endif AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { __asm { mov eax,0xff ; /* AO_TS_SET */ mov ebx,addr ; xchg byte ptr [ebx],al ; } /* Ignore possible "missing return value" warning here. */ } #define AO_HAVE_test_and_set_full #ifdef _WIN64 # error wrong architecture #endif #ifdef AO_ASSUME_VISTA /* NEC LE-IT: whenever we run on a pentium class machine we have that * certain function */ #include "../standard_ao_double_t.h" #pragma intrinsic (_InterlockedCompareExchange64) /* Returns nonzero if the comparison succeeded. */ AO_INLINE int AO_compare_double_and_swap_double_full(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { __int64 oldv = (__int64)old_val1 | ((__int64)old_val2 << 32); __int64 newv = (__int64)new_val1 | ((__int64)new_val2 << 32); return _InterlockedCompareExchange64((__int64 volatile *)addr, newv, oldv) == oldv; } #define AO_HAVE_compare_double_and_swap_double_full #ifdef __cplusplus AO_INLINE int AO_double_compare_and_swap_full(volatile AO_double_t *addr, AO_double_t old_val, AO_double_t new_val) { return _InterlockedCompareExchange64((__int64 volatile *)addr, new_val.AO_whole, old_val.AO_whole) == old_val.AO_whole; } #define AO_HAVE_double_compare_and_swap_full #endif /* __cplusplus */ #endif /* AO_ASSUME_VISTA */ #include "../ao_t_is_int.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/test_and_set_t_is_char.h0000644000175000017500000000305411753234157022417 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * These are common definitions for architectures on which test_and_set * operates on byte sized quantities, the "clear" value contains * all zeroes, and the "set" value contains all ones. */ #define AO_TS_t unsigned char typedef enum {AO_BYTE_TS_clear = 0, AO_BYTE_TS_set = 0xff} AO_BYTE_TS_val; #define AO_TS_VAL_t AO_BYTE_TS_val #define AO_TS_CLEAR AO_BYTE_TS_clear #define AO_TS_SET AO_BYTE_TS_set #define AO_CHAR_TS_T 1 libatomic_ops-7.2/src/atomic_ops/sysdeps/all_aligned_atomic_load_store.h0000644000175000017500000000270411753234157023733 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Describes architectures on which AO_t, unsigned char, unsigned short, * and unsigned int loads and stores are atomic for all normally legal * alignments. */ #include "aligned_atomic_load_store.h" #include "char_atomic_load_store.h" #include "short_aligned_atomic_load_store.h" #include "int_aligned_atomic_load_store.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/standard_ao_double_t.h0000644000175000017500000000146411753234157022067 00000000000000/* * NEC LE-IT: For 64-bit OS we extend the double type to hold two int64's * * x86-64: __m128 serves as placeholder which also requires the compiler * to align it on 16 byte boundary (as required by cmpxchg16). * Similar things could be done for PowerPC 64-bit using a VMX data type... */ #if (defined(__x86_64__) && __GNUC__ >= 4) || defined(_WIN64) # include typedef __m128 double_ptr_storage; #elif defined(_WIN32) && !defined(__GNUC__) typedef unsigned __int64 double_ptr_storage; #else typedef unsigned long long double_ptr_storage; #endif # define AO_HAVE_DOUBLE_PTR_STORAGE typedef union { double_ptr_storage AO_whole; struct {AO_t AO_v1; AO_t AO_v2;} AO_parts; } AO_double_t; #define AO_HAVE_double_t #define AO_val1 AO_parts.AO_v1 #define AO_val2 AO_parts.AO_v2 libatomic_ops-7.2/src/atomic_ops/sysdeps/all_acquire_release_volatile.h0000644000175000017500000000275111753234157023613 00000000000000/* * Copyright (c) 2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Describes architectures on which volatile AO_t, unsigned char, unsigned * short, and unsigned int loads and stores have acquire/release semantics for * all normally legal alignments. */ #include "acquire_release_volatile.h" #include "char_acquire_release_volatile.h" #include "short_acquire_release_volatile.h" #include "int_acquire_release_volatile.h" libatomic_ops-7.2/src/atomic_ops/sysdeps/ordered.h0000644000175000017500000000257111753234157017357 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* These are common definitions for architectures that provide */ /* processor ordered memory operations. */ #include "ordered_except_wr.h" AO_INLINE void AO_nop_full(void) { AO_compiler_barrier(); } #define AO_HAVE_nop_full libatomic_ops-7.2/src/atomic_ops/Makefile.am0000644000175000017500000000054411753234157016122 00000000000000SUBDIRS=sysdeps EXTRA_DIST=generalize-small.template #Private Headers private_HEADERS=generalize.h generalize-small.h privatedir=${includedir}/atomic_ops/ generalize-small.h: generalize-small.template sed -e s:XSIZE:char:g -e s:XCTYPE:char:g $? > $@ sed -e s:XSIZE:short:g -e s:XCTYPE:short:g $? >> $@ sed -e s:XSIZE:int:g -e s:XCTYPE:int:g $? >> $@ libatomic_ops-7.2/src/atomic_ops/generalize.h0000644000175000017500000013672611753234157016400 00000000000000/* * Copyright (c) 2003-2004 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Generalize atomic operations for atomic_ops.h. * Should not be included directly. * * We make no attempt to define useless operations, such as * AO_nop_acquire * AO_nop_release * * We have also so far neglected to define some others, which * do not appear likely to be useful, e.g. stores with acquire * or read barriers. * * This file is sometimes included twice by atomic_ops.h. * All definitions include explicit checks that we are not replacing * an earlier definition. In general, more desirable expansions * appear earlier so that we are more likely to use them. * * We only make safe generalizations, except that by default we define * the ...dd_acquire_read operations to be equivalent to those without * a barrier. On platforms for which this is unsafe, the platform-specific * file must define AO_NO_DD_ORDERING. */ #ifndef ATOMIC_OPS_H # error Atomic_ops_generalize.h should not be included directly. #endif #if AO_CHAR_TS_T # define AO_TS_COMPARE_AND_SWAP_FULL(a,o,n) \ AO_char_compare_and_swap_full(a,o,n) # define AO_TS_COMPARE_AND_SWAP_ACQUIRE(a,o,n) \ AO_char_compare_and_swap_acquire(a,o,n) # define AO_TS_COMPARE_AND_SWAP_RELEASE(a,o,n) \ AO_char_compare_and_swap_release(a,o,n) # define AO_TS_COMPARE_AND_SWAP(a,o,n) AO_char_compare_and_swap(a,o,n) #endif #if AO_AO_TS_T # define AO_TS_COMPARE_AND_SWAP_FULL(a,o,n) AO_compare_and_swap_full(a,o,n) # define AO_TS_COMPARE_AND_SWAP_ACQUIRE(a,o,n) \ AO_compare_and_swap_acquire(a,o,n) # define AO_TS_COMPARE_AND_SWAP_RELEASE(a,o,n) \ AO_compare_and_swap_release(a,o,n) # define AO_TS_COMPARE_AND_SWAP(a,o,n) AO_compare_and_swap(a,o,n) #endif /* Generate test_and_set_full, if necessary and possible. */ #if !defined(AO_HAVE_test_and_set) && !defined(AO_HAVE_test_and_set_release) \ && !defined(AO_HAVE_test_and_set_acquire) \ && !defined(AO_HAVE_test_and_set_read) \ && !defined(AO_HAVE_test_and_set_full) # if (AO_AO_TS_T && defined(AO_HAVE_compare_and_swap_full)) \ || (AO_CHAR_TS_T && defined(AO_HAVE_char_compare_and_swap_full)) AO_INLINE AO_TS_VAL_t AO_test_and_set_full(volatile AO_TS_t *addr) { if (AO_TS_COMPARE_AND_SWAP_FULL(addr, AO_TS_CLEAR, AO_TS_SET)) return AO_TS_CLEAR; else return AO_TS_SET; } # define AO_HAVE_test_and_set_full # endif /* AO_HAVE_compare_and_swap_full */ # if (AO_AO_TS_T && defined(AO_HAVE_compare_and_swap_acquire)) \ || (AO_CHAR_TS_T && defined(AO_HAVE_char_compare_and_swap_acquire)) AO_INLINE AO_TS_VAL_t AO_test_and_set_acquire(volatile AO_TS_t *addr) { if (AO_TS_COMPARE_AND_SWAP_ACQUIRE(addr, AO_TS_CLEAR, AO_TS_SET)) return AO_TS_CLEAR; else return AO_TS_SET; } # define AO_HAVE_test_and_set_acquire # endif /* AO_HAVE_compare_and_swap_acquire */ # if (AO_AO_TS_T && defined(AO_HAVE_compare_and_swap_release)) \ || (AO_CHAR_TS_T && defined(AO_HAVE_char_compare_and_swap_release)) AO_INLINE AO_TS_VAL_t AO_test_and_set_release(volatile AO_TS_t *addr) { if (AO_TS_COMPARE_AND_SWAP_RELEASE(addr, AO_TS_CLEAR, AO_TS_SET)) return AO_TS_CLEAR; else return AO_TS_SET; } # define AO_HAVE_test_and_set_release # endif /* AO_HAVE_compare_and_swap_release */ # if (AO_AO_TS_T && defined(AO_HAVE_compare_and_swap)) \ || (AO_CHAR_TS_T && defined(AO_HAVE_char_compare_and_swap)) AO_INLINE AO_TS_VAL_t AO_test_and_set(volatile AO_TS_t *addr) { if (AO_TS_COMPARE_AND_SWAP(addr, AO_TS_CLEAR, AO_TS_SET)) return AO_TS_CLEAR; else return AO_TS_SET; } # define AO_HAVE_test_and_set # endif /* AO_HAVE_compare_and_swap */ # if defined(AO_HAVE_test_and_set) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_test_and_set_acquire) AO_INLINE AO_TS_VAL_t AO_test_and_set_acquire(volatile AO_TS_t *addr) { AO_TS_VAL_t result = AO_test_and_set(addr); AO_nop_full(); return result; } # define AO_HAVE_test_and_set_acquire # endif #endif /* No prior test and set */ /* Nop */ #if !defined(AO_HAVE_nop) AO_INLINE void AO_nop(void) {} # define AO_HAVE_nop #endif #if defined(AO_HAVE_test_and_set_full) && !defined(AO_HAVE_nop_full) AO_INLINE void AO_nop_full(void) { AO_TS_t dummy = AO_TS_INITIALIZER; AO_test_and_set_full(&dummy); } # define AO_HAVE_nop_full #endif #if defined(AO_HAVE_nop_acquire) # error AO_nop_acquire is useless: dont define. #endif #if defined(AO_HAVE_nop_release) # error AO_nop_release is useless: dont define. #endif #if defined(AO_HAVE_nop_full) && !defined(AO_HAVE_nop_read) # define AO_nop_read() AO_nop_full() # define AO_HAVE_nop_read #endif #if defined(AO_HAVE_nop_full) && !defined(AO_HAVE_nop_write) # define AO_nop_write() AO_nop_full() # define AO_HAVE_nop_write #endif /* Load */ #if defined(AO_HAVE_load_full) && !defined(AO_HAVE_load_acquire) # define AO_load_acquire(addr) AO_load_full(addr) # define AO_HAVE_load_acquire #endif #if defined(AO_HAVE_load_acquire) && !defined(AO_HAVE_load) # define AO_load(addr) AO_load_acquire(addr) # define AO_HAVE_load #endif #if defined(AO_HAVE_load_full) && !defined(AO_HAVE_load_read) # define AO_load_read(addr) AO_load_full(addr) # define AO_HAVE_load_read #endif #if !defined(AO_HAVE_load_acquire_read) && defined(AO_HAVE_load_acquire) # define AO_load_acquire_read(addr) AO_load_acquire(addr) # define AO_HAVE_load_acquire_read #endif #if defined(AO_HAVE_load) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_load_acquire) AO_INLINE AO_t AO_load_acquire(const volatile AO_t *addr) { AO_t result = AO_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_full(); return result; } # define AO_HAVE_load_acquire #endif #if defined(AO_HAVE_load) && defined(AO_HAVE_nop_read) \ && !defined(AO_HAVE_load_read) AO_INLINE AO_t AO_load_read(const volatile AO_t *addr) { AO_t result = AO_load(addr); /* Acquire barrier would be useless, since the load could be delayed */ /* beyond it. */ AO_nop_read(); return result; } # define AO_HAVE_load_read #endif #if defined(AO_HAVE_load_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_load_full) # define AO_load_full(addr) (AO_nop_full(), AO_load_acquire(addr)) # define AO_HAVE_load_full #endif #if !defined(AO_HAVE_load_acquire_read) && defined(AO_HAVE_load_read) # define AO_load_acquire_read(addr) AO_load_read(addr) # define AO_HAVE_load_acquire_read #endif #if defined(AO_HAVE_load_acquire_read) && !defined(AO_HAVE_load) # define AO_load(addr) AO_load_acquire_read(addr) # define AO_HAVE_load #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_load_acquire_read) # define AO_load_dd_acquire_read(addr) AO_load_acquire_read(addr) # define AO_HAVE_load_dd_acquire_read # endif #else # if defined(AO_HAVE_load) # define AO_load_dd_acquire_read(addr) AO_load(addr) # define AO_HAVE_load_dd_acquire_read # endif #endif /* Store */ #if defined(AO_HAVE_store_full) && !defined(AO_HAVE_store_release) # define AO_store_release(addr,val) AO_store_full(addr,val) # define AO_HAVE_store_release #endif #if defined(AO_HAVE_store_release) && !defined(AO_HAVE_store) # define AO_store(addr,val) AO_store_release(addr,val) # define AO_HAVE_store #endif #if defined(AO_HAVE_store_full) && !defined(AO_HAVE_store_write) # define AO_store_write(addr,val) AO_store_full(addr,val) # define AO_HAVE_store_write #endif #if defined(AO_HAVE_store_release) && !defined(AO_HAVE_store_release_write) # define AO_store_release_write(addr,val) AO_store_release(addr,val) # define AO_HAVE_store_release_write #endif #if defined(AO_HAVE_store_write) && !defined(AO_HAVE_store) # define AO_store(addr,val) AO_store_write(addr,val) # define AO_HAVE_store #endif #if defined(AO_HAVE_store) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_store_release) # define AO_store_release(addr,val) (AO_nop_full(), AO_store(addr,val)) # define AO_HAVE_store_release #endif #if defined(AO_HAVE_nop_write) && defined(AO_HAVE_store) \ && !defined(AO_HAVE_store_write) # define AO_store_write(addr,val) (AO_nop_write(), AO_store(addr,val)) # define AO_HAVE_store_write #endif #if defined(AO_HAVE_store_write) && !defined(AO_HAVE_store_release_write) # define AO_store_release_write(addr,val) AO_store_write(addr,val) # define AO_HAVE_store_release_write #endif #if defined(AO_HAVE_store_release) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_store_full) # define AO_store_full(addr,val) (AO_store_release(addr,val), AO_nop_full()) # define AO_HAVE_store_full #endif /* NEC LE-IT: Test and set */ #if defined(AO_HAVE_test_and_set) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_test_and_set_release) # define AO_test_and_set_release(addr) (AO_nop_full(), AO_test_and_set(addr)) # define AO_HAVE_test_and_set_release #endif #if defined(AO_HAVE_test_and_set) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_test_and_set_acquire) AO_INLINE AO_TS_VAL_t AO_test_and_set_acquire(volatile AO_TS_t *addr) { AO_TS_VAL_t result = AO_test_and_set(addr); AO_nop_full(); return result; } # define AO_HAVE_test_and_set_acquire #endif /* Fetch_and_add */ /* We first try to implement fetch_and_add variants in terms */ /* of the corresponding compare_and_swap variants to minimize */ /* adding barriers. */ #if defined(AO_HAVE_compare_and_swap_full) \ && !defined(AO_HAVE_fetch_and_add_full) AO_INLINE AO_t AO_fetch_and_add_full(volatile AO_t *addr, AO_t incr) { AO_t old; do { old = *addr; } while (!AO_compare_and_swap_full(addr, old, old+incr)); return old; } # define AO_HAVE_fetch_and_add_full #endif #if defined(AO_HAVE_compare_and_swap_acquire) \ && !defined(AO_HAVE_fetch_and_add_acquire) AO_INLINE AO_t AO_fetch_and_add_acquire(volatile AO_t *addr, AO_t incr) { AO_t old; do { old = *addr; } while (!AO_compare_and_swap_acquire(addr, old, old+incr)); return old; } # define AO_HAVE_fetch_and_add_acquire #endif #if defined(AO_HAVE_compare_and_swap_release) \ && !defined(AO_HAVE_fetch_and_add_release) AO_INLINE AO_t AO_fetch_and_add_release(volatile AO_t *addr, AO_t incr) { AO_t old; do { old = *addr; } while (!AO_compare_and_swap_release(addr, old, old+incr)); return old; } # define AO_HAVE_fetch_and_add_release #endif #if defined(AO_HAVE_compare_and_swap) && !defined(AO_HAVE_fetch_and_add) AO_INLINE AO_t AO_fetch_and_add(volatile AO_t *addr, AO_t incr) { AO_t old; do { old = *addr; } while (!AO_compare_and_swap(addr, old, old+incr)); return old; } # define AO_HAVE_fetch_and_add #endif #if defined(AO_HAVE_fetch_and_add_full) # if !defined(AO_HAVE_fetch_and_add_release) # define AO_fetch_and_add_release(addr,val) AO_fetch_and_add_full(addr,val) # define AO_HAVE_fetch_and_add_release # endif # if !defined(AO_HAVE_fetch_and_add_acquire) # define AO_fetch_and_add_acquire(addr,val) AO_fetch_and_add_full(addr,val) # define AO_HAVE_fetch_and_add_acquire # endif # if !defined(AO_HAVE_fetch_and_add_write) # define AO_fetch_and_add_write(addr,val) AO_fetch_and_add_full(addr,val) # define AO_HAVE_fetch_and_add_write # endif # if !defined(AO_HAVE_fetch_and_add_read) # define AO_fetch_and_add_read(addr,val) AO_fetch_and_add_full(addr,val) # define AO_HAVE_fetch_and_add_read # endif #endif /* AO_HAVE_fetch_and_add_full */ #if !defined(AO_HAVE_fetch_and_add) && defined(AO_HAVE_fetch_and_add_release) # define AO_fetch_and_add(addr,val) AO_fetch_and_add_release(addr,val) # define AO_HAVE_fetch_and_add #endif #if !defined(AO_HAVE_fetch_and_add) && defined(AO_HAVE_fetch_and_add_acquire) # define AO_fetch_and_add(addr,val) AO_fetch_and_add_acquire(addr,val) # define AO_HAVE_fetch_and_add #endif #if !defined(AO_HAVE_fetch_and_add) && defined(AO_HAVE_fetch_and_add_write) # define AO_fetch_and_add(addr,val) AO_fetch_and_add_write(addr,val) # define AO_HAVE_fetch_and_add #endif #if !defined(AO_HAVE_fetch_and_add) && defined(AO_HAVE_fetch_and_add_read) # define AO_fetch_and_add(addr,val) AO_fetch_and_add_read(addr,val) # define AO_HAVE_fetch_and_add #endif #if defined(AO_HAVE_fetch_and_add_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_fetch_and_add_full) # define AO_fetch_and_add_full(addr,val) \ (AO_nop_full(), AO_fetch_and_add_acquire(addr,val)) # define AO_HAVE_fetch_and_add_full #endif #if !defined(AO_HAVE_fetch_and_add_release_write) \ && defined(AO_HAVE_fetch_and_add_write) # define AO_fetch_and_add_release_write(addr,val) \ AO_fetch_and_add_write(addr,val) # define AO_HAVE_fetch_and_add_release_write #endif #if !defined(AO_HAVE_fetch_and_add_release_write) \ && defined(AO_HAVE_fetch_and_add_release) # define AO_fetch_and_add_release_write(addr,val) \ AO_fetch_and_add_release(addr,val) # define AO_HAVE_fetch_and_add_release_write #endif #if !defined(AO_HAVE_fetch_and_add_acquire_read) \ && defined(AO_HAVE_fetch_and_add_read) # define AO_fetch_and_add_acquire_read(addr,val) \ AO_fetch_and_add_read(addr,val) # define AO_HAVE_fetch_and_add_acquire_read #endif #if !defined(AO_HAVE_fetch_and_add_acquire_read) \ && defined(AO_HAVE_fetch_and_add_acquire) # define AO_fetch_and_add_acquire_read(addr,val) \ AO_fetch_and_add_acquire(addr,val) # define AO_HAVE_fetch_and_add_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_fetch_and_add_acquire_read) # define AO_fetch_and_add_dd_acquire_read(addr,val) \ AO_fetch_and_add_acquire_read(addr,val) # define AO_HAVE_fetch_and_add_dd_acquire_read # endif #else # if defined(AO_HAVE_fetch_and_add) # define AO_fetch_and_add_dd_acquire_read(addr,val) \ AO_fetch_and_add(addr,val) # define AO_HAVE_fetch_and_add_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* Fetch_and_add1 */ #if defined(AO_HAVE_fetch_and_add_full) \ && !defined(AO_HAVE_fetch_and_add1_full) # define AO_fetch_and_add1_full(addr) AO_fetch_and_add_full(addr,1) # define AO_HAVE_fetch_and_add1_full #endif #if defined(AO_HAVE_fetch_and_add_release) \ && !defined(AO_HAVE_fetch_and_add1_release) # define AO_fetch_and_add1_release(addr) AO_fetch_and_add_release(addr,1) # define AO_HAVE_fetch_and_add1_release #endif #if defined(AO_HAVE_fetch_and_add_acquire) \ && !defined(AO_HAVE_fetch_and_add1_acquire) # define AO_fetch_and_add1_acquire(addr) AO_fetch_and_add_acquire(addr,1) # define AO_HAVE_fetch_and_add1_acquire #endif #if defined(AO_HAVE_fetch_and_add_write) \ && !defined(AO_HAVE_fetch_and_add1_write) # define AO_fetch_and_add1_write(addr) AO_fetch_and_add_write(addr,1) # define AO_HAVE_fetch_and_add1_write #endif #if defined(AO_HAVE_fetch_and_add_read) \ && !defined(AO_HAVE_fetch_and_add1_read) # define AO_fetch_and_add1_read(addr) AO_fetch_and_add_read(addr,1) # define AO_HAVE_fetch_and_add1_read #endif #if defined(AO_HAVE_fetch_and_add_release_write) \ && !defined(AO_HAVE_fetch_and_add1_release_write) # define AO_fetch_and_add1_release_write(addr) \ AO_fetch_and_add_release_write(addr,1) # define AO_HAVE_fetch_and_add1_release_write #endif #if defined(AO_HAVE_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_fetch_and_add1_acquire_read) # define AO_fetch_and_add1_acquire_read(addr) \ AO_fetch_and_add_acquire_read(addr,1) # define AO_HAVE_fetch_and_add1_acquire_read #endif #if defined(AO_HAVE_fetch_and_add) && !defined(AO_HAVE_fetch_and_add1) # define AO_fetch_and_add1(addr) AO_fetch_and_add(addr,1) # define AO_HAVE_fetch_and_add1 #endif #if defined(AO_HAVE_fetch_and_add1_full) # if !defined(AO_HAVE_fetch_and_add1_release) # define AO_fetch_and_add1_release(addr) AO_fetch_and_add1_full(addr) # define AO_HAVE_fetch_and_add1_release # endif # if !defined(AO_HAVE_fetch_and_add1_acquire) # define AO_fetch_and_add1_acquire(addr) AO_fetch_and_add1_full(addr) # define AO_HAVE_fetch_and_add1_acquire # endif # if !defined(AO_HAVE_fetch_and_add1_write) # define AO_fetch_and_add1_write(addr) AO_fetch_and_add1_full(addr) # define AO_HAVE_fetch_and_add1_write # endif # if !defined(AO_HAVE_fetch_and_add1_read) # define AO_fetch_and_add1_read(addr) AO_fetch_and_add1_full(addr) # define AO_HAVE_fetch_and_add1_read # endif #endif /* AO_HAVE_fetch_and_add1_full */ #if !defined(AO_HAVE_fetch_and_add1) \ && defined(AO_HAVE_fetch_and_add1_release) # define AO_fetch_and_add1(addr) AO_fetch_and_add1_release(addr) # define AO_HAVE_fetch_and_add1 #endif #if !defined(AO_HAVE_fetch_and_add1) \ && defined(AO_HAVE_fetch_and_add1_acquire) # define AO_fetch_and_add1(addr) AO_fetch_and_add1_acquire(addr) # define AO_HAVE_fetch_and_add1 #endif #if !defined(AO_HAVE_fetch_and_add1) && defined(AO_HAVE_fetch_and_add1_write) # define AO_fetch_and_add1(addr) AO_fetch_and_add1_write(addr) # define AO_HAVE_fetch_and_add1 #endif #if !defined(AO_HAVE_fetch_and_add1) && defined(AO_HAVE_fetch_and_add1_read) # define AO_fetch_and_add1(addr) AO_fetch_and_add1_read(addr) # define AO_HAVE_fetch_and_add1 #endif #if defined(AO_HAVE_fetch_and_add1_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_fetch_and_add1_full) # define AO_fetch_and_add1_full(addr) \ (AO_nop_full(), AO_fetch_and_add1_acquire(addr)) # define AO_HAVE_fetch_and_add1_full #endif #if !defined(AO_HAVE_fetch_and_add1_release_write) \ && defined(AO_HAVE_fetch_and_add1_write) # define AO_fetch_and_add1_release_write(addr) AO_fetch_and_add1_write(addr) # define AO_HAVE_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_fetch_and_add1_release_write) \ && defined(AO_HAVE_fetch_and_add1_release) # define AO_fetch_and_add1_release_write(addr) AO_fetch_and_add1_release(addr) # define AO_HAVE_fetch_and_add1_release_write #endif #if !defined(AO_HAVE_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_fetch_and_add1_read) # define AO_fetch_and_add1_acquire_read(addr) AO_fetch_and_add1_read(addr) # define AO_HAVE_fetch_and_add1_acquire_read #endif #if !defined(AO_HAVE_fetch_and_add1_acquire_read) \ && defined(AO_HAVE_fetch_and_add1_acquire) # define AO_fetch_and_add1_acquire_read(addr) AO_fetch_and_add1_acquire(addr) # define AO_HAVE_fetch_and_add1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_fetch_and_add1_acquire_read) # define AO_fetch_and_add1_dd_acquire_read(addr) \ AO_fetch_and_add1_acquire_read(addr) # define AO_HAVE_fetch_and_add1_dd_acquire_read # endif #else # if defined(AO_HAVE_fetch_and_add1) # define AO_fetch_and_add1_dd_acquire_read(addr) AO_fetch_and_add1(addr) # define AO_HAVE_fetch_and_add1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* Fetch_and_sub1 */ #if defined(AO_HAVE_fetch_and_add_full) \ && !defined(AO_HAVE_fetch_and_sub1_full) # define AO_fetch_and_sub1_full(addr) AO_fetch_and_add_full(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1_full #endif #if defined(AO_HAVE_fetch_and_add_release) \ && !defined(AO_HAVE_fetch_and_sub1_release) # define AO_fetch_and_sub1_release(addr) \ AO_fetch_and_add_release(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1_release #endif #if defined(AO_HAVE_fetch_and_add_acquire) \ && !defined(AO_HAVE_fetch_and_sub1_acquire) # define AO_fetch_and_sub1_acquire(addr) \ AO_fetch_and_add_acquire(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1_acquire #endif #if defined(AO_HAVE_fetch_and_add_write) \ && !defined(AO_HAVE_fetch_and_sub1_write) # define AO_fetch_and_sub1_write(addr) AO_fetch_and_add_write(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1_write #endif #if defined(AO_HAVE_fetch_and_add_read) \ && !defined(AO_HAVE_fetch_and_sub1_read) # define AO_fetch_and_sub1_read(addr) AO_fetch_and_add_read(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1_read #endif #if defined(AO_HAVE_fetch_and_add_release_write) \ && !defined(AO_HAVE_fetch_and_sub1_release_write) # define AO_fetch_and_sub1_release_write(addr) \ AO_fetch_and_add_release_write(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1_release_write #endif #if defined(AO_HAVE_fetch_and_add_acquire_read) \ && !defined(AO_HAVE_fetch_and_sub1_acquire_read) # define AO_fetch_and_sub1_acquire_read(addr) \ AO_fetch_and_add_acquire_read(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1_acquire_read #endif #if defined(AO_HAVE_fetch_and_add) && !defined(AO_HAVE_fetch_and_sub1) # define AO_fetch_and_sub1(addr) AO_fetch_and_add(addr,(AO_t)(-1)) # define AO_HAVE_fetch_and_sub1 #endif #if defined(AO_HAVE_fetch_and_sub1_full) # if !defined(AO_HAVE_fetch_and_sub1_release) # define AO_fetch_and_sub1_release(addr) AO_fetch_and_sub1_full(addr) # define AO_HAVE_fetch_and_sub1_release # endif # if !defined(AO_HAVE_fetch_and_sub1_acquire) # define AO_fetch_and_sub1_acquire(addr) AO_fetch_and_sub1_full(addr) # define AO_HAVE_fetch_and_sub1_acquire # endif # if !defined(AO_HAVE_fetch_and_sub1_write) # define AO_fetch_and_sub1_write(addr) AO_fetch_and_sub1_full(addr) # define AO_HAVE_fetch_and_sub1_write # endif # if !defined(AO_HAVE_fetch_and_sub1_read) # define AO_fetch_and_sub1_read(addr) AO_fetch_and_sub1_full(addr) # define AO_HAVE_fetch_and_sub1_read # endif #endif /* AO_HAVE_fetch_and_sub1_full */ #if !defined(AO_HAVE_fetch_and_sub1) \ && defined(AO_HAVE_fetch_and_sub1_release) # define AO_fetch_and_sub1(addr) AO_fetch_and_sub1_release(addr) # define AO_HAVE_fetch_and_sub1 #endif #if !defined(AO_HAVE_fetch_and_sub1) \ && defined(AO_HAVE_fetch_and_sub1_acquire) # define AO_fetch_and_sub1(addr) AO_fetch_and_sub1_acquire(addr) # define AO_HAVE_fetch_and_sub1 #endif #if !defined(AO_HAVE_fetch_and_sub1) && defined(AO_HAVE_fetch_and_sub1_write) # define AO_fetch_and_sub1(addr) AO_fetch_and_sub1_write(addr) # define AO_HAVE_fetch_and_sub1 #endif #if !defined(AO_HAVE_fetch_and_sub1) && defined(AO_HAVE_fetch_and_sub1_read) # define AO_fetch_and_sub1(addr) AO_fetch_and_sub1_read(addr) # define AO_HAVE_fetch_and_sub1 #endif #if defined(AO_HAVE_fetch_and_sub1_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_fetch_and_sub1_full) # define AO_fetch_and_sub1_full(addr) \ (AO_nop_full(), AO_fetch_and_sub1_acquire(addr)) # define AO_HAVE_fetch_and_sub1_full #endif #if !defined(AO_HAVE_fetch_and_sub1_release_write) \ && defined(AO_HAVE_fetch_and_sub1_write) # define AO_fetch_and_sub1_release_write(addr) AO_fetch_and_sub1_write(addr) # define AO_HAVE_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_fetch_and_sub1_release_write) \ && defined(AO_HAVE_fetch_and_sub1_release) # define AO_fetch_and_sub1_release_write(addr) AO_fetch_and_sub1_release(addr) # define AO_HAVE_fetch_and_sub1_release_write #endif #if !defined(AO_HAVE_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_fetch_and_sub1_read) # define AO_fetch_and_sub1_acquire_read(addr) AO_fetch_and_sub1_read(addr) # define AO_HAVE_fetch_and_sub1_acquire_read #endif #if !defined(AO_HAVE_fetch_and_sub1_acquire_read) \ && defined(AO_HAVE_fetch_and_sub1_acquire) # define AO_fetch_and_sub1_acquire_read(addr) AO_fetch_and_sub1_acquire(addr) # define AO_HAVE_fetch_and_sub1_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_fetch_and_sub1_acquire_read) # define AO_fetch_and_sub1_dd_acquire_read(addr) \ AO_fetch_and_sub1_acquire_read(addr) # define AO_HAVE_fetch_and_sub1_dd_acquire_read # endif #else # if defined(AO_HAVE_fetch_and_sub1) # define AO_fetch_and_sub1_dd_acquire_read(addr) AO_fetch_and_sub1(addr) # define AO_HAVE_fetch_and_sub1_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* Atomic or */ #if defined(AO_HAVE_compare_and_swap_full) && !defined(AO_HAVE_or_full) AO_INLINE void AO_or_full(volatile AO_t *addr, AO_t incr) { AO_t old; do { old = *addr; } while (!AO_compare_and_swap_full(addr, old, old | incr)); } # define AO_HAVE_or_full #endif #if defined(AO_HAVE_or_full) # if !defined(AO_HAVE_or_release) # define AO_or_release(addr,val) AO_or_full(addr,val) # define AO_HAVE_or_release # endif # if !defined(AO_HAVE_or_acquire) # define AO_or_acquire(addr,val) AO_or_full(addr,val) # define AO_HAVE_or_acquire # endif # if !defined(AO_HAVE_or_write) # define AO_or_write(addr,val) AO_or_full(addr,val) # define AO_HAVE_or_write # endif # if !defined(AO_HAVE_or_read) # define AO_or_read(addr,val) AO_or_full(addr,val) # define AO_HAVE_or_read # endif #endif /* AO_HAVE_or_full */ #if !defined(AO_HAVE_or) && defined(AO_HAVE_or_release) # define AO_or(addr,val) AO_or_release(addr,val) # define AO_HAVE_or #endif #if !defined(AO_HAVE_or) && defined(AO_HAVE_or_acquire) # define AO_or(addr,val) AO_or_acquire(addr,val) # define AO_HAVE_or #endif #if !defined(AO_HAVE_or) && defined(AO_HAVE_or_write) # define AO_or(addr,val) AO_or_write(addr,val) # define AO_HAVE_or #endif #if !defined(AO_HAVE_or) && defined(AO_HAVE_or_read) # define AO_or(addr,val) AO_or_read(addr,val) # define AO_HAVE_or #endif #if defined(AO_HAVE_or_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_or_full) # define AO_or_full(addr,val) (AO_nop_full(), AO_or_acquire(addr,val)) # define AO_HAVE_or_full #endif #if !defined(AO_HAVE_or_release_write) && defined(AO_HAVE_or_write) # define AO_or_release_write(addr,val) AO_or_write(addr,val) # define AO_HAVE_or_release_write #endif #if !defined(AO_HAVE_or_release_write) && defined(AO_HAVE_or_release) # define AO_or_release_write(addr,val) AO_or_release(addr,val) # define AO_HAVE_or_release_write #endif #if !defined(AO_HAVE_or_acquire_read) && defined(AO_HAVE_or_read) # define AO_or_acquire_read(addr,val) AO_or_read(addr,val) # define AO_HAVE_or_acquire_read #endif #if !defined(AO_HAVE_or_acquire_read) && defined(AO_HAVE_or_acquire) # define AO_or_acquire_read(addr,val) AO_or_acquire(addr,val) # define AO_HAVE_or_acquire_read #endif /* dd_aquire_read is meaningless. */ /* Test_and_set */ #if defined(AO_HAVE_test_and_set_full) # if !defined(AO_HAVE_test_and_set_release) # define AO_test_and_set_release(addr) AO_test_and_set_full(addr) # define AO_HAVE_test_and_set_release # endif # if !defined(AO_HAVE_test_and_set_acquire) # define AO_test_and_set_acquire(addr) AO_test_and_set_full(addr) # define AO_HAVE_test_and_set_acquire # endif # if !defined(AO_HAVE_test_and_set_write) # define AO_test_and_set_write(addr) AO_test_and_set_full(addr) # define AO_HAVE_test_and_set_write # endif # if !defined(AO_HAVE_test_and_set_read) # define AO_test_and_set_read(addr) AO_test_and_set_full(addr) # define AO_HAVE_test_and_set_read # endif #endif /* AO_HAVE_test_and_set_full */ #if !defined(AO_HAVE_test_and_set) && defined(AO_HAVE_test_and_set_release) # define AO_test_and_set(addr) AO_test_and_set_release(addr) # define AO_HAVE_test_and_set #endif #if !defined(AO_HAVE_test_and_set) && defined(AO_HAVE_test_and_set_acquire) # define AO_test_and_set(addr) AO_test_and_set_acquire(addr) # define AO_HAVE_test_and_set #endif #if !defined(AO_HAVE_test_and_set) && defined(AO_HAVE_test_and_set_write) # define AO_test_and_set(addr) AO_test_and_set_write(addr) # define AO_HAVE_test_and_set #endif #if !defined(AO_HAVE_test_and_set) && defined(AO_HAVE_test_and_set_read) # define AO_test_and_set(addr) AO_test_and_set_read(addr) # define AO_HAVE_test_and_set #endif #if defined(AO_HAVE_test_and_set_acquire) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_test_and_set_full) # define AO_test_and_set_full(addr) \ (AO_nop_full(), AO_test_and_set_acquire(addr)) # define AO_HAVE_test_and_set_full #endif #if !defined(AO_HAVE_test_and_set_release_write) \ && defined(AO_HAVE_test_and_set_write) # define AO_test_and_set_release_write(addr) AO_test_and_set_write(addr) # define AO_HAVE_test_and_set_release_write #endif #if !defined(AO_HAVE_test_and_set_release_write) \ && defined(AO_HAVE_test_and_set_release) # define AO_test_and_set_release_write(addr) AO_test_and_set_release(addr) # define AO_HAVE_test_and_set_release_write #endif #if !defined(AO_HAVE_test_and_set_acquire_read) \ && defined(AO_HAVE_test_and_set_read) # define AO_test_and_set_acquire_read(addr) AO_test_and_set_read(addr) # define AO_HAVE_test_and_set_acquire_read #endif #if !defined(AO_HAVE_test_and_set_acquire_read) \ && defined(AO_HAVE_test_and_set_acquire) # define AO_test_and_set_acquire_read(addr) AO_test_and_set_acquire(addr) # define AO_HAVE_test_and_set_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_test_and_set_acquire_read) # define AO_test_and_set_dd_acquire_read(addr) \ AO_test_and_set_acquire_read(addr) # define AO_HAVE_test_and_set_dd_acquire_read # endif #else # if defined(AO_HAVE_test_and_set) # define AO_test_and_set_dd_acquire_read(addr) AO_test_and_set(addr) # define AO_HAVE_test_and_set_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* Compare_and_swap */ #if defined(AO_HAVE_compare_and_swap) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_and_swap_acquire) AO_INLINE int AO_compare_and_swap_acquire(volatile AO_t *addr, AO_t old, AO_t new_val) { int result = AO_compare_and_swap(addr, old, new_val); AO_nop_full(); return result; } # define AO_HAVE_compare_and_swap_acquire #endif #if defined(AO_HAVE_compare_and_swap) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_and_swap_release) # define AO_compare_and_swap_release(addr,old,new_val) \ (AO_nop_full(), AO_compare_and_swap(addr,old,new_val)) # define AO_HAVE_compare_and_swap_release #endif #if defined(AO_HAVE_compare_and_swap_full) # if !defined(AO_HAVE_compare_and_swap_release) # define AO_compare_and_swap_release(addr,old,new_val) \ AO_compare_and_swap_full(addr,old,new_val) # define AO_HAVE_compare_and_swap_release # endif # if !defined(AO_HAVE_compare_and_swap_acquire) # define AO_compare_and_swap_acquire(addr,old,new_val) \ AO_compare_and_swap_full(addr,old,new_val) # define AO_HAVE_compare_and_swap_acquire # endif # if !defined(AO_HAVE_compare_and_swap_write) # define AO_compare_and_swap_write(addr,old,new_val) \ AO_compare_and_swap_full(addr,old,new_val) # define AO_HAVE_compare_and_swap_write # endif # if !defined(AO_HAVE_compare_and_swap_read) # define AO_compare_and_swap_read(addr,old,new_val) \ AO_compare_and_swap_full(addr,old,new_val) # define AO_HAVE_compare_and_swap_read # endif #endif /* AO_HAVE_compare_and_swap_full */ #if !defined(AO_HAVE_compare_and_swap) \ && defined(AO_HAVE_compare_and_swap_release) # define AO_compare_and_swap(addr,old,new_val) \ AO_compare_and_swap_release(addr,old,new_val) # define AO_HAVE_compare_and_swap #endif #if !defined(AO_HAVE_compare_and_swap) \ && defined(AO_HAVE_compare_and_swap_acquire) # define AO_compare_and_swap(addr,old,new_val) \ AO_compare_and_swap_acquire(addr,old,new_val) # define AO_HAVE_compare_and_swap #endif #if !defined(AO_HAVE_compare_and_swap) \ && defined(AO_HAVE_compare_and_swap_write) # define AO_compare_and_swap(addr,old,new_val) \ AO_compare_and_swap_write(addr,old,new_val) # define AO_HAVE_compare_and_swap #endif #if !defined(AO_HAVE_compare_and_swap) \ && defined(AO_HAVE_compare_and_swap_read) # define AO_compare_and_swap(addr,old,new_val) \ AO_compare_and_swap_read(addr,old,new_val) # define AO_HAVE_compare_and_swap #endif #if defined(AO_HAVE_compare_and_swap_acquire) \ && defined(AO_HAVE_nop_full) && !defined(AO_HAVE_compare_and_swap_full) # define AO_compare_and_swap_full(addr,old,new_val) \ (AO_nop_full(), AO_compare_and_swap_acquire(addr,old,new_val)) # define AO_HAVE_compare_and_swap_full #endif #if !defined(AO_HAVE_compare_and_swap_release_write) \ && defined(AO_HAVE_compare_and_swap_write) # define AO_compare_and_swap_release_write(addr,old,new_val) \ AO_compare_and_swap_write(addr,old,new_val) # define AO_HAVE_compare_and_swap_release_write #endif #if !defined(AO_HAVE_compare_and_swap_release_write) \ && defined(AO_HAVE_compare_and_swap_release) # define AO_compare_and_swap_release_write(addr,old,new_val) \ AO_compare_and_swap_release(addr,old,new_val) # define AO_HAVE_compare_and_swap_release_write #endif #if !defined(AO_HAVE_compare_and_swap_acquire_read) \ && defined(AO_HAVE_compare_and_swap_read) # define AO_compare_and_swap_acquire_read(addr,old,new_val) \ AO_compare_and_swap_read(addr,old,new_val) # define AO_HAVE_compare_and_swap_acquire_read #endif #if !defined(AO_HAVE_compare_and_swap_acquire_read) \ && defined(AO_HAVE_compare_and_swap_acquire) # define AO_compare_and_swap_acquire_read(addr,old,new_val) \ AO_compare_and_swap_acquire(addr,old,new_val) # define AO_HAVE_compare_and_swap_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_compare_and_swap_acquire_read) # define AO_compare_and_swap_dd_acquire_read(addr,old,new_val) \ AO_compare_and_swap_acquire_read(addr,old,new_val) # define AO_HAVE_compare_and_swap_dd_acquire_read # endif #else # if defined(AO_HAVE_compare_and_swap) # define AO_compare_and_swap_dd_acquire_read(addr,old,new_val) \ AO_compare_and_swap(addr,old,new_val) # define AO_HAVE_compare_and_swap_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ #include "generalize-small.h" /* Compare_double_and_swap_double */ #if defined(AO_HAVE_compare_double_and_swap_double) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_double_and_swap_double_acquire) AO_INLINE int AO_compare_double_and_swap_double_acquire(volatile AO_double_t *addr, AO_t o1, AO_t o2, AO_t n1, AO_t n2) { int result = AO_compare_double_and_swap_double(addr, o1, o2, n1, n2); AO_nop_full(); return result; } # define AO_HAVE_compare_double_and_swap_double_acquire #endif #if defined(AO_HAVE_compare_double_and_swap_double) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_double_and_swap_double_release) # define AO_compare_double_and_swap_double_release(addr,o1,o2,n1,n2) \ (AO_nop_full(), AO_compare_double_and_swap_double(addr,o1,o2,n1,n2)) # define AO_HAVE_compare_double_and_swap_double_release #endif #if defined(AO_HAVE_compare_double_and_swap_double_full) # if !defined(AO_HAVE_compare_double_and_swap_double_release) # define AO_compare_double_and_swap_double_release(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_full(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_release # endif # if !defined(AO_HAVE_compare_double_and_swap_double_acquire) # define AO_compare_double_and_swap_double_acquire(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_full(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_acquire # endif # if !defined(AO_HAVE_compare_double_and_swap_double_write) # define AO_compare_double_and_swap_double_write(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_full(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_write # endif # if !defined(AO_HAVE_compare_double_and_swap_double_read) # define AO_compare_double_and_swap_double_read(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_full(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_read # endif #endif /* AO_HAVE_compare_double_and_swap_double_full */ #if !defined(AO_HAVE_compare_double_and_swap_double) \ && defined(AO_HAVE_compare_double_and_swap_double_release) # define AO_compare_double_and_swap_double(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_release(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double #endif #if !defined(AO_HAVE_compare_double_and_swap_double) \ && defined(AO_HAVE_compare_double_and_swap_double_acquire) # define AO_compare_double_and_swap_double(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_acquire(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double #endif #if !defined(AO_HAVE_compare_double_and_swap_double) \ && defined(AO_HAVE_compare_double_and_swap_double_write) # define AO_compare_double_and_swap_double(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_write(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double #endif #if !defined(AO_HAVE_compare_double_and_swap_double) \ && defined(AO_HAVE_compare_double_and_swap_double_read) # define AO_compare_double_and_swap_double(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_read(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double #endif #if defined(AO_HAVE_compare_double_and_swap_double_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_double_and_swap_double_full) # define AO_compare_double_and_swap_double_full(addr,o1,o2,n1,n2) \ (AO_nop_full(), \ AO_compare_double_and_swap_double_acquire(addr,o1,o2,n1,n2)) # define AO_HAVE_compare_double_and_swap_double_full #endif #if !defined(AO_HAVE_compare_double_and_swap_double_release_write) \ && defined(AO_HAVE_compare_double_and_swap_double_write) # define AO_compare_double_and_swap_double_release_write(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_write(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_release_write #endif #if !defined(AO_HAVE_compare_double_and_swap_double_release_write) \ && defined(AO_HAVE_compare_double_and_swap_double_release) # define AO_compare_double_and_swap_double_release_write(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_release(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_release_write #endif #if !defined(AO_HAVE_compare_double_and_swap_double_acquire_read) \ && defined(AO_HAVE_compare_double_and_swap_double_read) # define AO_compare_double_and_swap_double_acquire_read(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_read(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_acquire_read #endif #if !defined(AO_HAVE_compare_double_and_swap_double_acquire_read) \ && defined(AO_HAVE_compare_double_and_swap_double_acquire) # define AO_compare_double_and_swap_double_acquire_read(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_acquire(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_compare_double_and_swap_double_acquire_read) # define AO_compare_double_and_swap_double_dd_acquire_read(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double_acquire_read(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_dd_acquire_read # endif #else # if defined(AO_HAVE_compare_double_and_swap_double) # define AO_compare_double_and_swap_double_dd_acquire_read(addr,o1,o2,n1,n2) \ AO_compare_double_and_swap_double(addr,o1,o2,n1,n2) # define AO_HAVE_compare_double_and_swap_double_dd_acquire_read # endif #endif /* !AO_NO_DD_ORDERING */ /* Compare_and_swap_double */ #if defined(AO_HAVE_compare_and_swap_double) && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_and_swap_double_acquire) AO_INLINE int AO_compare_and_swap_double_acquire(volatile AO_double_t *addr, AO_t o1, AO_t n1, AO_t n2) { int result = AO_compare_and_swap_double(addr, o1, n1, n2); AO_nop_full(); return result; } # define AO_HAVE_compare_and_swap_double_acquire #endif #if defined(AO_HAVE_compare_and_swap_double) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_and_swap_double_release) # define AO_compare_and_swap_double_release(addr,o1,n1,n2) \ (AO_nop_full(), AO_compare_and_swap_double(addr,o1,n1,n2)) # define AO_HAVE_compare_and_swap_double_release #endif #if defined(AO_HAVE_compare_and_swap_double_full) # if !defined(AO_HAVE_compare_and_swap_double_release) # define AO_compare_and_swap_double_release(addr,o1,n1,n2) \ AO_compare_and_swap_double_full(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_release # endif # if !defined(AO_HAVE_compare_and_swap_double_acquire) # define AO_compare_and_swap_double_acquire(addr,o1,n1,n2) \ AO_compare_and_swap_double_full(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_acquire # endif # if !defined(AO_HAVE_compare_and_swap_double_write) # define AO_compare_and_swap_double_write(addr,o1,n1,n2) \ AO_compare_and_swap_double_full(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_write # endif # if !defined(AO_HAVE_compare_and_swap_double_read) # define AO_compare_and_swap_double_read(addr,o1,n1,n2) \ AO_compare_and_swap_double_full(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_read # endif #endif /* AO_HAVE_compare_and_swap_double_full */ #if !defined(AO_HAVE_compare_and_swap_double) \ && defined(AO_HAVE_compare_and_swap_double_release) # define AO_compare_and_swap_double(addr,o1,n1,n2) \ AO_compare_and_swap_double_release(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double #endif #if !defined(AO_HAVE_compare_and_swap_double) \ && defined(AO_HAVE_compare_and_swap_double_acquire) # define AO_compare_and_swap_double(addr,o1,n1,n2) \ AO_compare_and_swap_double_acquire(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double #endif #if !defined(AO_HAVE_compare_and_swap_double) \ && defined(AO_HAVE_compare_and_swap_double_write) # define AO_compare_and_swap_double(addr,o1,n1,n2) \ AO_compare_and_swap_double_write(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double #endif #if !defined(AO_HAVE_compare_and_swap_double) \ && defined(AO_HAVE_compare_and_swap_double_read) # define AO_compare_and_swap_double(addr,o1,n1,n2) \ AO_compare_and_swap_double_read(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double #endif #if defined(AO_HAVE_compare_and_swap_double_acquire) \ && defined(AO_HAVE_nop_full) \ && !defined(AO_HAVE_compare_and_swap_double_full) # define AO_compare_and_swap_double_full(addr,o1,n1,n2) \ (AO_nop_full(), AO_compare_and_swap_double_acquire(addr,o1,n1,n2)) # define AO_HAVE_compare_and_swap_double_full #endif #if !defined(AO_HAVE_compare_and_swap_double_release_write) \ && defined(AO_HAVE_compare_and_swap_double_write) # define AO_compare_and_swap_double_release_write(addr,o1,n1,n2) \ AO_compare_and_swap_double_write(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_release_write #endif #if !defined(AO_HAVE_compare_and_swap_double_release_write) \ && defined(AO_HAVE_compare_and_swap_double_release) # define AO_compare_and_swap_double_release_write(addr,o1,n1,n2) \ AO_compare_and_swap_double_release(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_release_write #endif #if !defined(AO_HAVE_compare_and_swap_double_acquire_read) \ && defined(AO_HAVE_compare_and_swap_double_read) # define AO_compare_and_swap_double_acquire_read(addr,o1,n1,n2) \ AO_compare_and_swap_double_read(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_acquire_read #endif #if !defined(AO_HAVE_compare_and_swap_double_acquire_read) \ && defined(AO_HAVE_compare_and_swap_double_acquire) # define AO_compare_and_swap_double_acquire_read(addr,o1,n1,n2) \ AO_compare_and_swap_double_acquire(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_acquire_read #endif #ifdef AO_NO_DD_ORDERING # if defined(AO_HAVE_compare_and_swap_double_acquire_read) # define AO_compare_and_swap_double_dd_acquire_read(addr,o1,n1,n2) \ AO_compare_and_swap_double_acquire_read(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_dd_acquire_read # endif #else # if defined(AO_HAVE_compare_and_swap_double) # define AO_compare_and_swap_double_dd_acquire_read(addr,o1,n1,n2) \ AO_compare_and_swap_double(addr,o1,n1,n2) # define AO_HAVE_compare_and_swap_double_dd_acquire_read # endif #endif /* NEC LE-IT: Convenience functions for AO_double compare and swap which */ /* types and reads easier in code */ #if defined(AO_HAVE_compare_double_and_swap_double_release) \ && !defined(AO_HAVE_double_compare_and_swap_release) AO_INLINE int AO_double_compare_and_swap_release(volatile AO_double_t *addr, AO_double_t old_val, AO_double_t new_val) { return AO_compare_double_and_swap_double_release(addr, old_val.AO_val1, old_val.AO_val2, new_val.AO_val1, new_val.AO_val2); } # define AO_HAVE_double_compare_and_swap_release #endif #if defined(AO_HAVE_compare_double_and_swap_double_acquire) \ && !defined(AO_HAVE_double_compare_and_swap_acquire) AO_INLINE int AO_double_compare_and_swap_acquire(volatile AO_double_t *addr, AO_double_t old_val, AO_double_t new_val) { return AO_compare_double_and_swap_double_acquire(addr, old_val.AO_val1, old_val.AO_val2, new_val.AO_val1, new_val.AO_val2); } # define AO_HAVE_double_compare_and_swap_acquire #endif #if defined(AO_HAVE_compare_double_and_swap_double_full) \ && !defined(AO_HAVE_double_compare_and_swap_full) AO_INLINE int AO_double_compare_and_swap_full(volatile AO_double_t *addr, AO_double_t old_val, AO_double_t new_val) { return AO_compare_double_and_swap_double_full(addr, old_val.AO_val1, old_val.AO_val2, new_val.AO_val1, new_val.AO_val2); } # define AO_HAVE_double_compare_and_swap_full #endif libatomic_ops-7.2/src/Makefile.am0000644000175000017500000000066411753234157013770 00000000000000SUBDIRS=atomic_ops AM_CFLAGS=@PICFLAG@ AM_CPPFLAGS = -I$(top_builddir)/src -I$(top_srcdir)/src include_HEADERS=atomic_ops.h atomic_ops_stack.h atomic_ops_malloc.h lib_LIBRARIES = libatomic_ops.a libatomic_ops_gpl.a if NEED_ASM libatomic_ops_a_SOURCES = atomic_ops.c atomic_ops_sysdeps.S else libatomic_ops_a_SOURCES = atomic_ops.c endif libatomic_ops_gpl_a_SOURCES = atomic_ops_stack.c atomic_ops_malloc.c EXTRA_DIST=Makefile.msft libatomic_ops-7.2/src/atomic_ops_stack.c0000644000175000017500000002350511753234157015421 00000000000000/* * Copyright (c) 2005 Hewlett-Packard Development Company, L.P. * Original Author: Hans Boehm * * This file may be redistributed and/or modified under the * terms of the GNU General Public License as published by the Free Software * Foundation; either version 2, or (at your option) any later version. * * It is distributed in the hope that it will be useful, but WITHOUT ANY * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS * FOR A PARTICULAR PURPOSE. See the GNU General Public License in the * file doc/COPYING for more details. */ #if defined(HAVE_CONFIG_H) # include "config.h" #endif #include #include #include #define AO_REQUIRE_CAS #include "atomic_ops_stack.h" #if defined(_MSC_VER) \ || defined(_WIN32) && !defined(__CYGWIN32__) && !defined(__CYGWIN__) /* AO_pause not defined elsewhere */ /* FIXME: At least AO_spin should be factored out. */ #include AO_t dummy; /* Spin for 2**n units. */ static void AO_spin(int n) { int i; AO_T j = AO_load(&dummy); for (i = 0; i < (2 << n); ++i) { j *= 5; j -= 4; } AO_store(&dummy, j); } void AO_pause(int n) { if (n < 12) AO_spin(n); else { DWORD msecs; /* Short async-signal-safe sleep. */ msecs = (n > 18? 100 : (1 << (n - 12))); Sleep(msecs); } } #else /* AO_pause is available elsewhere */ extern void AO_pause(int); #endif #ifdef AO_USE_ALMOST_LOCK_FREE /* LIFO linked lists based on compare-and-swap. We need to avoid */ /* the case of a node deletion and reinsertion while I'm deleting */ /* it, since that may cause my CAS to succeed eventhough the next */ /* pointer is now wrong. Our solution is not fully lock-free, but it */ /* is good enough for signal handlers, provided we have a suitably low */ /* bound on the number of recursive signal handler reentries. */ /* A list consists of a first pointer and a blacklist */ /* of pointer values that are currently being removed. No list element */ /* on the blacklist may be inserted. If we would otherwise do so, we */ /* are allowed to insert a variant that differs only in the least */ /* significant, ignored, bits. If the list is full, we wait. */ /* Crucial observation: A particular padded pointer x (i.e. pointer */ /* plus arbitrary low order bits) can never be newly inserted into */ /* a list while it's in the corresponding auxiliary data structure. */ /* The second argument is a pointer to the link field of the element */ /* to be inserted. */ /* Both list headers and link fields contain "perturbed" pointers, i.e. */ /* pointers with extra bits "or"ed into the low order bits. */ void AO_stack_push_explicit_aux_release(volatile AO_t *list, AO_t *x, AO_stack_aux *a) { AO_t x_bits = (AO_t)x; AO_t next; /* No deletions of x can start here, since x is not currently in the */ /* list. */ retry: # if AO_BL_SIZE == 2 { /* Start all loads as close to concurrently as possible. */ AO_t entry1 = AO_load(a -> AO_stack_bl); AO_t entry2 = AO_load(a -> AO_stack_bl + 1); if (entry1 == x_bits || entry2 == x_bits) { /* Entry is currently being removed. Change it a little. */ ++x_bits; if ((x_bits & AO_BIT_MASK) == 0) /* Version count overflowed; */ /* EXTREMELY unlikely, but possible. */ x_bits = (AO_t)x; goto retry; } } # else { int i; for (i = 0; i < AO_BL_SIZE; ++i) { if (AO_load(a -> AO_stack_bl + i) == x_bits) { /* Entry is currently being removed. Change it a little. */ ++x_bits; if ((x_bits & AO_BIT_MASK) == 0) /* Version count overflowed; */ /* EXTREMELY unlikely, but possible. */ x_bits = (AO_t)x; goto retry; } } } # endif /* x_bits is not currently being deleted */ do { next = AO_load(list); *x = next; } while(!AO_compare_and_swap_release(list, next, x_bits)); } /* * I concluded experimentally that checking a value first before * performing a compare-and-swap is usually beneficial on X86, but * slows things down appreciably with contention on Itanium. * Since the Itanium behavior makes more sense to me (more cache line * movement unless we're mostly reading, but back-off should guard * against that), we take Itanium as the default. Measurements on * other multiprocessor architectures would be useful. (On a uniprocessor, * the initial check is almost certainly a very small loss.) - HB */ #ifdef __i386__ # define PRECHECK(a) (a) == 0 && #else # define PRECHECK(a) #endif AO_t * AO_stack_pop_explicit_aux_acquire(volatile AO_t *list, AO_stack_aux * a) { unsigned i; int j = 0; AO_t first; AO_t * first_ptr; AO_t next; retry: first = AO_load(list); if (0 == first) return 0; /* Insert first into aux black list. */ /* This may spin if more than AO_BL_SIZE removals using auxiliary */ /* structure a are currently in progress. */ for (i = 0; ; ) { if (PRECHECK(a -> AO_stack_bl[i]) AO_compare_and_swap_acquire(a->AO_stack_bl+i, 0, first)) break; ++i; if ( i >= AO_BL_SIZE ) { i = 0; AO_pause(++j); } } assert(i >= 0 && i < AO_BL_SIZE); assert(a -> AO_stack_bl[i] == first); /* First is on the auxiliary black list. It may be removed by */ /* another thread before we get to it, but a new insertion of x */ /* cannot be started here. */ /* Only we can remove it from the black list. */ /* We need to make sure that first is still the first entry on the */ /* list. Otherwise it's possible that a reinsertion of it was */ /* already started before we added the black list entry. */ if (first != AO_load(list)) { AO_store_release(a->AO_stack_bl+i, 0); goto retry; } first_ptr = AO_REAL_NEXT_PTR(first); next = AO_load(first_ptr); if (!AO_compare_and_swap_release(list, first, next)) { AO_store_release(a->AO_stack_bl+i, 0); goto retry; } assert(*list != first); /* Since we never insert an entry on the black list, this cannot have */ /* succeeded unless first remained on the list while we were running. */ /* Thus its next link cannot have changed out from under us, and we */ /* removed exactly one entry and preserved the rest of the list. */ /* Note that it is quite possible that an additional entry was */ /* inserted and removed while we were running; this is OK since the */ /* part of the list following first must have remained unchanged, and */ /* first must again have been at the head of the list when the */ /* compare_and_swap succeeded. */ AO_store_release(a->AO_stack_bl+i, 0); return first_ptr; } #else /* ! USE_ALMOST_LOCK_FREE */ /* Better names for fields in AO_stack_t */ #define ptr AO_val2 #define version AO_val1 #if defined(AO_HAVE_compare_double_and_swap_double) void AO_stack_push_release(AO_stack_t *list, AO_t *element) { AO_t next; do { next = AO_load(&(list -> ptr)); *element = next; } while (!AO_compare_and_swap_release ( &(list -> ptr), next, (AO_t) element)); /* This uses a narrow CAS here, an old optimization suggested */ /* by Treiber. Pop is still safe, since we run into the ABA */ /* problem only if there were both intervening "pop"s and "push"es. */ /* In that case we still see a change in the version number. */ } AO_t *AO_stack_pop_acquire(AO_stack_t *list) { # ifdef __clang__ AO_t *volatile cptr; /* Use volatile to workaround a bug in */ /* clang-1.1/x86 causing test_stack failure. */ # else AO_t *cptr; # endif AO_t next; AO_t cversion; do { /* Version must be loaded first. */ cversion = AO_load_acquire(&(list -> version)); cptr = (AO_t *)AO_load(&(list -> ptr)); if (cptr == 0) return 0; next = *cptr; } while (!AO_compare_double_and_swap_double_release (list, cversion, (AO_t) cptr, cversion+1, (AO_t) next)); return cptr; } #elif defined(AO_HAVE_compare_and_swap_double) /* Needed for future IA64 processors. No current clients? */ #error Untested! Probably doesnt work. /* We have a wide CAS, but only does an AO_t-wide comparison. */ /* We can't use the Treiber optimization, since we only check */ /* for an unchanged version number, not an unchanged pointer. */ void AO_stack_push_release(AO_stack_t *list, AO_t *element) { AO_t version; AO_t next_ptr; do { /* Again version must be loaded first, for different reason. */ version = AO_load_acquire(&(list -> version)); next_ptr = AO_load(&(list -> ptr)); *element = next_ptr; } while (!AO_compare_and_swap_double_release( list, version, version+1, (AO_t) element)); } AO_t *AO_stack_pop_acquire(AO_stack_t *list) { AO_t *cptr; AO_t next; AO_t cversion; do { cversion = AO_load_acquire(&(list -> version)); cptr = (AO_t *)AO_load(&(list -> ptr)); if (cptr == 0) return 0; next = *cptr; } while (!AO_compare_double_and_swap_double_release (list, cversion, (AO_t) cptr, cversion+1, next)); return cptr; } #endif /* AO_HAVE_compare_and_swap_double */ #endif /* ! USE_ALMOST_LOCK_FREE */ libatomic_ops-7.2/src/Makefile.msft0000644000175000017500000000265611753234157014347 00000000000000# # Copyright (c) 2003-2005 Hewlett-Packard Development Company, L.P. # # The really trivial win32/VC++ Makefile. Note that atomic_ops.c isn't useful. # And we rely on a pre-built test_atomic_include.h and generalize-small.h, # since we can't rely on sed. # Win32 clients only need to include the header files. # To install, copy atomic_ops.h and the atomic_ops/... tree to your favorite # include directory. #MY_CPU=X86 #CPU=$(MY_CPU) #!include LIB_OBJS=atomic_ops_stack.obj atomic_ops_malloc.obj all: check atomic_ops_stack.obj: cl -O2 -c -DAO_ASSUME_WINDOWS98 atomic_ops_stack.c atomic_ops_malloc.obj: cl -O2 -c -DAO_ASSUME_WINDOWS98 atomic_ops_malloc.c test_atomic: ..\tests\test_atomic.c ..\tests\test_atomic_include.h cl -O2 -I. -DAO_ASSUME_WINDOWS98 ..\tests\test_atomic.c -o test_atomic test_atomic_w95: ..\tests\test_atomic.c ..\tests\test_atomic_include.h cl -O2 -I. ..\tests\test_atomic.c -o test_atomic_w95 test_malloc: ..\tests\test_malloc.c ..\tests\test_atomic_include.h \ libatomic_ops_gpl.lib cl -O2 -DAO_ASSUME_WINDOWS98 -I. ..\tests\test_malloc.c -o test_malloc libatomic_ops_gpl.lib libatomic_ops_gpl.lib: $(LIB_OBJS) lib /MACHINE:i386 /out:libatomic_ops_gpl.lib $(LIB_OBJS) check: test_atomic test_atomic_w95 test_malloc echo The following will print lots of \"Missing ...\" messages. test_atomic_w95 echo The following will print some \"Missing ...\" messages. test_atomic test_malloc libatomic_ops-7.2/src/atomic_ops_sysdeps.S0000644000175000017500000000046211753234157015763 00000000000000/* * Include the appropriate system-dependent assembly file, if any. * This is used only if the platform supports neither inline assembly * code, nor appropriate compiler intrinsics. */ #if !defined(__GNUC__) && (defined(sparc) || defined(__sparc)) # include "atomic_ops/sysdeps/sunc/sparc.S" #endif libatomic_ops-7.2/src/atomic_ops.c0000644000175000017500000001675411753234157014244 00000000000000/* * Copyright (c) 2003 Hewlett-Packard Development Company, L.P. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ /* * Initialized data and out-of-line functions to support atomic_ops.h * go here. Currently this is needed only for pthread-based atomics * emulation, or for compare-and-swap emulation. * Pthreads emulation isn't useful on a native Windows platform, and * cas emulation is not needed. Thus we skip this on Windows. */ #if defined(HAVE_CONFIG_H) # include "config.h" #endif #if defined(__native_client__) && !defined(AO_USE_NO_SIGNALS) \ && !defined(AO_USE_NANOSLEEP) /* Since NaCl is not recognized by configure yet, we do it here. */ # define AO_USE_NO_SIGNALS # define AO_USE_NANOSLEEP #endif #if defined(AO_USE_WIN32_PTHREADS) && !defined(AO_USE_NO_SIGNALS) # define AO_USE_NO_SIGNALS #endif #if !defined(_MSC_VER) && !defined(__MINGW32__) && !defined(__BORLANDC__) \ || defined(AO_USE_NO_SIGNALS) #undef AO_REQUIRE_CAS #include #ifndef AO_USE_NO_SIGNALS # include #endif #ifdef AO_USE_NANOSLEEP /* This requires _POSIX_TIMERS feature. */ # include # include #elif defined(AO_USE_WIN32_PTHREADS) # include /* for Sleep() */ #elif defined(_HPUX_SOURCE) # include #else # include #endif #include "atomic_ops.h" /* Without cas emulation! */ #ifndef AO_HAVE_double_t # include "atomic_ops/sysdeps/standard_ao_double_t.h" #endif /* * Lock for pthreads-based implementation. */ pthread_mutex_t AO_pt_lock = PTHREAD_MUTEX_INITIALIZER; /* * Out of line compare-and-swap emulation based on test and set. * * We use a small table of locks for different compare_and_swap locations. * Before we update perform a compare-and-swap, we grab the corresponding * lock. Different locations may hash to the same lock, but since we * never acquire more than one lock at a time, this can't deadlock. * We explicitly disable signals while we perform this operation. * * FIXME: We should probably also support emulation based on Lamport * locks, since we may not have test_and_set either. */ #define AO_HASH_SIZE 16 #define AO_HASH(x) (((unsigned long)(x) >> 12) & (AO_HASH_SIZE-1)) AO_TS_t AO_locks[AO_HASH_SIZE] = { AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, AO_TS_INITIALIZER, }; static AO_T dummy = 1; /* Spin for 2**n units. */ void AO_spin(int n) { int i; AO_T j = AO_load(&dummy); for (i = 0; i < (2 << n); ++i) { j *= 5; j -= 4; } AO_store(&dummy, j); } void AO_pause(int n) { if (n < 12) AO_spin(n); else { # ifdef AO_USE_NANOSLEEP struct timespec ts; ts.tv_sec = 0; ts.tv_nsec = (n > 28 ? 100000 * 1000 : 1 << (n - 2)); nanosleep(&ts, 0); # elif defined(AO_USE_WIN32_PTHREADS) Sleep(n > 28 ? 100 : 1 << (n - 22)); /* in millis */ # else struct timeval tv; /* Short async-signal-safe sleep. */ tv.tv_sec = 0; tv.tv_usec = n > 28 ? 100000 : 1 << (n - 12); select(0, 0, 0, 0, &tv); # endif } } static void lock_ool(volatile AO_TS_t *l) { int i = 0; while (AO_test_and_set_acquire(l) == AO_TS_SET) AO_pause(++i); } AO_INLINE void lock(volatile AO_TS_t *l) { if (AO_test_and_set_acquire(l) == AO_TS_SET) lock_ool(l); } AO_INLINE void unlock(volatile AO_TS_t *l) { AO_CLEAR(l); } #ifndef AO_USE_NO_SIGNALS static sigset_t all_sigs; static volatile AO_t initialized = 0; static volatile AO_TS_t init_lock = AO_TS_INITIALIZER; #endif int AO_compare_and_swap_emulation(volatile AO_t *addr, AO_t old, AO_t new_val) { AO_TS_t *my_lock = AO_locks + AO_HASH(addr); int result; # ifndef AO_USE_NO_SIGNALS sigset_t old_sigs; if (!AO_load_acquire(&initialized)) { lock(&init_lock); if (!initialized) sigfillset(&all_sigs); unlock(&init_lock); AO_store_release(&initialized, 1); } sigprocmask(SIG_BLOCK, &all_sigs, &old_sigs); /* Neither sigprocmask nor pthread_sigmask is 100% */ /* guaranteed to work here. Sigprocmask is not */ /* guaranteed be thread safe, and pthread_sigmask */ /* is not async-signal-safe. Under linuxthreads, */ /* sigprocmask may block some pthreads-internal */ /* signals. So long as we do that for short periods, */ /* we should be OK. */ # endif lock(my_lock); if (*addr == old) { *addr = new_val; result = 1; } else result = 0; unlock(my_lock); # ifndef AO_USE_NO_SIGNALS sigprocmask(SIG_SETMASK, &old_sigs, NULL); # endif return result; } int AO_compare_double_and_swap_double_emulation(volatile AO_double_t *addr, AO_t old_val1, AO_t old_val2, AO_t new_val1, AO_t new_val2) { AO_TS_t *my_lock = AO_locks + AO_HASH(addr); int result; # ifndef AO_USE_NO_SIGNALS sigset_t old_sigs; if (!AO_load_acquire(&initialized)) { lock(&init_lock); if (!initialized) sigfillset(&all_sigs); unlock(&init_lock); AO_store_release(&initialized, 1); } sigprocmask(SIG_BLOCK, &all_sigs, &old_sigs); /* Neither sigprocmask nor pthread_sigmask is 100% */ /* guaranteed to work here. Sigprocmask is not */ /* guaranteed be thread safe, and pthread_sigmask */ /* is not async-signal-safe. Under linuxthreads, */ /* sigprocmask may block some pthreads-internal */ /* signals. So long as we do that for short periods, */ /* we should be OK. */ # endif lock(my_lock); if (addr -> AO_val1 == old_val1 && addr -> AO_val2 == old_val2) { addr -> AO_val1 = new_val1; addr -> AO_val2 = new_val2; result = 1; } else result = 0; unlock(my_lock); # ifndef AO_USE_NO_SIGNALS sigprocmask(SIG_SETMASK, &old_sigs, NULL); # endif return result; } void AO_store_full_emulation(volatile AO_t *addr, AO_t val) { AO_TS_t *my_lock = AO_locks + AO_HASH(addr); lock(my_lock); *addr = val; unlock(my_lock); } #else /* Non-posix platform */ extern int AO_non_posix_implementation_is_entirely_in_headers; #endif libatomic_ops-7.2/ChangeLog0000644000175000017500000015367411753234157012731 00000000000000[7.2] 2012-05-11 Ivan Maidanski * configure.ac, README: Bump version to 7.2 (final). * configure: Regenerate. 2012-05-01 H.J. Lu * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_fetch_and_add_full, AO_and_full, AO_or_full, AO_xor_full, AO_compare_and_swap_full): Remove 'q' suffix in asm instruction. 2012-04-16 H.J. Lu * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_T_IS_INT): Defined for x32. 2012-03-28 Ivan Maidanski * configure.ac (PICFLAG): Adjust AC_MSG_CHECKING message; report "none" result if no -fPIC is needed (for Cygwin/MinGW); determine whether GCC -fPIC option causes __PIC__ macro definition; pass -D __PIC__ to PICFLAG (instead of CFLAGS) only if not defined automatically in case -fPIC specified; update comment. 2012-03-26 Ivan Maidanski * src/atomic_ops/sysdeps/standard_ao_double_t.h: Do not use __m128 if GCC pre-v4 (at least, xmmintrin.h is missing in gcc-3.4.3-x86_64 included in Solaris 10 distribution). 2012-03-26 Ivan Maidanski * src/atomic_ops/sysdeps/standard_ao_double_t.h: Fix a typo in comment. 2012-03-19 Ivan Maidanski * configure: Regenerate. * Makefile.in: Likewise. 2011-08-14 Petter Urkedal * atomic_ops.pc.in -> pkgconfig/atomic_ops.pc.in: Moved. * pkgconfig/atomic_ops-uninstalled.pc.in: Added developer version. * configure.ac, Makefile.am: Update accordingly. 2011-08-04 Ivan Maidanski (really Petter Urkedal) * atomic_ops.pc.in: new file. * Makefile.am (pkgconfigdir, pkgconfig_DATA): new items. * configure.ac (AC_CONFIG_FILES): add atomic_ops.pc. * configure, Makefile.in: Regenerate. 2012-03-07 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/x86.h (AO_compare_double_and_swap_double_full): Use EDI register for "new_val1" argument instead of a memory operand and use XCHG assembler instruction instead of push/pop in case of PIC mode (to workaround a bug in GCC 4.6.1); update the comment. 2012-03-07 Ivan Maidanski * src/atomic_ops_stack.c (AO_stack_push_release): Make "cptr" local variable volatile to workaround a bug in clang-1.1/x86 compiler; add comment. 2012-03-07 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/x86.h (AO_compare_double_and_swap_double_full): Fix argument name in the comment. * src/atomic_ops/sysdeps/sunc/x86.h (AO_compare_double_and_swap_double_full): Likewise. 2012-03-04 Ivan Maidanski * src/atomic_ops_malloc.h (AO_malloc_enable_mmap): Fix a typo in the comment. 2012-01-19 Ivan Maidanski * tests/test_atomic.c (main): Put "void" keyword into the arguments specification of the function prototype. * tests/test_stack.c (main): Likewise. 2011-12-16 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h (__ARM_ARCH_7__, __ARM_ARCH_7A__): Recognize to override __ARM_ARCH_5xx__ macros (since Android NDK GCC defines both for armv7); update comment. 2011-11-29 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/hexagon.h: Include generalize.h file before ao_t_is_int.h one. * src/atomic_ops/sysdeps/gcc/ia64.h: Likewise. * src/atomic_ops/sysdeps/hpc/ia64.h: Likewise. 2011-11-03 Ivan Maidanski * src/atomic_ops/generalize-small.template (AO_XSIZE_fetch_and_add_full, AO_XSIZE_fetch_and_add_acquire, AO_XSIZE_fetch_and_add_release): Change return type from AO_t to XCTYPE. * src/atomic_ops/generalize-small.h: Regenerate. 2011-10-24 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/mips.h (AO_compare_and_swap_full): Change "result" local variable type from AO_t to int. * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_compare_and_swap_full): Likewise. 2011-10-24 Ivan Maidanski * tests/test_atomic_include.h: Regenerate. 2011-10-24 Ivan Maidanski * tests/test_atomic_include.template (test_atomicXX): Add action for the missing AO_compare_and_swap primitive. 2011-10-21 Ivan Maidanski * src/atomic_ops.c (init_lock): Define only unless AO_USE_NO_SIGNALS. 2011-10-21 Ivan Maidanski * doc/README.txt: Fix a typo. 2011-10-21 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/alpha.h (AO_compare_and_swap): Cast returned value to int. 2011-10-17 Ivan Maidanski * src/atomic_ops/sysdeps/Makefile.in: Regenerate. 2011-10-17 Ivan Maidanski (really Thorsten Glaser) * src/atomic_ops/sysdeps/gcc/m68k.h (AO_test_and_set_full): Cast the returned value. 2011-10-15 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/s390.h (AO_compare_and_swap_full): Change return from AO_t to int. * src/atomic_ops/sysdeps/ibmc/powerpc.h (AO_compare_and_swap_acquire, AO_compare_and_swap_release, AO_compare_and_swap_full): Likewise. 2011-10-11 Ivan Maidanski (really Linas Vepstas) * src/atomic_ops/sysdeps/Makefile.am (nobase_private_HEADERS): Add hexagon.h. * src/atomic_ops.h: Include hexagon.h file. * src/atomic_ops/sysdeps/gcc/hexagon.h: New file. 2011-09-21 Ivan Maidanski * src/atomic_ops.c (AO_non_posix_implementation_is_entirely_in_headers): Make external. 2011-09-21 Ivan Maidanski * configure: Regenerate. * tests/Makefile.in: Ditto. * tests/test_atomic_include.h: Ditto. 2011-09-21 Ivan Maidanski * configure.ac (PICFLAG, THREADDLLIBS): Define as empty for MinGW. * configure.ac (have_pthreads): New definition (set to true unless MinGW). * configure.ac (HAVE_PTHREAD_H): New AM conditional (based on have_pthreads value). * tests/Makefile.am (test_atomic_pthreads_SOURCES, test_atomic_pthreads_CPPFLAGS, test_atomic_pthreads_LDADD): Define only if HAVE_PTHREAD_H. * tests/Makefile.am (TESTS): Don't include test_atomic_pthreads unless HAVE_PTHREAD_H. * tests/Makefile.am (check_PROGRAMS): Define to TESTS value. 2011-09-21 Ivan Maidanski * configure.ac (PICFLAG): Set to -fPIC if GCC but not Gygwin. 2011-09-21 Ivan Maidanski * tests/test_malloc.c (LIST_LENGTH, LARGE_OBJ_SIZE): Define to a smaller value unless HAVE_MMAP. 2011-09-21 Ivan Maidanski * tests/test_malloc.c (cons, run_one_test): Call exit with a non-zero code (instead of abort) if out of memory. * tests/test_stack.c (add_elements): Likewise. * tests/test_stack.c (main): Use a distinct exit code if a thread creation failed. 2011-09-15 Ivan Maidanski * src/atomic_ops/sysdeps/emul_cas.h: Fix a typo (replace AO_FORCE_CAS with AO_REQUIRE_CAS in a comment). 2011-09-08 Ivan Maidanski (really Petter Urkedal) * src/Makefile.am, tests/Makefile.am: Set compiler include paths to $(top_builddir)/src and $(top_srcdir)/src. * src/Makefile.in: Regenerate. * tests/Makefile.in: Ditto. 2011-07-14 Ivan Maidanski * tests/list_atomic.template (list_atomicXX): Remove "addr" local variable (use "&val" instead); initialize "newval" and "oldval" local variables; rename "tsaddr" local variable to "ts" one. * tests/list_atomic.template (list_atomicXX): Fix AO_test_and_setXX call (pass address instead of value). * tests/list_atomic.template: Expand all tabs to spaces; remove trailing spaces at EOLn. * tests/run_parallel.inc: Ditto. * tests/test_atomic.c: Ditto. * tests/list_atomic.c: Regenerate. * tests/run_parallel.inc (AO_PTRDIFF_T): New macro. * tests/run_parallel.inc (tramp): Cast between pointer and integer types via casting to AO_PTRDIFF_T. * tests/test_atomic.c (add1sub1_thr, acqrel_thr): Ditto. * tests/run_parallel.inc (run_parallel): Adjust printf format specifiers for DWORD parameters. * tests/test_stack.c: Skip test if no pthreads. 2011-06-27 Ivan Maidanski (really Jeremy Huddleston) * src/atomic_ops/sysdeps/gcc/x86.h (AO_test_and_set_full): Explicitly cast 0xff to unsigned char (otherwise LLVM v2.7 GAS reports an error); don't recognize AO_XCHGB_RET_WORD. * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_test_and_set_full): Ditto. 2011-06-15 Ivan Maidanski * configure.ac, README: Change to version 7.2alpha7. * configure: Regenerate. [7.2alpha6] 2011-06-14 Ivan Maidanski * configure.ac, README: Change to version 7.2alpha6. * configure: Regenerate. 2011-06-07 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full, AO_load): Do not define for pre-ARMv6 directly (revert part of the previous commit). * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set, AO_test_and_set_full): Refine the comment. * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set_full): Define SWP-based implementation at the end of file (if none of AO_test_and_set functions are defined previously). * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set): Remove SWP-based implementation (revert part of the previous commit). * src/atomic_ops/sysdeps/gcc/arm.h (AO_store): Remove redundant definition at the file end (revert part of the previous commit). 2011-06-07 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h: Handle ARMv6M architecture. * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set): Force "swp" instruction usage (instead of ldrex/strex) if AO_FORCE_USE_SWP; add a comment. * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_double_and_swap_double): Handle ARMv7EM architecture (similar to ARMv7M). * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set, AO_nop_full, AO_load, AO_store): Define at the end of file (in case not defined previously). 2011-06-07 Ivan Maidanski * src/atomic_ops/generalize.h: Reformat code. * src/atomic_ops/generalize.h (AO_test_and_set_acquire): Fix return type. * src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_test_and_set): Ditto. * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set): Ditto. * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set): Add a comment (about SWP instruction). 2011-06-06 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h (AO_THUMB_GO_ARM, AO_THUMB_RESTORE_MODE): Use single-digit labels (to workaround a bug in GCC v4.2.1 which reports "garbage following instruction" otherwise). * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_and_swap): Use "IT" instruction only for Thumb-2 mode. 2011-06-06 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h (AO_THUMB_GO_ARM, AO_THUMB_RESTORE_MODE, AO_THUMB_SWITCH_CLOBBERS): Define as empty for Thumb-2 mode. * src/atomic_ops/sysdeps/gcc/arm.h (AO_store, AO_test_and_set, AO_fetch_and_add, AO_fetch_and_add1, AO_fetch_and_sub1, AO_compare_and_swap, AO_compare_double_and_swap_double): Remove unnecessary "memory" keyword from the list of clobbered registers (revert part of the previous commit). * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_and_swap): Add a comment for "IT" instruction. * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_double_and_swap_double): Don't define on the architectures where unimplemented; add a comment; replace return (in the loop) statement with break. 2011-06-06 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h (AO_THUMB_GO_ARM, AO_THUMB_RESTORE_MODE, AO_THUMB_SWITCH_CLOBBERS): Define new macro (to switch temporarily CPU mode to ARM in inline assembler if compiling in the Thumb mode and to restore it back on leave). * src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full, AO_store, AO_test_and_set, AO_fetch_and_add, AO_fetch_and_add1, AO_fetch_and_sub1, AO_compare_and_swap, AO_test_and_set_full): Enable compilation in the Thumb mode (use AO_THUMB_GO_ARM, AO_THUMB_RESTORE_MODE and AO_THUMB_SWITCH_CLOBBERS macros). * src/atomic_ops/sysdeps/gcc/arm.h (AO_store, AO_test_and_set, AO_fetch_and_add, AO_fetch_and_add1, AO_fetch_and_sub1, AO_compare_and_swap, AO_compare_double_and_swap_double): Add "memory" to the list of clobbered registers. 2011-06-06 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h: Reformat code. * src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full, AO_test_and_set_full): Add assembler comment containing the function name. 2011-06-03 Ivan Maidanski * tests/test_malloc.c (run_one_test): Test AO_malloc() result (if out of memory then print the message and abort). * tests/test_stack.c (add_elements): Ditto. 2011-06-03 Ivan Maidanski * src/atomic_ops/generalize.h (AO_HAVE_or_full): Add missing definition. * src/atomic_ops/sysdeps/ordered_except_wr.h (AO_HAVE_nop_write): Fix macro name. * src/atomic_ops/sysdeps/read_ordered.h (AO_HAVE_nop_read): Ditto. * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_HAVE_store_release): Ditto. 2011-06-03 Ivan Maidanski * src/atomic_ops/generalize-small.template (AO_HAVE_XSIZE_fetch_and_add_full): Add missing definition. * src/atomic_ops/generalize-small.template: Reformat code. * src/atomic_ops/generalize-small.h: Regenerate. 2011-06-03 Ivan Maidanski * src/atomic_ops/sysdeps/aligned_atomic_load_store.h: Remove blank line between AO_func and AO_HAVE_func definitions. * src/atomic_ops/sysdeps/atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/char_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/generic_pthread.h: Ditto. * src/atomic_ops/sysdeps/int_aligned_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/int_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/ordered.h: Ditto. * src/atomic_ops/sysdeps/ordered_except_wr.h: Ditto. * src/atomic_ops/sysdeps/read_ordered.h: Ditto. * src/atomic_ops/sysdeps/short_aligned_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/short_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/gcc/alpha.h: Ditto. * src/atomic_ops/sysdeps/gcc/arm.h: Ditto. * src/atomic_ops/sysdeps/gcc/cris.h: Ditto. * src/atomic_ops/sysdeps/gcc/hppa.h: Ditto. * src/atomic_ops/sysdeps/gcc/ia64.h: Ditto. * src/atomic_ops/sysdeps/gcc/m68k.h: Ditto. * src/atomic_ops/sysdeps/gcc/mips.h: Ditto. * src/atomic_ops/sysdeps/gcc/powerpc.h: Ditto. * src/atomic_ops/sysdeps/gcc/s390.h: Ditto. * src/atomic_ops/sysdeps/gcc/sparc.h: Ditto. * src/atomic_ops/sysdeps/gcc/x86.h: Ditto. * src/atomic_ops/sysdeps/gcc/x86_64.h: Ditto. * src/atomic_ops/sysdeps/hpc/hppa.h: Ditto. * src/atomic_ops/sysdeps/hpc/ia64.h: Ditto. * src/atomic_ops/sysdeps/ibmc/powerpc.h: Ditto. * src/atomic_ops/sysdeps/msftc/common32_defs.h: Ditto. * src/atomic_ops/sysdeps/msftc/x86.h: Ditto. * src/atomic_ops/sysdeps/msftc/x86_64.h: Ditto. * src/atomic_ops/sysdeps/sunc/sparc.h: Ditto. * src/atomic_ops/sysdeps/sunc/x86.h: Ditto. * src/atomic_ops/sysdeps/sunc/x86_64.h: Ditto. * src/atomic_ops/sysdeps/aligned_atomic_load_store.h: Reformat comment. * src/atomic_ops/sysdeps/atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/char_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/int_aligned_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/int_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/ordered.h: Ditto. * src/atomic_ops/sysdeps/gcc/arm.h: Ditto. * src/atomic_ops/sysdeps/test_and_set_t_is_char.h: Remove file tail blank lines. * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set_full): Don't define for ARMv2. * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_load_acquire, AO_test_and_set, AO_compare_and_swap): Merge adjacent definitions. * src/atomic_ops/sysdeps/ibmc/powerpc.h (AO_HAVE_store_release): Define. * src/atomic_ops/sysdeps/sunc/sparc.h: Expand all tabs to spaces; remove trailing spaces at EOLn. 2011-06-02 Ivan Maidanski * tests/test_malloc.c (main): Remove unused "exper_n" local variable. * tests/test_stack.c (run_one_test): Remove unused "aux" local variable. 2011-06-01 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_double_and_swap_double, AO_HAVE_compare_double_and_swap_double): Define only starting from ARMv6K. * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_double_and_swap_double): Fix function name in assembler code; replace while (1) loop with "do-while". 2011-06-01 Ivan Maidanski * src/atomic_ops/sysdeps/sunc/x86.h (AO_test_and_set_full): Specify "%b0" (instead of "%0") in "xchg" instruction (to workaround a bug in Sun C 5.11). * src/atomic_ops/sysdeps/sunc/x86_64.h (AO_test_and_set_full): Ditto. 2011-06-01 Ivan Maidanski * src/atomic_ops_malloc.c (AO_malloc_enable_mmap): Workaround for Sun C compiler (call "release" variant of AO_store). 2011-06-01 Ivan Maidanski * configure.ac (_PTHREADS): New template (used for NetBSD). * configure.ac (THREADDLLIBS): New macro. * tests/Makefile.am (test_atomic_LDADD, test_stack_LDADD, test_atomic_pthreads_LDADD, test_malloc_LDADD): Use THREADDLLIBS instead of "-lpthread". * configure: Regenerate. * Makefile.in: Ditto. * doc/Makefile.in: Ditto. * src/Makefile.in: Ditto. * src/atomic_ops/Makefile.in: Ditto. * src/atomic_ops/sysdeps/Makefile.in: Ditto. * src/config.h.in: Ditto. * tests/Makefile.in: Ditto. 2011-05-30 Ivan Maidanski * configure.ac (PIC): Add workaround for GCC v3.4.6 which does not define the corresponding macro. * configure.ac: Don't check for GCC twice. * configure: Regenerate. * tests/test_malloc.c (DEFAULT_NTHREADS): New macro. * tests/test_malloc.c (run_one_test): Refine printed message (in case of HAVE_MMAP). * tests/test_malloc.c (main): Use DEFAULT_NTHREADS. * tests/test_stack.c (main): Cast AO_stack_pop() returned pointer. * src/atomic_ops_malloc.c (USE_MMAP_ANON, GC_MMAP_FLAGS, OPT_MAP_ANON): New macro. * src/atomic_ops_malloc.c (get_mmaped): Pass -1 (instead of 0) as file descriptor to mmap() if MAP_ANONYMOUS (same as for MAP_ANON). * src/atomic_ops_malloc.c (get_mmaped): Use USE_MMAP_ANON, GC_MMAP_FLAGS and OPT_MAP_ANON macros; reformat code; check open() returned value. 2011-05-11 Ivan Maidanski * tests/test_malloc.c: Expand all tabs to spaces; remove trailing spaces at EOLn. * tests/test_malloc.c (LENGTH, LARGE): Rename to LIST_LENGTH and LARGE_OBJ_SIZE, respectively. * tests/test_malloc.c (MAX_NTHREADS, N_REVERSALS, LIST_LENGTH, LARGE_OBJ_SIZE): Do not define unless undefined. * tests/test_malloc.c (run_one_test): Recognize DEBUG_RUN_ONE_TEST macro. 2011-05-10 Ivan Maidanski * tests/Makefile.am (EXTRA_DIST): Add list_atomic.c; update comment. * tests/Makefile.am (CLEANFILES): Remove test_atomic_include.h, list_atomic.c. * tests/Makefile.am: Remove trailing spaces at EOLn. * tests/Makefile.in: Regenerate. 2011-05-10 Ivan Maidanski * tests/test_stack.c (MAX_NTHREADS, N_EXPERIMENTS): Do not define unless undefined. * tests/test_stack.c: Expand all tabs to spaces. * tests/test_atomic_include.h: Ditto. * tests/test_stack.c (main): Free pop'ed elements. * tests/test_atomic_include.h (test_atomic, test_atomic_release, test_atomic_acquire, test_atomic_read, test_atomic_write, test_atomic_full, test_atomic_release_write, test_atomic_acquire_read): Remove prototype. 2011-04-22 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/ia64.h (AO_MASK): Add "volatile" for asm; remove redundant trailing ';'. 2011-04-11 Ivan Maidanski (really Jim Meyering) * doc/README.txt: Remove doubled words in comments. 2011-03-18 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h: Test for all the known pre-v6 ARM chips instead of all the currently existing v6+ ones. 2011-03-13 Ivan Maidanski * src/atomic_ops/sysdeps/emul_cas.h: Fix a typo in a comment; expand all tabs to spaces. * src/atomic_ops/sysdeps/gcc/x86.h (AO_test_and_set_full): Recognize AO_XCHGB_RET_WORD new macro (to workaround a bug). * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_test_and_set_full): Ditto. 2011-02-19 Ivan Maidanski * src/atomic_ops.c: Include sys/time.h (to get timespec) for NaCl. * src/atomic_ops_malloc.c (msb): Do the shift by 32 only once (in a conditional expression) to prevent a compiler warning. * src/atomic_ops_malloc.c: Expand all tabs to spaces; remove trailing spaces at EOLn. 2011-02-19 Ivan Maidanski * src/atomic_ops.c: Explicitly define AO_USE_NO_SIGNALS and AO_USE_NANOSLEEP for NaCl. 2011-02-19 Ivan Maidanski * aclocal.m4: Regenerate (by autoreconf -vif using autoconf-2.68, automake-1.11.1 and libtool-2.4). * configure: Ditto. 2011-02-09 Ivan Maidanski * src/atomic_ops.c (AO_USE_NO_SIGNALS, AO_USE_NANOSLEEP): New macros. * src/atomic_ops.c (AO_USE_WIN32_PTHREADS): Imply AO_USE_NO_SIGNALS. * src/atomic_ops.c: Don't include signal.h if AO_USE_NO_SIGNALS. * src/atomic_ops.c: Include time.h if AO_USE_NANOSLEEP. * src/atomic_ops.c (AO_locks, AO_pause): Reformat the code. * src/atomic_ops.c (AO_pause): Use nanosleep() if AO_USE_NANOSLEEP. * src/atomic_ops.c (all_sigs, initialized, AO_compare_and_swap_emulation, AO_compare_double_and_swap_double_emulation): Use AO_USE_NO_SIGNALS instead of AO_USE_WIN32_PTHREADS. 2011-01-07 Ivan Maidanski * src/.cvsignore: Add more auto-generated files. * tests/.cvsignore: Ditto. * src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_nop_full, AO_store, AO_compare_double_and_swap_double): Reformat code. * src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full, AO_compare_double_and_swap_double): Ditto. * src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_compare_and_swap): Produce "it eq" instruction only for Thumb mode. * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_and_swap): Ditto. 2010-11-23 Ivan Maidanski (really Michael Hope) * src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_compare_and_swap): Insert "it eq" just before "strexeq" (required for Thumb-2 mode, ignored in ARM mode). * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_and_swap): Ditto. 2010-09-15 Ivan Maidanski (with input from Gregory Farnum) * src/atomic_ops.h: Include armcc/arm_v6.h if __ARMCC__. * src/atomic_ops.h: Include ibmc/powerpc.h if __IBMC__. * src/atomic_ops.h: Define AO_GENERALIZE_TWICE if msftc/arm.h is included. * src/atomic_ops.h: Define AO_GENERALIZE_TWICE if AO_CAN_EMUL_CAS is defined but emul_cas.h has not been included. * src/atomic_ops/sysdeps/gcc/arm.h: Fix a typo. 2010-08-14 Ivan Maidanski * aclocal.m4: Regenerate (by autoreconf -vif using autoconf-2.67, automake-1.11.1 and libtool-2.2.8). * configure: Ditto. 2010-08-14 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/arm.h: Replace C++ style comment with ANSI C one. 2010-05-30 Ivan Maidanski (really Bradley Smith) * src/atomic_ops/sysdeps/gcc/avr32.h (AO_test_and_set): Use "register long" (instead of "int") for "ret" variable. * src/atomic_ops/sysdeps/gcc/avr32.h (AO_test_and_set): Replace with AO_test_and_set_full (same for AO_HAVE_test_and_set). * src/atomic_ops/sysdeps/gcc/avr32.h (AO_compare_and_swap_full): New function implemented. 2010-05-22 Ivan Maidanski * src/atomic_ops/sysdeps/Makefile.am (nobase_sysdep_HEADERS): Add "gcc/avr32.h". * src/atomic_ops/sysdeps/Makefile.in: Regenerate. 2010-05-21 Ivan Maidanski (really Bradley Smith) * src/atomic_ops.h: Recognize __avr32__ (include gcc/avr32.h). * src/atomic_ops/sysdeps/gcc/avr32.h: New file. 2010-04-29 Ivan Maidanski * doc/README_malloc.txt: Fix a typo. * doc/README_stack.txt: Ditto. 2010-02-25 Ivan Maidanski (really Bruce Mitchener) * .cvsignore: New file. * doc/.cvsignore: Ditto. * src/.cvsignore: Ditto. * src/atomic_ops/.cvsignore: Ditto. * src/atomic_ops/sysdeps/.cvsignore: Ditto. * tests/.cvsignore: Ditto. 2010-02-19 Ivan Maidanski (mostly really Patrick Marlier) * src/atomic_ops/sysdeps/gcc/x86.h (AO_compare_and_swap_full): Use __sync_bool_compare_and_swap() if AO_USE_SYNC_CAS_BUILTIN. * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_compare_and_swap_full): Ditto. * src/atomic_ops.h (AO_USE_SYNC_CAS_BUILTIN): New macro defined if GCC v4.2+ or Intel compiler v11.1+ (only for amd64). * src/atomic_ops.h: Include GCC-specific sysdeps files for Intel compiler in GCC compatible mode (only for x86 and amd64). 2010-02-18 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_nop_full): Don't check for AO_USE_PENTIUM4_INSTRS (since "mfence" (SSE2) is supported on all x86_64/amd64 chips); remove the comment. * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_nop_full): Define only if AO_ASM_X64_AVAILABLE. * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_compare_and_swap_full): Use built-in __sync_bool_compare_and_swap() if GCC v4.2+. 2010-02-17 Ivan Maidanski (really Patrick Marlier) * src/atomic_ops/sysdeps/gcc/x86.h (AO_compare_and_swap_full, AO_compare_double_and_swap_double_full): Use EAX for the result since cmpxchg clobbers it. * src/atomic_ops/sysdeps/sunc/x86.h (AO_compare_and_swap_full, AO_compare_double_and_swap_double_full): Ditto. * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_compare_and_swap_full, AO_compare_double_and_swap_double_full): Ditto. * src/atomic_ops/sysdeps/sunc/x86_64.h (AO_compare_and_swap_full, AO_compare_double_and_swap_double_full): Ditto. 2010-02-04 Ivan Maidanski * doc/Makefile.in: Regenerate. 2010-02-04 Ivan Maidanski (really Ian Wienand) * doc/Makefile.am: Remove duplicate file in the list. 2010-02-03 Ivan Maidanski * ChangeLog: Fix some typos. 2010-02-03 Ivan Maidanski * src/atomic_ops_stack.c (AO_stack_push_explicit_aux_release): Define "i" variable only if used (to suppress a compiler warning). 2010-02-02 Ivan Maidanski * src/atomic_ops/sysdeps/sunc/x86.h (AO_test_and_set_full): Fix "xchg" data size (remove "l" suffix). * src/atomic_ops/sysdeps/sunc/x86_64.h (AO_test_and_set_full): Ditto. * src/atomic_ops/sysdeps/sunc/x86_64.h (AO_test_and_set_full): Use AO_TS_t for oldval. * src/atomic_ops/sysdeps/sunc/x86.h (AO_compare_double_and_swap_double_full, AO_HAVE_compare_double_and_swap_double_full): Comment out (since not tested, might be wrong, and tickles a bug in some Sun CC versions; besides, __PIC__ macro is never predefined by Sun CC). 2010-01-29 Ivan Maidanski * INSTALL: Regenerate (by autoreconf -vif using libtool-2.2.6b, automake-1.11.1, autoconf-2.65). * Makefile.in: Ditto. * aclocal.m4: Ditto. * compile: Ditto. * config.guess: Ditto. * config.sub: Ditto. * configure: Ditto. * depcomp: Ditto. * install-sh: Ditto. * missing: Ditto. * mkinstalldirs: Ditto. * doc/Makefile.in: Ditto. * src/Makefile.in: Ditto. * src/atomic_ops/Makefile.in: Ditto. * src/atomic_ops/sysdeps/Makefile.in: Ditto. * src/config.h.in: Ditto. * tests/Makefile.in: Ditto. 2009-12-19 Ivan Maidanski * src/atomic_ops/sysdeps/ibmc/powerpc.h (AO_lwsync): Redirect to AO_sync() if __NO_LWSYNC__ (same as for gcc/powerpc.h). 2009-12-17 Ivan Maidanski (really Emmanuel Stapf) * src/atomic_ops.h: Recognize _M_X64 (as an alias for _AMD64_). 2009-12-04 Ivan Maidanski * configure.ac, README: Change to version 7.2alpha5. * configure: Regenerate. [7.2alpha4] 2009-12-02 Ivan Maidanski * configure.ac, README: Change to version 7.2alpha4. * configure: Regenerate. 2009-12-01 Ivan Maidanski * configure.ac, README: Change to version 1.3alpha1. * configure: Regenerate. 2009-11-21 Ivan Maidanski (really Daniel R. Grayson) * configure.ac (AC_CONFIG_COMMANDS): Quote PICFLAG, CC, DEFS values. * configure: Regenerate. 2009-10-06 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/sh.h: Remove commented out AO_TS_SET redefinition. 2009-10-05 Ivan Maidanski * src/atomic_ops/sysdeps/Makefile.in: Regenerate. 2009-10-05 Ivan Maidanski (really Takashi YOSHII) * src/atomic_ops/sysdeps/gcc/sh.h: New file. * src/atomic_ops.h: Include gcc/sh.h if __arm__. * src/atomic_ops/sysdeps/Makefile.am: Add gcc/sh.h entry. 2009-10-02 Ivan Maidanski * src/atomic_ops/sysdeps/Makefile.am: Add armcc/arm_v6.h, msftc/arm.h, msftc/common32_defs.h, sunc/x86.h sunc/x86_64.h entries; order all entries alphabetically. * src/atomic_ops/sysdeps/Makefile.in: Regenerate. 2009-10-01 Ivan Maidanski * aclocal.m4: Regenerate (by autoreconf -vif using libtool-2.2, automake-1.10.2, autoconf-2.64). * INSTALL: Ditto. * Makefile.in: Ditto. * aclocal.m4: Ditto. * config.guess: Ditto. * config.sub: Ditto. * configure: Ditto. * depcomp: Ditto. * install-sh: Ditto. * missing: Ditto. * mkinstalldirs: Ditto. * doc/Makefile.in: Ditto. * src/config.h.in: Ditto. * src/Makefile.in: Ditto. * src/atomic_ops/Makefile.in: Ditto. * src/atomic_ops/sysdeps/Makefile.in: Ditto. * tests/Makefile.in: Ditto. 2009-10-01 Ivan Maidanski * src/atomic_ops/sysdeps/gcc/x86.h: Remove spaces preceding '#' for the preprocessor directives. * src/atomic_ops/sysdeps/sunc/x86.h: Ditto. 2009-09-30 Ivan Maidanski (really Petter Urkedal) * README: Move notes from the hand-edited part of INSTALL which was overwritten by Automake recently. 2009-09-26 Ivan Maidanski * aclocal.m4: Regenerate (by autoreconf -vif). * config.guess: Ditto. * config.sub: Ditto. * configure: Ditto. * INSTALL: Ditto. * Makefile.in: Ditto. * doc/Makefile.in: Ditto. * src/config.h.in: Ditto. * src/Makefile.in: Ditto. * src/atomic_ops/Makefile.in: Ditto. * src/atomic_ops/sysdeps/Makefile.in: Ditto. * tests/Makefile.in: Ditto. 2009-09-25 Ivan Maidanski (really Petter Urkedal) * configure.ac: Replace AC_PROG_CC with AM_PROG_CC_C_O. 2009-09-16 Ivan Maidanski * ChangeLog: Remove trailing spaces at EOLn. * doc/README.txt: Expand all tabs to spaces; remove trailing spaces at EOLn; remove multiple trailing blank lines. * src/atomic_ops.c: Ditto. * src/atomic_ops.h: Ditto. * src/atomic_ops/generalize-small.h: Ditto. * src/atomic_ops/generalize.h: Ditto. * src/atomic_ops/sysdeps/acquire_release_volatile.h: Ditto. * src/atomic_ops/sysdeps/aligned_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/all_aligned_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/all_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/ao_t_is_int.h: Ditto. * src/atomic_ops/sysdeps/armcc/arm_v6.h: Ditto. * src/atomic_ops/sysdeps/atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/char_acquire_release_volatile.h: Ditto. * src/atomic_ops/sysdeps/char_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/gcc/alpha.h: Ditto. * src/atomic_ops/sysdeps/gcc/arm.h: Ditto. * src/atomic_ops/sysdeps/gcc/hppa.h: Ditto. * src/atomic_ops/sysdeps/gcc/ia64.h: Ditto. * src/atomic_ops/sysdeps/gcc/m68k.h: Ditto. * src/atomic_ops/sysdeps/gcc/mips.h: Ditto. * src/atomic_ops/sysdeps/gcc/powerpc.h: Ditto. * src/atomic_ops/sysdeps/gcc/s390.h: Ditto. * src/atomic_ops/sysdeps/gcc/sparc.h: Ditto. * src/atomic_ops/sysdeps/gcc/x86.h: Ditto. * src/atomic_ops/sysdeps/gcc/x86_64.h: Ditto. * src/atomic_ops/sysdeps/generic_pthread.h: Ditto. * src/atomic_ops/sysdeps/hpc/hppa.h: Ditto. * src/atomic_ops/sysdeps/hpc/ia64.h: Ditto. * src/atomic_ops/sysdeps/ibmc/powerpc.h: Ditto. * src/atomic_ops/sysdeps/icc/ia64.h: Ditto. * src/atomic_ops/sysdeps/int_acquire_release_volatile.h: Ditto. * src/atomic_ops/sysdeps/int_aligned_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/int_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/msftc/arm.h: Ditto. * src/atomic_ops/sysdeps/msftc/common32_defs.h: Ditto. * src/atomic_ops/sysdeps/msftc/x86.h: Ditto. * src/atomic_ops/sysdeps/msftc/x86_64.h: Ditto. * src/atomic_ops/sysdeps/ordered.h: Ditto. * src/atomic_ops/sysdeps/ordered_except_wr.h: Ditto. * src/atomic_ops/sysdeps/read_ordered.h: Ditto. * src/atomic_ops/sysdeps/short_acquire_release_volatile.h: Ditto. * src/atomic_ops/sysdeps/short_aligned_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/short_atomic_load_store.h: Ditto. * src/atomic_ops/sysdeps/standard_ao_double_t.h: Ditto. * src/atomic_ops/sysdeps/sunc/x86.h: Ditto. * src/atomic_ops/sysdeps/sunc/x86_64.h: Ditto. * src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h: Ditto. * src/atomic_ops_stack.c: Ditto. * src/atomic_ops_stack.h: Ditto. * src/atomic_ops/sysdeps/gcc/arm.h: Replace non-ASCII quotes in a comment. * src/atomic_ops/sysdeps/gcc/mips.h: Use Unix-style EOLn. 2009-09-10 Ivan Maidanski (ivmai123.diff) * src/atomic_ops/sysdeps/msftc/arm.h: Add FIXME for InterlockedOps (regarding memory barrier). * src/atomic_ops/sysdeps/msftc/arm.h: Don't recognize AO_ASSUME_ARM_ARCH6 anymore; check for _M_ARM >= 6 instead. * src/atomic_ops/sysdeps/msftc/arm.h (AO_nop_full, AO_test_and_set): Replace FIXME with the comment saying it is emulated (in generalize.h); include test_and_set_t_is_ao_t.h. * src/atomic_ops/sysdeps/msftc/arm.h (AO_store_full): Implement using InterlockedCompareExchange() (assuming the latter has a full mbar) for ARMv6+. * src/atomic_ops/sysdeps/msftc/arm.h: Include all_atomic_load_store.h and test_and_set_t_is_ao_t.h for the case of pre-ARMv6; add the comment. 2009-09-10 Ivan Maidanski (ivmai122.diff) * src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_compare_double_and_swap_double): Replace false/true with 0/1. * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_double_and_swap_double): Ditto. * src/atomic_ops/sysdeps/gcc/arm.h: Recognize more ARMv6+ predefined macros (6J, 6ZK, 7A, 7M, 7R). * src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_double_and_swap_double): Add "cc" clobber to asm. * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_HAVE_load_acquire): Correct the name (convert from the lower case). * src/atomic_ops/sysdeps/ibmc/powerpc.h (AO_HAVE_load_acquire): Ditto. * src/atomic_ops/sysdeps/ibmc/powerpc.h (AO_test_and_set, AO_compare_and_swap): Comment out unimplemented code (and the corresponding macros); add FIXME. * src/atomic_ops.c: Recognize AO_USE_WIN32_PTHREADS overriding _MSC_VER and __MINGW32__ predefined macros (useful for WinCE with pthreads-w32 library); don't include signal.h, sys/time.h, sys/select.h in this case; include windows.h instead. * src/atomic_ops.c (AO_pause): Use Sleep() in case of AO_USE_WIN32_PTHREADS (instead of select()). * src/atomic_ops.c (all_sigs, initialized): Don't define in case of AO_USE_WIN32_PTHREADS. * src/atomic_ops.c (AO_compare_and_swap_emulation, AO_compare_double_and_swap_double_emulation): Don't deal with signals in case of AO_USE_WIN32_PTHREADS. 2009-09-10 Ivan Maidanski (diff110) * src/atomic_ops/sysdeps/msftc/arm.h: New file (initial support for ARM family). * src/atomic_ops/sysdeps/msftc/common32_defs.h: New file. * src/atomic_ops/sysdeps/msftc/arm.h (AO_ASSUME_ARM_ARCH6): New macro. * src/atomic_ops/sysdeps/msftc/common32_defs.h (AO_USE_INTERLOCKED_INTRINSICS): Ditto. * src/atomic_ops/sysdeps/msftc/x86.h: Move "Interlocked" declarations to common32_defs.h. * src/atomic_ops/sysdeps/msftc/common32_defs.h (AO_INTERLOCKED_VOLATILE): New macro defined (used by Interlocked-based primitives) for compatibility with older VC++. * src/atomic_ops/sysdeps/msftc/common32_defs.h: Don't include missing if WinCE target. * src/atomic_ops/sysdeps/msftc/x86.h: Include common32_defs.h (define AO_USE_INTERLOCKED_INTRINSICS unconditionally). * src/atomic_ops/sysdeps/msftc/x86.h (AO_fetch_and_add_full, AO_fetch_and_add1_full, AO_fetch_and_sub1_full, AO_compare_and_swap_full): Move arch-independent primitives to common32_defs.h. * src/atomic_ops/sysdeps/msftc/x86.h: Remove comment about i486 or better CPU (since Interlocked Add and Xchg primitives are available on any 32-bit CPU). * src/atomic_ops.h: Include msftc/x86.h even if _M_IX86 is less than 400 (for i80386). * src/atomic_ops.h: Include msftc/x86.h if "x86" defined (for WinCE on x86). * src/atomic_ops.h: Include msftc/arm.h if ARM target (for WinCE). 2009-09-10 Ivan Maidanski (diff109_cvs) * src/atomic_ops/sysdeps/msftc/x86.h: Fix comments (prefix ASSUME_WINDOWS98 with "AO_"). * src/atomic_ops/sysdeps/msftc/x86.h: Prefix ASSUME_VISTA macro with "AO_". * src/atomic_ops/sysdeps/msftc/x86.h (AO_nop_full): Replace K&R-style function definition with ANSI C one. * src/atomic_ops/sysdeps/msftc/x86.h (AO_test_and_set_full): Replace AO_TS_SET with its value 0xff (some compilers does not like C enum consts inside inline assembler). * src/atomic_ops/sysdeps/msftc/x86.h (AO_test_and_set_full): Add comment about "missing return value" warning. * src/atomic_ops/sysdeps/msftc/x86.h (AO_OLD_STYLE_INTERLOCKED_COMPARE_EXCHANGE): New macro. * src/atomic_ops/sysdeps/msftc/x86.h (AO_compare_and_swap_full): Use _InterlockedCompareExchange() with args and result of PVOID type if AO_OLD_STYLE_INTERLOCKED_COMPARE_EXCHANGE is defined (mostly for DigitalMars compiler support). * src/atomic_ops/sysdeps/msftc/x86.h (AO_compare_double_and_swap_double_full): Swap all "val1" and "val2" variables ("val1" is the lowest part of AO_double_t). * src/atomic_ops/sysdeps/msftc/x86.h (AO_compare_double_and_swap_double_full): Rename to AO_double_compare_and_swap_full (as it has 3 args). * src/atomic_ops/sysdeps/msftc/x86.h: Replace C++ style comment with ANSI C one. 2009-09-10 Ivan Maidanski (diff108_cvs) * src/atomic_ops/sysdeps/gcc/x86_64.h: Remove comments about i486 and 32-bit WinChips. * src/atomic_ops/sysdeps/msftc/x86_64.h: Ditto. * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_nop_full): Replace K&R-style function definition with ANSI C one. * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_compare_double_and_swap_double_full): Fix comment. * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_compare_double_and_swap_double_full): Swap all "val1" and "val2" variables ("val1" is the lowest part of AO_double_t). * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_compare_double_and_swap_double_full): Ditto. * src/atomic_ops/sysdeps/msftc/x86_64.h: Remove comment about ASSUME_WINDOWS98. * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_ASM_X64_AVAILABLE): New macro. * src/atomic_ops/sysdeps/msftc/x86_64.h: Include "test_and_set_t_is_char.h" if AO_ASM_X64_AVAILABLE (same as in x86_64.h for gcc); remove FIXME (for re-implement test-and-set). * src/atomic_ops/sysdeps/msftc/x86_64.h: Include "standard_ao_double_t.h" (same as in x86_64.h for gcc). * src/atomic_ops/sysdeps/msftc/x86_64.h: Add comment for include assuming at least VC++ v8. * src/atomic_ops/sysdeps/msftc/x86_64.h: Remove _Interlocked prototypes (since they are always declared in intrin.h). * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_nop_full): Move its definition below CAS primitive (to textually group all asm-based primitives together). * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_test_and_set_full): Implement for AO_ASM_X64_AVAILABLE case. * src/atomic_ops/sysdeps/msftc/x86_64.h: Remove AO_CASDOUBLE_MISSING macro (replaced with AO_ASM_X64_AVAILABLE). * src/atomic_ops/sysdeps/msftc/x86_64.h (AO_compare_double_and_swap_double_full): Add intrinsic-based implementation for VC++ v9+. * src/atomic_ops/sysdeps/standard_ao_double_t.h: Include (and use "__m128" type) if _WIN64. * src/atomic_ops/sysdeps/standard_ao_double_t.h (AO_HAVE_DOUBLE_PTR_STORAGE): Define it always (as "double_ptr_storage" is defined for all cases). 2009-09-09 Hans Boehm (Really mostly Patrick Marlier) * src/atomic_ops/sysdeps/gcc/sparc.h (NO_SPARC_V9): Renamed to AO_NO_SPARC_V9. 2009-09-01 Hans Boehm (Really mostly Patrick Marlier) * src/atomic_ops/sysdeps/gcc/sparc.h (AO_test_and_set_full): Use AO_TS_VAL_t for "oldval" (for 64-bit support). * src/atomic_ops/sysdeps/gcc/sparc.h (AO_compare_and_swap_full): New function implemented. 2009-08-12 Hans Boehm (Really Ivan Maidanski) (diff107_cvs, resembling diff78 and diff88_cvs) * src/atomic_ops/sysdeps/sunc/x86.h: New file. * src/atomic_ops/sysdeps/sunc/x86_64.h: Ditto. * src/atomic_ops.h (AO_INLINE): Support inlining for DigitalMars, Watcom, Sun C. * src/atomic_ops.h (AO_compiler_barrier): Use intrinsic-based implementation for VC++ v8+ (include before it unless WinCE target); use asm-based barrier implementation for Borland, DigitalMars and Watcom. * src/atomic_ops.h: Fix comment (for x86_64). * src/atomic_ops.h: Include specialized x86.h and x86_64.h arch headers for Sun C (if not AO_USE_PTHREAD_DEFS). * src/atomic_ops.h: Include VC-specific arch headers for Borland, DigitalMars and Watcom (Win32 target only). 2009-05-27 Hans Boehm (Really Ivan Maidanski) (diff87_cvs, resembling diff29, diff68, diff78 partly) * doc/README.txt: Remove outdated info about Windows support. * src/atomic_ops/generalize.h (AO_nop_full): Replace K&R-style function definition with ANSI C one. * src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/gcc/alpha.h (AO_nop_full, AO_nop_write): Ditto. * src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/gcc/ia64.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/gcc/mips.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_nop_full, AO_lwsync): Ditto. * src/atomic_ops/sysdeps/gcc/x86.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/generic_pthread.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/hpc/ia64.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/icc/ia64.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/ordered.h (AO_nop_full): Ditto. * src/atomic_ops/sysdeps/ordered_except_wr.h (AO_nop_write): Ditto. * src/atomic_ops/sysdeps/read_ordered.h (AO_nop_read): Ditto. * src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h (AO_TS_val): Fix comment. 2009-02-24 Hans Boehm (Really primarily Earl Chew) * src/atomic_ops/sysdeps/gcc/powerpc.h: Add index, update modifiers to asms, refine clobbers to "cr0", use cr0 instead of cr7, add explicit AO_fetch_and_add, add UNTESTED 64 bit support. 2008-11-10 Hans Boehm (Really Joerg Wagner) * src/atomic_ops/sysdeps/armcc/arm_v6.h: Compute AO_compare_and_swap value differently, add AO_compare_double_and_swap_double, some indentation fixes. * src/atomic_ops/sysdeps/gcc/arm.h: Make gcc asm code more robust and minimize clobbers, Add AO_compare_double_and_swap_double. 2008-11-06 Hans Boehm * INSTALL: Add some platform-specific documentation. * src/Makefile.msft: Fix copyright notice. 2008-10-21 Hans Boehm (really Ivan Maidanski) * src/atomic_ops/sysdeps/aligned_atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/all_aligned_atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/all_atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/char_atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/gcc/arm.h: Fix comments. * src/atomic_ops/sysdeps/gcc/x86.h: Fix comments. * src/atomic_ops/sysdeps/gcc/x86_64.h: Fix comments. * src/atomic_ops/sysdeps/hpc/hppa.h: Fix comments. * src/atomic_ops/sysdeps/hpc/ia64.h: Fix comments. * src/atomic_ops/sysdeps/int_aligned_atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/int_atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/short_aligned_atomic_load_store.h: Fix comments. * src/atomic_ops/sysdeps/short_atomic_load_store.h: Fix comments. * src/atomic_ops.c: Fix comments. * src/atomic_ops.h: Fix comments. * src/atomic_ops_stack.c: Fix comments. * src/atomic_ops_stack.h: Fix comments. 2008-10-20 Hans Boehm (really Andrew Agno) * src/atomic_ops/sysdeps/gcc/x86_64.h (AO_int_fetch_and_add_full): fix return type. 2008-08-21 Hans Boehm * config.guess, config.sub, configure: Regenerate/replace. Use autoconf 2.61, automake 1.9.6. 2008-08-19 Hans Boehm (really Thiemo Seufer) * src/atomic_ops/sysdeps/gcc/powerpc.h: Add %U1 (update) to lwz instruction. 2008-08-19 Hans Boehm (really Sebastian Siewior) * src/atomic_ops/sysdeps/gcc/powerpc.h: Consider __NO_LWSYNC__. 2008-07-24 Hans Boehm (really Ivan Maidanski) * src/atomic_ops/sysdeps/ao_t_is_int.h, src/atomic_ops.h: Add parentheses around addr arg for various functions. 2008-07-18 Hans Boehm * src/atomic_ops/sysdeps/gcc/powerpc.h: Add const to first parameter of load calls (forgot one). 2008-07-18 Hans Boehm * doc/README.txt, src/atomic_ops/generalize.h, src/atomic_ops/generalize-small.template, src/atomic_ops/generalize-small.h, src/atomic_ops/sysdeps/acquire_release_volatile.h, src/atomic_ops/sysdeps/char_acquire_release_volatile.h, src/atomic_ops/sysdeps/int_acquire_release_volatile.h, src/atomic_ops/sysdeps/short_acquire_release_volatile.h, src/atomic_ops/sysdeps/aligned_atomic_load_store.h, src/atomic_ops/sysdeps/int_aligned_atomic_load_store.h, src/atomic_ops/sysdeps/short_aligned_atomic_load_store.h, src/atomic_ops/sysdeps/ao_t_is_int.h, src/atomic_ops/sysdeps/atomic_load_store.h, src/atomic_ops/sysdeps/char_atomic_load_store.h, src/atomic_ops/sysdeps/int_atomic_load_store.h, src/atomic_ops/sysdeps/short_atomic_load_store.h, src/atomic_ops/sysdeps/generic_pthread.h, src/atomic_ops/sysdeps/read_ordered.h, src/atomic_ops/sysdeps/sysdeps/armcc/arm_v6.h, src/atomic_ops/sysdeps/gcc/arm.h, src/atomic_ops/sysdeps/icc/ia64.h, src/atomic_ops/sysdeps/ibmc/powerpc.h: Add const to first parameter of load calls. 2008-07-10 Hans Boehm * src/atomic_ops/sysdeps/gcc/m68k.h: Remove SMP-unsafe AO_or_full, and let it be autogenerated instead. 2008-07-03 Hans Boehm (Really Thiemo Seufer) * src/atomic_ops/sysdeps/gcc/mips.h: Really add mips support, fixing a merge accident. 2008-05-30 Hans Boehm (Really from various Debian contributors) * doc/Makefile.in, src/Makefile.in, src/atomic_ops/Makefile.in: Regenerate. 2008-05-30 Hans Boehm (Really from various Debian contributors) * src/atomic_ops.h, src/atomic_ops/sysdeps/Makefile.am, src/atomic_ops/sysdeps/gcc/mips.h: Add mips support. * src/atomic_ops/sysdeps/gcc/m68k.h: Make test_and_set work on char, align AO_t. Add cas, or. * src/atomic_ops/sysdeps/gcc/s390.h: Fix include paths. * src/atomic_ops/generalize.h: Fix AO_compare_and_swap_double_acquire. * Makefile.in, aclocal.m4, src/atomic_ops/sysdeps/Makefile.in, tests/Makefile.in: Regenerate. 2008-02-11 Hans Boehm (Really Ian Wienand & Debian maintainers) * src/atomic_ops/sysdeps/gcc/x86.h (AO_compare_double_and_swap_double_full): Correctly account for ebx usage with PIC. 2008-01-09 Hans Boehm * src/atomic_ops/sysdeps/standard_ao_double_t.h: Let double_ptr_storage default to long long; define everywhere. 2008-01-08 Hans Boehm (Really mostly Joerg Wagner) * src/atomic_ops/sysdeps/msftc/x86.h: Conditionally add compare_double_and_swap_double. 2008-01-06 Hans Boehm (Really mostly Joerg Wagner) * src/atomic_ops/generalize.h: Add test_and_set generalizations, Add AO_double_compare_and_swap generalizations. * src/atomic_ops/sysdeps/armcc/arm_v6.h: New file. * src/atomic_ops/sysdeps/gcc/arm.h: Handle V6 and V7. * src/atomic_ops/sysdeps/gcc/x86.h, src/atomic_ops/sysdeps/{gcc,msftc}/x86_64.h: Conditionally add compare_double_and_swap_double, commented out for msftc. * src/atomic_ops/sysdeps/standard_ao_double_t.h: Add double_ptr_storage field. 2008-01-03 Hans Boehm (Merge from separate atomic_ops tree) * src/atomic_ops/sysdeps/gcc/x86.h: Define correct macro for double-width cas, and fix its implementation. * doc/README.txt: Clarify use of _full. Add more warnings about data dependencies. 2008-01-02 Hans Boehm * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_load_acquire): Add %X1 modifier to support indexed addressing. 2007-07-23 Hans Boehm (really Jim Marshall) * src/atomic_ops/sysdeps/msftc/x86.h (_InterlockedExchangeAdd): Define for VC++6. 2007-07-05 Andreas Tobler * src/atomic_ops.h: Check for __powerpc64__ and __ppc64__ to include powerpc.h. 2007-06-26 Hans Boehm (really Luca Barbato) * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_load_acquire): Add 64-bit version. 2007-06-13 Hans Boehm * src/atomic_ops.h: include stddef.h 2007-06-06 Hans Boehm * src/atomic_ops/sysdeps/msftc/x86_64.h: New file. * src/atomic_ops.h: Add test for msftc/x86_64.h. * src/atomic_ops/sysdeps/msftc/x86.h: Complain for _WIN64. * src/atomic_ops/sysdeps/Makefile.am: Add x86_64.h. * src/atomic_ops/sysdeps/Makefile.in: Regenerate. * src/atomic_ops/sysdeps/aligned_atomic_load_store.h, src/atomic_ops/sysdeps/int_aligned_atomic_load_store.h, src/atomic_ops/sysdeps/short_aligned_atomic_load_store.h: Replace unsigned long cast with size_t. 2007-05-17 Hans Boehm * src/atomic_ops/sysdeps/gcc/hppa.h (AO_test_and_set_full): Add cast for return. 2007-05-14 Hans Boehm * doc/README.txt: Update to reflect C++0x effort. 2007-05-07 Hans Boehm (with help from Philipp Zambelli) * src/atomic_ops/sysdeps/msftc/x86.h: Don't just assume that mfence is present. * src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set_full): Correct oldval type. 2006-11-09 Earl Chew (Agilent) * msftc/x86.h: Follow Microsoft documentation and include windows.h. [1.2 release] 2006-07-11 Hans Boehm * src/atomic_ops/sysdeps/hpc/ia64.h: Fix typos. 2006-03-28 Earl Chew (Agilent) * src/atomic_ops/sysdeps/gcc/powerpc.h: Remove unused variable cr. * src/atomic_ops/sysdeps/msftc/x86.h: Use new intrinsics available in MSVC 2003 and MSVC 2005. Use inline assembler to generate mfence and byte sized xchg Use correct prototype for InterlockedCompareExchange. * src/atomic_ops.h: Add test for __PPC__ . * tests/run_parallel.inc: Add simple VxWorks support. * tests/test_atomic.c, tests/test_atomic_include.h: Add prototypes to silence compiler warnings. 2006-11-13 Hans Boehm * src/atomic_ops/sysdeps/gcc/powerpc.h: Beginnings of 64 bit support. * src/atomic_ops/sysdeps/gcc/x86.h: Use "=q" for AO_test_and_set_full. 2005-11-04 Hans Boehm * src/atomic_ops/sysdeps/gcc/ia64.h: Include all_acquire_release_volatile.h, instead of just the pointer-sized version. * src/atomic_ops/sysdeps/gcc/ia64.h: Include all_acquire_release_volatile.h and all_atomic_load_store.h, instead of just the pointer-sized versions. [1.1 release] 2005-09-27 Hans Boehm * src/atomic_ops.h: Define AO_CAN_EMUL_CAS for arm. * src/atomic_ops/sysdeps/read_ordered.h: New file, extracted from ordered_except_wr.h. * src/atomic_ops/sysdeps/ordered_except_wr.h: include read_ordered.h instead of duplicating it. * src/atomic_ops/sysdeps/gcc/arm.h: Include read_ordered.h. 2005-09-16 Hans Boehm * src/atomic_ops/sysdeps/gcc/arm.h: Replace the AO_test_and_set definition with one that might actually work. (Thanks to Kazu Hirata and Paul Brook.) 2005-08-01 Hans Boehm * src/atomic_ops/Makefile.am: Change function naming from "byte" to "char" (again). [1.0 release] 2005-03-21 Hans Boehm Fix various acquire_release_volatile.h files to reflect the fact that both icc and gcc seem to reorder ordinary memory accesses around volatile accesses early in the compilation. Modify the acquire release test to catch this problem (with high probability, and only on a multiprocessor). 2005-03 Hans Boehm Fixes for recently introduced bugs. Update x86 and x86-64 assembly syntax to deal with complaints by some recent gcc versions. 2005-02 Hans Boehm Added libatomic_ops_gpl library with support for mostly lock-free stack and malloc(). 2005-01 Ian Wienand , Al Stone , Hans Boehm Use autoconf, automake, starting with code from Debian package. Don't use libtool. 2005-01 Hans Boehm * test_and_set_t_is_ao_t.h, test_and_set_t_is_char.h, others: Change most platforms to use byte-wide test-and-set locations. 2005-01 Hans Boehm * ao_t_is_int.h: Add to trivially support int-wide operations on platforms with int-sized pointers. 2004-12 Hans Boehm * gcc/powerpc.h: First serious attempt to support PowerPC (with help from Maged Michael and others). 2004-12 Hans Boehm * sunc/sparc.[hS]: Added minimal support for the Sun SPARC compiler. * atomic_ops_sysdeps.S: Add support for platforms that require out-of-line assembly code. 2004-10 Hans Boehm More work on char, short, int sized data. Add both compare_double_and_swap_double and compare_and_swap_double. Typically each platform will provide at most one of these. 2004-07-02 Ranko Zivojnovic Replace both instances of AO_HAVE_NOP_FULL with AO_HAVE_nop_full. 2004-06 Hans Boehm Start to add atomic_ops primitives for different sized data. 2003-12-18 Hans Boehm * atomic_ops/sysdeps/acquire_release_volatile.h, atomic_ops.h: Fix support for ecc on IA64. Remove compiler_barrier workaround for gcc 3.4 and later. 2003-12-17 Hans Boehm * atomic_ops/sysdeps/hpc/{ia64.h,hppa.h}, atomic_ops/sysdeps/msftc/x86.h, Makefile, Makefile.atomic_ops, Makefile.atomic_ops.msft, atomic_ops.h: Add initial support for atomic_ops for VC++/Windows/X86 and HP/UX with the HP compiler on PA_RISC and IA64. 2003-12-09 Hans Boehm * many: Install under "atomic_ops" instead of "ao". Change atomic_ops include file structure. Auxiliary include files are all under include/atomic_ops. Fix (hopefully) "make dist" in atomic_ops distribution. Renamed various types to end in _t, though the old versions are still defined for backward compatibility. 2003-12-08 Carlos O'Donell * ao_sysdeps/gcc/hppa.h: Define AO_CLEAR macro. Change AO_pa_clearable_loc type. Add __ldcw, and __ldcw_align helper macros. AO_test_and_set_full uses helper macros. Started sometime after version 0.4 release. Currently the format is informal. Eventually should become more GNU-like. libatomic_ops-7.2/compile0000755000175000017500000000727111753234157012524 00000000000000#! /bin/sh # Wrapper for compilers which do not understand `-c -o'. scriptversion=2009-10-06.20; # UTC # Copyright (C) 1999, 2000, 2003, 2004, 2005, 2009 Free Software # Foundation, Inc. # Written by Tom Tromey . # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # This file is maintained in Automake, please report # bugs to or send patches to # . case $1 in '') echo "$0: No command. Try \`$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: compile [--help] [--version] PROGRAM [ARGS] Wrapper for compilers which do not understand `-c -o'. Remove `-o dest.o' from ARGS, run PROGRAM with the remaining arguments, and rename the output as expected. If you are trying to build a whole package this is not the right script to run: please start by reading the file `INSTALL'. Report bugs to . EOF exit $? ;; -v | --v*) echo "compile $scriptversion" exit $? ;; esac ofile= cfile= eat= for arg do if test -n "$eat"; then eat= else case $1 in -o) # configure might choose to run compile as `compile cc -o foo foo.c'. # So we strip `-o arg' only if arg is an object. eat=1 case $2 in *.o | *.obj) ofile=$2 ;; *) set x "$@" -o "$2" shift ;; esac ;; *.c) cfile=$1 set x "$@" "$1" shift ;; *) set x "$@" "$1" shift ;; esac fi shift done if test -z "$ofile" || test -z "$cfile"; then # If no `-o' option was seen then we might have been invoked from a # pattern rule where we don't need one. That is ok -- this is a # normal compilation that the losing compiler can handle. If no # `.c' file was seen then we are probably linking. That is also # ok. exec "$@" fi # Name of file we expect compiler to create. cofile=`echo "$cfile" | sed 's|^.*[\\/]||; s|^[a-zA-Z]:||; s/\.c$/.o/'` # Create the lock directory. # Note: use `[/\\:.-]' here to ensure that we don't use the same name # that we are using for the .o file. Also, base the name on the expected # object file name, since that is what matters with a parallel build. lockdir=`echo "$cofile" | sed -e 's|[/\\:.-]|_|g'`.d while true; do if mkdir "$lockdir" >/dev/null 2>&1; then break fi sleep 1 done # FIXME: race condition here if user kills between mkdir and trap. trap "rmdir '$lockdir'; exit 1" 1 2 15 # Run the compile. "$@" ret=$? if test -f "$cofile"; then test "$cofile" = "$ofile" || mv "$cofile" "$ofile" elif test -f "${cofile}bj"; then test "${cofile}bj" = "$ofile" || mv "${cofile}bj" "$ofile" fi rmdir "$lockdir" exit $ret # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: libatomic_ops-7.2/tests/0000755000175000017500000000000011753234214012353 500000000000000libatomic_ops-7.2/tests/test_atomic.template0000644000175000017500000001242711753234157016357 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: XX)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "XX") void test_atomicXX(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_setXX) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nopXX) AO_nopXX(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_storeXX) AO_storeXX(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_loadXX) TA_assert(AO_loadXX(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_setXX) assert(AO_test_and_setXX(&z) == AO_TS_CLEAR); assert(AO_test_and_setXX(&z) == AO_TS_SET); assert(AO_test_and_setXX(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_addXX) TA_assert(AO_fetch_and_addXX(&x, 42) == 13); TA_assert(AO_fetch_and_addXX(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1XX) TA_assert(AO_fetch_and_add1XX(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1XX) TA_assert(AO_fetch_and_sub1XX(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_storeXX) AO_short_storeXX(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_loadXX) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_addXX) TA_assert(AO_short_fetch_and_addXX(&s, 42) == 13); TA_assert(AO_short_fetch_and_addXX(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1XX) TA_assert(AO_short_fetch_and_add1XX(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1XX) TA_assert(AO_short_fetch_and_sub1XX(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_storeXX) AO_char_storeXX(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_loadXX) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_addXX) TA_assert(AO_char_fetch_and_addXX(&b, 42) == 13); TA_assert(AO_char_fetch_and_addXX(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1XX) TA_assert(AO_char_fetch_and_add1XX(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1XX) TA_assert(AO_char_fetch_and_sub1XX(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_storeXX) AO_int_storeXX(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_loadXX) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_addXX) TA_assert(AO_int_fetch_and_addXX(&zz, 42) == 13); TA_assert(AO_int_fetch_and_addXX(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1XX) TA_assert(AO_int_fetch_and_add1XX(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1XX) TA_assert(AO_int_fetch_and_sub1XX(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swapXX) TA_assert(!AO_compare_and_swapXX(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swapXX(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_orXX) AO_orXX(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_doubleXX) TA_assert(!AO_compare_double_and_swap_doubleXX(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_doubleXX(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_doubleXX(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_doubleXX) TA_assert(!AO_compare_and_swap_doubleXX(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_doubleXX(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_doubleXX(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } libatomic_ops-7.2/tests/test_malloc.c0000644000175000017500000001145111753234157014755 00000000000000/* * Copyright (c) 2005 Hewlett-Packard Development Company, L.P. * Original Author: Hans Boehm * * This file may be redistributed and/or modified under the * terms of the GNU General Public License as published by the Free Software * Foundation; either version 2, or (at your option) any later version. * * It is distributed in the hope that it will be useful, but WITHOUT ANY * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS * FOR A PARTICULAR PURPOSE. See the GNU General Public License in the * file doc/COPYING for more details. */ #if defined(HAVE_CONFIG_H) # include "config.h" #endif #include "run_parallel.inc" #include #include #include "atomic_ops_malloc.h" #ifndef MAX_NTHREADS # define MAX_NTHREADS 100 #endif #ifndef DEFAULT_NTHREADS # ifdef HAVE_MMAP # define DEFAULT_NTHREADS 10 # else # define DEFAULT_NTHREADS 3 # endif #endif #ifndef N_REVERSALS # define N_REVERSALS 1000 /* must be even */ #endif #ifndef LIST_LENGTH # ifdef HAVE_MMAP # define LIST_LENGTH 1000 # else # define LIST_LENGTH 100 # endif #endif #ifndef LARGE_OBJ_SIZE # ifdef HAVE_MMAP # define LARGE_OBJ_SIZE 200000 # else # define LARGE_OBJ_SIZE 20000 # endif #endif #ifdef USE_STANDARD_MALLOC # define AO_malloc(n) malloc(n) # define AO_free(p) free(p) # define AO_malloc_enable_mmap() #endif typedef struct list_node { struct list_node *next; int data; } ln; ln *cons(int d, ln *tail) { static size_t extra = 0; size_t my_extra = extra; ln *result; int * extras; int i; if (my_extra > 100) extra = my_extra = 0; else ++extra; result = AO_malloc(sizeof(ln) + sizeof(int)*my_extra); if (result == 0) { fprintf(stderr, "Out of memory\n"); /* Normal for more than about 10 threads without mmap? */ exit(2); } result -> data = d; result -> next = tail; extras = (int *)(result+1); for (i = 0; i < my_extra; ++i) extras[i] = 42; return result; } void print_list(ln *l) { ln *p; for (p = l; p != 0; p = p -> next) { fprintf(stderr, "%d, ", p -> data); } fprintf(stderr, "\n"); } /* Check that l contains numbers from m to n inclusive in ascending order */ void check_list(ln *l, int m, int n) { ln *p; int i; for (p = l, i = m; p != 0; p = p -> next, ++i) { if (i != p -> data) { fprintf(stderr, "Found %d, expected %d\n", p -> data, i); abort(); } } } /* Create a list of integers from m to n */ ln * make_list(int m, int n) { if (m > n) return 0; return cons(m, make_list(m+1, n)); } /* Reverse list x, and concatenate it to y, deallocating no longer needed */ /* nodes in x. */ ln * reverse(ln *x, ln *y) { ln * result; if (x == 0) return y; result = reverse(x -> next, cons(x -> data, y)); AO_free(x); return result; } int dummy_test(void) { return 1; } void * run_one_test(void * arg) { ln * x = make_list(1, LIST_LENGTH); int i; char *p = AO_malloc(LARGE_OBJ_SIZE); char *q; if (0 == p) { # ifdef HAVE_MMAP fprintf(stderr, "AO_malloc(%d) failed\n", LARGE_OBJ_SIZE); # else fprintf(stderr, "AO_malloc(%d) failed: This is normal without mmap\n", LARGE_OBJ_SIZE); # endif } else { p[0] = p[LARGE_OBJ_SIZE/2] = p[LARGE_OBJ_SIZE-1] = 'a'; q = AO_malloc(LARGE_OBJ_SIZE); if (q == 0) { fprintf(stderr, "Out of memory\n"); /* Normal for more than about 10 threads without mmap? */ exit(2); } q[0] = q[LARGE_OBJ_SIZE/2] = q[LARGE_OBJ_SIZE-1] = 'b'; if (p[0] != 'a' || p[LARGE_OBJ_SIZE/2] != 'a' || p[LARGE_OBJ_SIZE-1] != 'a') { fprintf(stderr, "First large allocation smashed\n"); abort(); } AO_free(p); if (q[0] != 'b' || q[LARGE_OBJ_SIZE/2] != 'b' || q[LARGE_OBJ_SIZE-1] != 'b') { fprintf(stderr, "Second large allocation smashed\n"); abort(); } AO_free(q); } # ifdef DEBUG_RUN_ONE_TEST x = reverse(x, 0); print_list(x); x = reverse(x, 0); print_list(x); # endif for (i = 0; i < N_REVERSALS; ++i) { x = reverse(x, 0); } check_list(x, 1, LIST_LENGTH); return 0; } int main(int argc, char **argv) { int nthreads; if (1 == argc) { nthreads = DEFAULT_NTHREADS; } else if (2 == argc) { nthreads = atoi(argv[1]); if (nthreads < 1 || nthreads > MAX_NTHREADS) { fprintf(stderr, "Invalid # of threads argument\n"); exit(1); } } else { fprintf(stderr, "Usage: %s [# of threads]\n", argv[0]); exit(1); } printf("Performing %d reversals of %d element lists in %d threads\n", N_REVERSALS, LIST_LENGTH, nthreads); AO_malloc_enable_mmap(); run_parallel(nthreads, run_one_test, dummy_test, "AO_malloc/AO_free"); return 0; } libatomic_ops-7.2/tests/Makefile.in0000644000175000017500000005302211753234204014341 00000000000000# Makefile.in generated by automake 1.11.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, # Inc. # This Makefile.in is free software; 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All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop) "AO_nop(): "; AO_nop(); # else "No AO_nop"; # endif # if defined(AO_HAVE_load) "AO_load(&val):"; AO_load(&val); # else "No AO_load"; # endif # if defined(AO_HAVE_store) "AO_store(&val, newval):"; AO_store(&val, newval); # else "No AO_store"; # endif # if defined(AO_HAVE_test_and_set) "AO_test_and_set(&ts):"; AO_test_and_set(&ts); # else "No AO_test_and_set"; # endif # if defined(AO_HAVE_fetch_and_add1) "AO_fetch_and_add1(&val):"; AO_fetch_and_add1(&val); # else "No AO_fetch_and_add1"; # endif # if defined(AO_HAVE_fetch_and_sub1) "AO_fetch_and_sub1(&val):"; AO_fetch_and_sub1(&val); # else "No AO_fetch_and_sub1"; # endif # if defined(AO_HAVE_fetch_and_add) "AO_fetch_and_add(&val, incr):"; AO_fetch_and_add(&val, incr); # else "No AO_fetch_and_add"; # endif # if defined(AO_HAVE_compare_and_swap) "AO_compare_and_swap(&val, oldval, newval):"; AO_compare_and_swap(&val, oldval, newval); # else "No AO_compare_and_swap"; # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic_release(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop_release) "AO_nop_release(): "; AO_nop_release(); # else "No AO_nop_release"; # endif # if defined(AO_HAVE_load_release) "AO_load_release(&val):"; AO_load_release(&val); # else "No AO_load_release"; # endif # if defined(AO_HAVE_store_release) "AO_store_release(&val, newval):"; AO_store_release(&val, newval); # else "No AO_store_release"; # endif # if defined(AO_HAVE_test_and_set_release) "AO_test_and_set_release(&ts):"; AO_test_and_set_release(&ts); # else "No AO_test_and_set_release"; # endif # if defined(AO_HAVE_fetch_and_add1_release) "AO_fetch_and_add1_release(&val):"; AO_fetch_and_add1_release(&val); # else "No AO_fetch_and_add1_release"; # endif # if defined(AO_HAVE_fetch_and_sub1_release) "AO_fetch_and_sub1_release(&val):"; AO_fetch_and_sub1_release(&val); # else "No AO_fetch_and_sub1_release"; # endif # if defined(AO_HAVE_fetch_and_add_release) "AO_fetch_and_add_release(&val, incr):"; AO_fetch_and_add_release(&val, incr); # else "No AO_fetch_and_add_release"; # endif # if defined(AO_HAVE_compare_and_swap_release) "AO_compare_and_swap_release(&val, oldval, newval):"; AO_compare_and_swap_release(&val, oldval, newval); # else "No AO_compare_and_swap_release"; # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic_acquire(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop_acquire) "AO_nop_acquire(): "; AO_nop_acquire(); # else "No AO_nop_acquire"; # endif # if defined(AO_HAVE_load_acquire) "AO_load_acquire(&val):"; AO_load_acquire(&val); # else "No AO_load_acquire"; # endif # if defined(AO_HAVE_store_acquire) "AO_store_acquire(&val, newval):"; AO_store_acquire(&val, newval); # else "No AO_store_acquire"; # endif # if defined(AO_HAVE_test_and_set_acquire) "AO_test_and_set_acquire(&ts):"; AO_test_and_set_acquire(&ts); # else "No AO_test_and_set_acquire"; # endif # if defined(AO_HAVE_fetch_and_add1_acquire) "AO_fetch_and_add1_acquire(&val):"; AO_fetch_and_add1_acquire(&val); # else "No AO_fetch_and_add1_acquire"; # endif # if defined(AO_HAVE_fetch_and_sub1_acquire) "AO_fetch_and_sub1_acquire(&val):"; AO_fetch_and_sub1_acquire(&val); # else "No AO_fetch_and_sub1_acquire"; # endif # if defined(AO_HAVE_fetch_and_add_acquire) "AO_fetch_and_add_acquire(&val, incr):"; AO_fetch_and_add_acquire(&val, incr); # else "No AO_fetch_and_add_acquire"; # endif # if defined(AO_HAVE_compare_and_swap_acquire) "AO_compare_and_swap_acquire(&val, oldval, newval):"; AO_compare_and_swap_acquire(&val, oldval, newval); # else "No AO_compare_and_swap_acquire"; # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic_read(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop_read) "AO_nop_read(): "; AO_nop_read(); # else "No AO_nop_read"; # endif # if defined(AO_HAVE_load_read) "AO_load_read(&val):"; AO_load_read(&val); # else "No AO_load_read"; # endif # if defined(AO_HAVE_store_read) "AO_store_read(&val, newval):"; AO_store_read(&val, newval); # else "No AO_store_read"; # endif # if defined(AO_HAVE_test_and_set_read) "AO_test_and_set_read(&ts):"; AO_test_and_set_read(&ts); # else "No AO_test_and_set_read"; # endif # if defined(AO_HAVE_fetch_and_add1_read) "AO_fetch_and_add1_read(&val):"; AO_fetch_and_add1_read(&val); # else "No AO_fetch_and_add1_read"; # endif # if defined(AO_HAVE_fetch_and_sub1_read) "AO_fetch_and_sub1_read(&val):"; AO_fetch_and_sub1_read(&val); # else "No AO_fetch_and_sub1_read"; # endif # if defined(AO_HAVE_fetch_and_add_read) "AO_fetch_and_add_read(&val, incr):"; AO_fetch_and_add_read(&val, incr); # else "No AO_fetch_and_add_read"; # endif # if defined(AO_HAVE_compare_and_swap_read) "AO_compare_and_swap_read(&val, oldval, newval):"; AO_compare_and_swap_read(&val, oldval, newval); # else "No AO_compare_and_swap_read"; # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic_write(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop_write) "AO_nop_write(): "; AO_nop_write(); # else "No AO_nop_write"; # endif # if defined(AO_HAVE_load_write) "AO_load_write(&val):"; AO_load_write(&val); # else "No AO_load_write"; # endif # if defined(AO_HAVE_store_write) "AO_store_write(&val, newval):"; AO_store_write(&val, newval); # else "No AO_store_write"; # endif # if defined(AO_HAVE_test_and_set_write) "AO_test_and_set_write(&ts):"; AO_test_and_set_write(&ts); # else "No AO_test_and_set_write"; # endif # if defined(AO_HAVE_fetch_and_add1_write) "AO_fetch_and_add1_write(&val):"; AO_fetch_and_add1_write(&val); # else "No AO_fetch_and_add1_write"; # endif # if defined(AO_HAVE_fetch_and_sub1_write) "AO_fetch_and_sub1_write(&val):"; AO_fetch_and_sub1_write(&val); # else "No AO_fetch_and_sub1_write"; # endif # if defined(AO_HAVE_fetch_and_add_write) "AO_fetch_and_add_write(&val, incr):"; AO_fetch_and_add_write(&val, incr); # else "No AO_fetch_and_add_write"; # endif # if defined(AO_HAVE_compare_and_swap_write) "AO_compare_and_swap_write(&val, oldval, newval):"; AO_compare_and_swap_write(&val, oldval, newval); # else "No AO_compare_and_swap_write"; # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic_full(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop_full) "AO_nop_full(): "; AO_nop_full(); # else "No AO_nop_full"; # endif # if defined(AO_HAVE_load_full) "AO_load_full(&val):"; AO_load_full(&val); # else "No AO_load_full"; # endif # if defined(AO_HAVE_store_full) "AO_store_full(&val, newval):"; AO_store_full(&val, newval); # else "No AO_store_full"; # endif # if defined(AO_HAVE_test_and_set_full) "AO_test_and_set_full(&ts):"; AO_test_and_set_full(&ts); # else "No AO_test_and_set_full"; # endif # if defined(AO_HAVE_fetch_and_add1_full) "AO_fetch_and_add1_full(&val):"; AO_fetch_and_add1_full(&val); # else "No AO_fetch_and_add1_full"; # endif # if defined(AO_HAVE_fetch_and_sub1_full) "AO_fetch_and_sub1_full(&val):"; AO_fetch_and_sub1_full(&val); # else "No AO_fetch_and_sub1_full"; # endif # if defined(AO_HAVE_fetch_and_add_full) "AO_fetch_and_add_full(&val, incr):"; AO_fetch_and_add_full(&val, incr); # else "No AO_fetch_and_add_full"; # endif # if defined(AO_HAVE_compare_and_swap_full) "AO_compare_and_swap_full(&val, oldval, newval):"; AO_compare_and_swap_full(&val, oldval, newval); # else "No AO_compare_and_swap_full"; # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic_release_write(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop_release_write) "AO_nop_release_write(): "; AO_nop_release_write(); # else "No AO_nop_release_write"; # endif # if defined(AO_HAVE_load_release_write) "AO_load_release_write(&val):"; AO_load_release_write(&val); # else "No AO_load_release_write"; # endif # if defined(AO_HAVE_store_release_write) "AO_store_release_write(&val, newval):"; AO_store_release_write(&val, newval); # else "No AO_store_release_write"; # endif # if defined(AO_HAVE_test_and_set_release_write) "AO_test_and_set_release_write(&ts):"; AO_test_and_set_release_write(&ts); # else "No AO_test_and_set_release_write"; # endif # if defined(AO_HAVE_fetch_and_add1_release_write) "AO_fetch_and_add1_release_write(&val):"; AO_fetch_and_add1_release_write(&val); # else "No AO_fetch_and_add1_release_write"; # endif # if defined(AO_HAVE_fetch_and_sub1_release_write) "AO_fetch_and_sub1_release_write(&val):"; AO_fetch_and_sub1_release_write(&val); # else "No AO_fetch_and_sub1_release_write"; # endif # if defined(AO_HAVE_fetch_and_add_release_write) "AO_fetch_and_add_release_write(&val, incr):"; AO_fetch_and_add_release_write(&val, incr); # else "No AO_fetch_and_add_release_write"; # endif # if defined(AO_HAVE_compare_and_swap_release_write) "AO_compare_and_swap_release_write(&val, oldval, newval):"; AO_compare_and_swap_release_write(&val, oldval, newval); # else "No AO_compare_and_swap_release_write"; # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomic_acquire_read(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nop_acquire_read) "AO_nop_acquire_read(): "; AO_nop_acquire_read(); # else "No AO_nop_acquire_read"; # endif # if defined(AO_HAVE_load_acquire_read) "AO_load_acquire_read(&val):"; AO_load_acquire_read(&val); # else "No AO_load_acquire_read"; # endif # if defined(AO_HAVE_store_acquire_read) "AO_store_acquire_read(&val, newval):"; AO_store_acquire_read(&val, newval); # else "No AO_store_acquire_read"; # endif # if defined(AO_HAVE_test_and_set_acquire_read) "AO_test_and_set_acquire_read(&ts):"; AO_test_and_set_acquire_read(&ts); # else "No AO_test_and_set_acquire_read"; # endif # if defined(AO_HAVE_fetch_and_add1_acquire_read) "AO_fetch_and_add1_acquire_read(&val):"; AO_fetch_and_add1_acquire_read(&val); # else "No AO_fetch_and_add1_acquire_read"; # endif # if defined(AO_HAVE_fetch_and_sub1_acquire_read) "AO_fetch_and_sub1_acquire_read(&val):"; AO_fetch_and_sub1_acquire_read(&val); # else "No AO_fetch_and_sub1_acquire_read"; # endif # if defined(AO_HAVE_fetch_and_add_acquire_read) "AO_fetch_and_add_acquire_read(&val, incr):"; AO_fetch_and_add_acquire_read(&val, incr); # else "No AO_fetch_and_add_acquire_read"; # endif # if defined(AO_HAVE_compare_and_swap_acquire_read) "AO_compare_and_swap_acquire_read(&val, oldval, newval):"; AO_compare_and_swap_acquire_read(&val, oldval, newval); # else "No AO_compare_and_swap_acquire_read"; # endif } libatomic_ops-7.2/tests/test_atomic.c0000644000175000017500000001114011753234157014755 00000000000000/* * Copyright (c) 2003-2005 Hewlett-Packard Development Company, L.P. * Original Author: Hans Boehm * * This file may be redistributed and/or modified under the * terms of the GNU General Public License as published by the Free Software * Foundation; either version 2, or (at your option) any later version. * * It is distributed in the hope that it will be useful, but WITHOUT ANY * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS * FOR A PARTICULAR PURPOSE. See the GNU General Public License in the * file doc/COPYING for more details. */ #if defined(HAVE_CONFIG_H) # include "config.h" #endif #include "run_parallel.inc" #include "test_atomic_include.h" #ifdef AO_USE_PTHREAD_DEFS # define NITERS 100000 #else # define NITERS 10000000 #endif void * add1sub1_thr(void * id); int add1sub1_test(void); void * acqrel_thr(void *id); int acqrel_test(void); void * test_and_set_thr(void * id); int test_and_set_test(void); #if defined(AO_HAVE_fetch_and_add1) && defined(AO_HAVE_fetch_and_sub1) AO_t counter = 0; void * add1sub1_thr(void * id) { int me = (int)(AO_PTRDIFF_T)id; int i; for (i = 0; i < NITERS; ++i) if (me & 1) AO_fetch_and_sub1(&counter); else AO_fetch_and_add1(&counter); return 0; } int add1sub1_test(void) { return counter == 0; } #endif /* defined(AO_HAVE_fetch_and_add1) && defined(AO_HAVE_fetch_and_sub1) */ #if defined(AO_HAVE_store_release_write) && defined(AO_HAVE_load_acquire_read) /* Invariant: counter1 >= counter2 */ AO_t counter1 = 0; AO_t counter2 = 0; void * acqrel_thr(void *id) { int me = (int)(AO_PTRDIFF_T)id; int i; for (i = 0; i < NITERS; ++i) if (me & 1) { AO_t my_counter1; if (me != 1) fprintf(stderr, "acqrel test: too many threads\n"); my_counter1 = AO_load(&counter1); AO_store(&counter1, my_counter1 + 1); AO_store_release_write(&counter2, my_counter1 + 1); } else { AO_t my_counter1a, my_counter2a; AO_t my_counter1b, my_counter2b; my_counter2a = AO_load_acquire_read(&counter2); my_counter1a = AO_load(&counter1); /* Redo this, to make sure that the second load of counter1 */ /* is not viewed as a common subexpression. */ my_counter2b = AO_load_acquire_read(&counter2); my_counter1b = AO_load(&counter1); if (my_counter1a < my_counter2a) { fprintf(stderr, "Saw release store out of order: %lu < %lu\n", (unsigned long)my_counter1a, (unsigned long)my_counter2a); abort(); } if (my_counter1b < my_counter2b) { fprintf(stderr, "Saw release store out of order (bad CSE?): %lu < %lu\n", (unsigned long)my_counter1b, (unsigned long)my_counter2b); abort(); } } return 0; } int acqrel_test(void) { return counter1 == NITERS && counter2 == NITERS; } #endif /* AO_HAVE_store_release_write && AO_HAVE_load_acquire_read */ #if defined(AO_HAVE_test_and_set_acquire) AO_TS_T lock = AO_TS_INITIALIZER; unsigned long locked_counter; volatile unsigned long junk = 13; void * test_and_set_thr(void * id) { unsigned long i; for (i = 0; i < NITERS/10; ++i) { while (AO_test_and_set_acquire(&lock) != AO_TS_CLEAR); ++locked_counter; if (locked_counter != 1) { fprintf(stderr, "Test and set failure 1, counter = %ld\n", locked_counter); abort(); } locked_counter *= 2; locked_counter -= 1; locked_counter *= 5; locked_counter -= 4; if (locked_counter != 1) { fprintf(stderr, "Test and set failure 2, counter = %ld\n", locked_counter); abort(); } --locked_counter; AO_CLEAR(&lock); /* Spend a bit of time outside the lock. */ junk *= 17; junk *= 17; } return 0; } int test_and_set_test(void) { return locked_counter == 0; } #endif /* defined(AO_HAVE_test_and_set_acquire) */ int main(void) { test_atomic(); test_atomic_acquire(); test_atomic_release(); test_atomic_read(); test_atomic_write(); test_atomic_full(); test_atomic_release_write(); test_atomic_acquire_read(); # if defined(AO_HAVE_fetch_and_add1) && defined(AO_HAVE_fetch_and_sub1) run_parallel(4, add1sub1_thr, add1sub1_test, "add1/sub1"); # endif # if defined(AO_HAVE_store_release_write) && defined(AO_HAVE_load_acquire_read) run_parallel(3, acqrel_thr, acqrel_test, "store_release_write/load_acquire_read"); # endif # if defined(AO_HAVE_test_and_set_acquire) run_parallel(5, test_and_set_thr, test_and_set_test, "test_and_set"); # endif return 0; } libatomic_ops-7.2/tests/Makefile.am0000644000175000017500000000326111753234157014337 00000000000000EXTRA_DIST=test_atomic.template list_atomic.template run_parallel.inc \ test_atomic_include.h list_atomic.c # We distribute test_atomic_include.h and list_atomic.c, since it is hard # to regenerate them on Windows without sed. BUILT_SOURCES = test_atomic_include.h list_atomic.i CLEANFILES = list_atomic.i AM_CPPFLAGS = -I$(top_builddir)/src -I$(top_srcdir)/src if HAVE_PTHREAD_H TESTS=test_atomic test_atomic_pthreads test_stack test_malloc test_atomic_pthreads_SOURCES=$(test_atomic_SOURCES) test_atomic_pthreads_CPPFLAGS=-DAO_USE_PTHREAD_DEFS $(AM_CPPFLAGS) test_atomic_pthreads_LDADD=$(test_atomic_LDADD) else TESTS=test_atomic test_stack test_malloc endif check_PROGRAMS=$(TESTS) test_atomic_SOURCES=test_atomic.c test_atomic_LDADD=$(THREADDLLIBS) ../src/libatomic_ops.a test_stack_SOURCES=test_stack.c test_stack_LDADD=$(THREADDLLIBS) ../src/libatomic_ops_gpl.a \ ../src/libatomic_ops.a test_malloc_SOURCES=test_malloc.c test_malloc_LDADD=$(THREADDLLIBS) ../src/libatomic_ops_gpl.a \ ../src/libatomic_ops.a test_atomic_include.h: test_atomic.template sed -e s/XX// $? > $@ sed -e s/XX/_release/ $? >> $@ sed -e s/XX/_acquire/ $? >> $@ sed -e s/XX/_read/ $? >> $@ sed -e s/XX/_write/ $? >> $@ sed -e s/XX/_full/ $? >> $@ sed -e s/XX/_release_write/ $? >> $@ sed -e s/XX/_acquire_read/ $? >> $@ list_atomic.c: list_atomic.template echo "#include \"atomic_ops.h\" " > $@ sed -e s/XX// $? >> $@ sed -e s/XX/_release/ $? >> $@ sed -e s/XX/_acquire/ $? >> $@ sed -e s/XX/_read/ $? >> $@ sed -e s/XX/_write/ $? >> $@ sed -e s/XX/_full/ $? >> $@ sed -e s/XX/_release_write/ $? >> $@ sed -e s/XX/_acquire_read/ $? >> $@ list_atomic.i: list_atomic.c $(COMPILE) $? -E > list_atomic.i libatomic_ops-7.2/tests/list_atomic.template0000644000175000017500000000324711753234157016353 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* This generates a compilable program. But it is really meant to be */ /* be used only with cc -E, to inspect the expensions generated by */ /* primitives. */ /* The result will not link or run. */ void list_atomicXX(void) { AO_T val, newval = 0, oldval = 0; AO_TS_T ts; long incr = 0; # if defined(AO_HAVE_nopXX) "AO_nopXX(): "; AO_nopXX(); # else "No AO_nopXX"; # endif # if defined(AO_HAVE_loadXX) "AO_loadXX(&val):"; AO_loadXX(&val); # else "No AO_loadXX"; # endif # if defined(AO_HAVE_storeXX) "AO_storeXX(&val, newval):"; AO_storeXX(&val, newval); # else "No AO_storeXX"; # endif # if defined(AO_HAVE_test_and_setXX) "AO_test_and_setXX(&ts):"; AO_test_and_setXX(&ts); # else "No AO_test_and_setXX"; # endif # if defined(AO_HAVE_fetch_and_add1XX) "AO_fetch_and_add1XX(&val):"; AO_fetch_and_add1XX(&val); # else "No AO_fetch_and_add1XX"; # endif # if defined(AO_HAVE_fetch_and_sub1XX) "AO_fetch_and_sub1XX(&val):"; AO_fetch_and_sub1XX(&val); # else "No AO_fetch_and_sub1XX"; # endif # if defined(AO_HAVE_fetch_and_addXX) "AO_fetch_and_addXX(&val, incr):"; AO_fetch_and_addXX(&val, incr); # else "No AO_fetch_and_addXX"; # endif # if defined(AO_HAVE_compare_and_swapXX) "AO_compare_and_swapXX(&val, oldval, newval):"; AO_compare_and_swapXX(&val, oldval, newval); # else "No AO_compare_and_swapXX"; # endif } libatomic_ops-7.2/tests/test_stack.c0000644000175000017500000001466511753234157014625 00000000000000/* * Copyright (c) 2005 Hewlett-Packard Development Company, L.P. * Original Author: Hans Boehm * * This file may be redistributed and/or modified under the * terms of the GNU General Public License as published by the Free Software * Foundation; either version 2, or (at your option) any later version. * * It is distributed in the hope that it will be useful, but WITHOUT ANY * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS * FOR A PARTICULAR PURPOSE. See the GNU General Public License in the * file doc/COPYING for more details. */ #if defined(HAVE_CONFIG_H) # include "config.h" #endif #if defined(__vxworks) || defined(_MSC_VER) || defined(_WIN32_WINCE) \ || (defined(_WIN32) && !defined(__CYGWIN32__) && !defined(__CYGWIN__)) /* Skip the test if no pthreads. */ int main(void) { return 0; } #else #include #include #include #include "atomic_ops.h" #include "atomic_ops_stack.h" #ifndef MAX_NTHREADS # define MAX_NTHREADS 100 #endif #ifndef NO_TIMES # include # include /* Need 64-bit long long support */ long long get_msecs(void) { struct timeval tv; gettimeofday(&tv, 0); return (long long)tv.tv_sec * 1000 + tv.tv_usec/1000; } #else # define get_msecs() 0 #endif typedef struct le { AO_t next; int data; } list_element; AO_stack_t the_list = AO_STACK_INITIALIZER; void add_elements(int n) { list_element * le; if (n == 0) return; add_elements(n-1); le = malloc(sizeof(list_element)); if (le == 0) { fprintf(stderr, "Out of memory\n"); exit(2); } le -> data = n; AO_stack_push(&the_list, (AO_t *)le); } void print_list(void) { list_element *p; for (p = (list_element *)AO_REAL_HEAD_PTR(the_list); p != 0; p = (list_element *)AO_REAL_NEXT_PTR(p -> next)) printf("%d\n", p -> data); } static char marks[MAX_NTHREADS * MAX_NTHREADS]; void check_list(int n) { list_element *p; int i; for (i = 1; i <= n; ++i) marks[i] = 0; for (p = (list_element *)AO_REAL_HEAD_PTR(the_list); p != 0; p = (list_element *)AO_REAL_NEXT_PTR(p -> next)) { if (p -> data > n || p -> data <= 0) fprintf(stderr, "Found erroneous list element %d\n", p -> data); if (marks[p -> data] != 0) fprintf(stderr, "Found duplicate list element %d\n", p -> data); marks[p -> data] = 1; } for (i = 1; i <= n; ++i) if (marks[i] != 1) fprintf(stderr, "Missing list element %d\n", i); } volatile AO_t ops_performed = 0; #define LIMIT 1000000 /* Total number of push/pop ops in all threads per test. */ #ifdef AO_HAVE_fetch_and_add # define fetch_and_add(addr, val) AO_fetch_and_add(addr, val) #else /* Fake it. This is really quite unacceptable for timing */ /* purposes. But as a correctness test, it should be OK. */ AO_INLINE AO_t fetch_and_add(volatile AO_t * addr, AO_t val) { AO_t result = AO_load(addr); AO_store(addr, result + val); return result; } #endif void * run_one_test(void * arg) { list_element * t[MAX_NTHREADS + 1]; long index = (long)arg; int i; int j = 0; # ifdef VERBOSE printf("starting thread %d\n", index); # endif while (fetch_and_add(&ops_performed, index + 1) + index + 1 < LIMIT) { for (i = 0; i < index + 1; ++i) { t[i] = (list_element *)AO_stack_pop(&the_list); if (0 == t[i]) { fprintf(stderr, "FAILED\n"); abort(); } } for (i = 0; i < index + 1; ++i) { AO_stack_push(&the_list, (AO_t *)t[i]); } j += (index + 1); } # ifdef VERBOSE printf("finished thread %d: %d total ops\n", index, j); # endif return 0; } #ifndef N_EXPERIMENTS # define N_EXPERIMENTS 1 #endif unsigned long times[MAX_NTHREADS + 1][N_EXPERIMENTS]; int main(int argc, char **argv) { int nthreads; int max_nthreads; int exper_n; if (1 == argc) max_nthreads = 4; else if (2 == argc) { max_nthreads = atoi(argv[1]); if (max_nthreads < 1 || max_nthreads > MAX_NTHREADS) { fprintf(stderr, "Invalid max # of threads argument\n"); exit(1); } } else { fprintf(stderr, "Usage: %s [max # of threads]\n", argv[0]); exit(1); } for (exper_n = 0; exper_n < N_EXPERIMENTS; ++ exper_n) for (nthreads = 1; nthreads <= max_nthreads; ++nthreads) { int i; pthread_t thread[MAX_NTHREADS]; int list_length = nthreads*(nthreads+1)/2; long long start_time; list_element * le; add_elements(list_length); # ifdef VERBOSE printf("Initial list (nthreads = %d):\n", nthreads); print_list(); # endif ops_performed = 0; start_time = get_msecs(); for (i = 1; i < nthreads; ++i) { int code; if ((code = pthread_create(thread+i, 0, run_one_test, (void *)(long)i)) != 0) { fprintf(stderr, "Thread creation failed %u\n", code); exit(3); } } /* We use the main thread to run one test. This allows gprof */ /* profiling to work, for example. */ run_one_test(0); for (i = 1; i < nthreads; ++i) { int code; if ((code = pthread_join(thread[i], 0)) != 0) { fprintf(stderr, "Thread join failed %u\n", code); } } times[nthreads][exper_n] = (unsigned long)(get_msecs() - start_time); # ifdef VERBOSE printf("%d %lu\n", nthreads, (unsigned long)(get_msecs() - start_time)); printf("final list (should be reordered initial list):\n"); print_list(); # endif check_list(list_length); while ((le = (list_element *)AO_stack_pop(&the_list)) != 0) free(le); } # ifndef NO_TIMES for (nthreads = 1; nthreads <= max_nthreads; ++nthreads) { unsigned long sum = 0; printf("About %d pushes + %d pops in %d threads:", LIMIT, LIMIT, nthreads); for (exper_n = 0; exper_n < N_EXPERIMENTS; ++exper_n) { # if defined(VERBOSE) printf("[%lu] ", times[nthreads][exper_n]); # endif sum += times[nthreads][exper_n]; } printf(" %lu msecs\n", (sum + N_EXPERIMENTS/2)/N_EXPERIMENTS); } # endif /* !NO_TIMES */ return 0; } #endif /* !_MSC_VER */ libatomic_ops-7.2/tests/run_parallel.inc0000644000175000017500000001107511753234157015460 00000000000000/* * Copyright (c) 2003-2005 Hewlett-Packard Development Company, L.P. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ #if defined(_MSC_VER) || \ defined(_WIN32) && !defined(__CYGWIN32__) && !defined(__CYGWIN__) || \ defined(_WIN32_WINCE) # define USE_WINTHREADS #elif defined(__vxworks) # define USE_VXTHREADS #else # define USE_PTHREADS #endif #include #include #ifdef USE_PTHREADS # include #endif #ifdef USE_VXTHREADS # include # include #endif #ifdef USE_WINTHREADS # include #endif #include "atomic_ops.h" #ifndef _WIN64 # define AO_PTRDIFF_T long #elif defined(__int64) # define AO_PTRDIFF_T __int64 #else # define AO_PTRDIFF_T long long #endif typedef void * (* thr_func)(void *); typedef int (* test_func)(void); /* Returns != 0 on success */ void * run_parallel(int nthreads, thr_func f1, test_func t, const char *name); #ifdef USE_PTHREADS void * run_parallel(int nthreads, thr_func f1, test_func t, const char *name) { pthread_attr_t attr; pthread_t thr[100]; int i; int code; fprintf(stderr, "Testing %s\n", name); if (nthreads > 100) { fprintf(stderr, "run_parallel: requested too many threads\n"); abort(); } # ifdef _HPUX_SOURCE /* Default stack size is too small, especially with the 64 bit ABI */ /* Increase it. */ if (pthread_default_stacksize_np(1024*1024, 0) != 0) { fprintf(stderr, "pthread_default_stacksize_np failed. " "OK after first call.\n"); } # endif pthread_attr_init(&attr); for (i = 0; i < nthreads; ++i) { if ((code = pthread_create(thr + i, &attr, f1, (void *)(long)i)) != 0) { perror("Thread creation failed"); fprintf(stderr, "Pthread_create returned %d, thread %d\n", code, i); abort(); } } for (i = 0; i < nthreads; ++i) { if ((code = pthread_join(thr[i], NULL)) != 0) { perror("Thread join failed"); fprintf(stderr, "Pthread_join returned %d, thread %d\n", code, i); abort(); } } if (t()) { fprintf(stderr, "Succeeded\n"); } else { fprintf(stderr, "Failed\n"); abort(); } return 0; } #endif /* USE_PTHREADS */ #ifdef USE_VXTHREADS void * run_parallel(int nthreads, thr_func f1, test_func t, const char *name) { int thr[100]; int i; fprintf(stderr, "Testing %s\n", name); if (nthreads > 100) { fprintf(stderr, "run_parallel: requested too many threads\n"); taskSuspend(0); } for (i = 0; i < nthreads; ++i) { thr[i] = taskSpawn((char*) name, 180, 0, 32768, (FUNCPTR) f1, i, 1, 2, 3, 4, 5, 6, 7, 8, 9); if (thr[i] == ERROR) { fprintf(stderr, "taskSpawn failed with %d, thread %d\n", errno, i); taskSuspend(0); } } for (i = 0; i < nthreads; ++i) { while (taskIdVerify(thr[i]) == OK) taskDelay(60); } if (t()) { fprintf(stderr, "Succeeded\n"); } else { fprintf(stderr, "Failed\n"); taskSuspend(0); } return 0; } #endif /* USE_VXTHREADS */ #ifdef USE_WINTHREADS struct tramp_args { thr_func fn; long arg; }; DWORD WINAPI tramp(LPVOID param) { struct tramp_args *args = (struct tramp_args *)param; return (DWORD)(AO_PTRDIFF_T)(*args->fn)((LPVOID)(AO_PTRDIFF_T)args->arg); } void * run_parallel(int nthreads, thr_func f1, test_func t, const char *name) { HANDLE thr[100]; struct tramp_args args[100]; int i; DWORD code; fprintf(stderr, "Testing %s\n", name); if (nthreads > 100) { fprintf(stderr, "run_parallel: requested too many threads\n"); abort(); } for (i = 0; i < nthreads; ++i) { args[i].fn = f1; args[i].arg = i; if ((thr[i] = CreateThread(NULL, 0, tramp, (LPVOID)(args+i), 0, NULL)) == NULL) { perror("Thread creation failed"); fprintf(stderr, "CreateThread failed with %lu, thread %d\n", (unsigned long)GetLastError(), i); abort(); } } for (i = 0; i < nthreads; ++i) { if ((code = WaitForSingleObject(thr[i], INFINITE)) != WAIT_OBJECT_0) { perror("Thread join failed"); fprintf(stderr, "WaitForSingleObject returned %lu, thread %d\n", (unsigned long)code, i); abort(); } } if (t()) { fprintf(stderr, "Succeeded\n"); } else { fprintf(stderr, "Failed\n"); abort(); } return 0; } #endif /* USE_WINTHREADS */ libatomic_ops-7.2/tests/test_atomic_include.h0000644000175000017500000013157011753234157016477 00000000000000/* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: )\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "") void test_atomic(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop) AO_nop(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store) AO_store(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load) TA_assert(AO_load(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set) assert(AO_test_and_set(&z) == AO_TS_CLEAR); assert(AO_test_and_set(&z) == AO_TS_SET); assert(AO_test_and_set(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add) TA_assert(AO_fetch_and_add(&x, 42) == 13); TA_assert(AO_fetch_and_add(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1) TA_assert(AO_fetch_and_add1(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1) TA_assert(AO_fetch_and_sub1(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store) AO_short_store(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add) TA_assert(AO_short_fetch_and_add(&s, 42) == 13); TA_assert(AO_short_fetch_and_add(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1) TA_assert(AO_short_fetch_and_add1(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1) TA_assert(AO_short_fetch_and_sub1(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store) AO_char_store(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add) TA_assert(AO_char_fetch_and_add(&b, 42) == 13); TA_assert(AO_char_fetch_and_add(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1) TA_assert(AO_char_fetch_and_add1(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1) TA_assert(AO_char_fetch_and_sub1(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store) AO_int_store(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add) TA_assert(AO_int_fetch_and_add(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1) TA_assert(AO_int_fetch_and_add1(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1) TA_assert(AO_int_fetch_and_sub1(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap) TA_assert(!AO_compare_and_swap(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or) AO_or(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double) TA_assert(!AO_compare_double_and_swap_double(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double) TA_assert(!AO_compare_and_swap_double(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: _release)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "_release") void test_atomic_release(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set_release) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop_release) AO_nop_release(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store_release) AO_store_release(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load_release) TA_assert(AO_load_release(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set_release) assert(AO_test_and_set_release(&z) == AO_TS_CLEAR); assert(AO_test_and_set_release(&z) == AO_TS_SET); assert(AO_test_and_set_release(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add_release) TA_assert(AO_fetch_and_add_release(&x, 42) == 13); TA_assert(AO_fetch_and_add_release(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1_release) TA_assert(AO_fetch_and_add1_release(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1_release) TA_assert(AO_fetch_and_sub1_release(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store_release) AO_short_store_release(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load_release) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add_release) TA_assert(AO_short_fetch_and_add_release(&s, 42) == 13); TA_assert(AO_short_fetch_and_add_release(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1_release) TA_assert(AO_short_fetch_and_add1_release(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1_release) TA_assert(AO_short_fetch_and_sub1_release(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store_release) AO_char_store_release(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load_release) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add_release) TA_assert(AO_char_fetch_and_add_release(&b, 42) == 13); TA_assert(AO_char_fetch_and_add_release(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1_release) TA_assert(AO_char_fetch_and_add1_release(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1_release) TA_assert(AO_char_fetch_and_sub1_release(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store_release) AO_int_store_release(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load_release) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add_release) TA_assert(AO_int_fetch_and_add_release(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add_release(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1_release) TA_assert(AO_int_fetch_and_add1_release(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1_release) TA_assert(AO_int_fetch_and_sub1_release(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap_release) TA_assert(!AO_compare_and_swap_release(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap_release(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or_release) AO_or_release(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double_release) TA_assert(!AO_compare_double_and_swap_double_release(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double_release(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double_release(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double_release) TA_assert(!AO_compare_and_swap_double_release(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double_release(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double_release(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: _acquire)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "_acquire") void test_atomic_acquire(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set_acquire) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop_acquire) AO_nop_acquire(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store_acquire) AO_store_acquire(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load_acquire) TA_assert(AO_load_acquire(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set_acquire) assert(AO_test_and_set_acquire(&z) == AO_TS_CLEAR); assert(AO_test_and_set_acquire(&z) == AO_TS_SET); assert(AO_test_and_set_acquire(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add_acquire) TA_assert(AO_fetch_and_add_acquire(&x, 42) == 13); TA_assert(AO_fetch_and_add_acquire(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1_acquire) TA_assert(AO_fetch_and_add1_acquire(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1_acquire) TA_assert(AO_fetch_and_sub1_acquire(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store_acquire) AO_short_store_acquire(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load_acquire) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add_acquire) TA_assert(AO_short_fetch_and_add_acquire(&s, 42) == 13); TA_assert(AO_short_fetch_and_add_acquire(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1_acquire) TA_assert(AO_short_fetch_and_add1_acquire(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1_acquire) TA_assert(AO_short_fetch_and_sub1_acquire(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store_acquire) AO_char_store_acquire(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load_acquire) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add_acquire) TA_assert(AO_char_fetch_and_add_acquire(&b, 42) == 13); TA_assert(AO_char_fetch_and_add_acquire(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1_acquire) TA_assert(AO_char_fetch_and_add1_acquire(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1_acquire) TA_assert(AO_char_fetch_and_sub1_acquire(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store_acquire) AO_int_store_acquire(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load_acquire) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add_acquire) TA_assert(AO_int_fetch_and_add_acquire(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add_acquire(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1_acquire) TA_assert(AO_int_fetch_and_add1_acquire(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1_acquire) TA_assert(AO_int_fetch_and_sub1_acquire(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap_acquire) TA_assert(!AO_compare_and_swap_acquire(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap_acquire(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or_acquire) AO_or_acquire(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double_acquire) TA_assert(!AO_compare_double_and_swap_double_acquire(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double_acquire(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double_acquire(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double_acquire) TA_assert(!AO_compare_and_swap_double_acquire(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double_acquire(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double_acquire(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: _read)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "_read") void test_atomic_read(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set_read) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop_read) AO_nop_read(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store_read) AO_store_read(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load_read) TA_assert(AO_load_read(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set_read) assert(AO_test_and_set_read(&z) == AO_TS_CLEAR); assert(AO_test_and_set_read(&z) == AO_TS_SET); assert(AO_test_and_set_read(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add_read) TA_assert(AO_fetch_and_add_read(&x, 42) == 13); TA_assert(AO_fetch_and_add_read(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1_read) TA_assert(AO_fetch_and_add1_read(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1_read) TA_assert(AO_fetch_and_sub1_read(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store_read) AO_short_store_read(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load_read) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add_read) TA_assert(AO_short_fetch_and_add_read(&s, 42) == 13); TA_assert(AO_short_fetch_and_add_read(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1_read) TA_assert(AO_short_fetch_and_add1_read(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1_read) TA_assert(AO_short_fetch_and_sub1_read(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store_read) AO_char_store_read(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load_read) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add_read) TA_assert(AO_char_fetch_and_add_read(&b, 42) == 13); TA_assert(AO_char_fetch_and_add_read(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1_read) TA_assert(AO_char_fetch_and_add1_read(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1_read) TA_assert(AO_char_fetch_and_sub1_read(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store_read) AO_int_store_read(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load_read) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add_read) TA_assert(AO_int_fetch_and_add_read(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add_read(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1_read) TA_assert(AO_int_fetch_and_add1_read(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1_read) TA_assert(AO_int_fetch_and_sub1_read(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap_read) TA_assert(!AO_compare_and_swap_read(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap_read(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or_read) AO_or_read(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double_read) TA_assert(!AO_compare_double_and_swap_double_read(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double_read(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double_read(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double_read) TA_assert(!AO_compare_and_swap_double_read(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double_read(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double_read(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: _write)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "_write") void test_atomic_write(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set_write) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop_write) AO_nop_write(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store_write) AO_store_write(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load_write) TA_assert(AO_load_write(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set_write) assert(AO_test_and_set_write(&z) == AO_TS_CLEAR); assert(AO_test_and_set_write(&z) == AO_TS_SET); assert(AO_test_and_set_write(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add_write) TA_assert(AO_fetch_and_add_write(&x, 42) == 13); TA_assert(AO_fetch_and_add_write(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1_write) TA_assert(AO_fetch_and_add1_write(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1_write) TA_assert(AO_fetch_and_sub1_write(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store_write) AO_short_store_write(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load_write) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add_write) TA_assert(AO_short_fetch_and_add_write(&s, 42) == 13); TA_assert(AO_short_fetch_and_add_write(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1_write) TA_assert(AO_short_fetch_and_add1_write(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1_write) TA_assert(AO_short_fetch_and_sub1_write(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store_write) AO_char_store_write(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load_write) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add_write) TA_assert(AO_char_fetch_and_add_write(&b, 42) == 13); TA_assert(AO_char_fetch_and_add_write(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1_write) TA_assert(AO_char_fetch_and_add1_write(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1_write) TA_assert(AO_char_fetch_and_sub1_write(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store_write) AO_int_store_write(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load_write) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add_write) TA_assert(AO_int_fetch_and_add_write(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add_write(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1_write) TA_assert(AO_int_fetch_and_add1_write(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1_write) TA_assert(AO_int_fetch_and_sub1_write(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap_write) TA_assert(!AO_compare_and_swap_write(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap_write(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or_write) AO_or_write(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double_write) TA_assert(!AO_compare_double_and_swap_double_write(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double_write(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double_write(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double_write) TA_assert(!AO_compare_and_swap_double_write(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double_write(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double_write(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: _full)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "_full") void test_atomic_full(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set_full) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop_full) AO_nop_full(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store_full) AO_store_full(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load_full) TA_assert(AO_load_full(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set_full) assert(AO_test_and_set_full(&z) == AO_TS_CLEAR); assert(AO_test_and_set_full(&z) == AO_TS_SET); assert(AO_test_and_set_full(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add_full) TA_assert(AO_fetch_and_add_full(&x, 42) == 13); TA_assert(AO_fetch_and_add_full(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1_full) TA_assert(AO_fetch_and_add1_full(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1_full) TA_assert(AO_fetch_and_sub1_full(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store_full) AO_short_store_full(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load_full) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add_full) TA_assert(AO_short_fetch_and_add_full(&s, 42) == 13); TA_assert(AO_short_fetch_and_add_full(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1_full) TA_assert(AO_short_fetch_and_add1_full(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1_full) TA_assert(AO_short_fetch_and_sub1_full(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store_full) AO_char_store_full(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load_full) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add_full) TA_assert(AO_char_fetch_and_add_full(&b, 42) == 13); TA_assert(AO_char_fetch_and_add_full(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1_full) TA_assert(AO_char_fetch_and_add1_full(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1_full) TA_assert(AO_char_fetch_and_sub1_full(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store_full) AO_int_store_full(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load_full) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add_full) TA_assert(AO_int_fetch_and_add_full(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add_full(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1_full) TA_assert(AO_int_fetch_and_add1_full(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1_full) TA_assert(AO_int_fetch_and_sub1_full(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap_full) TA_assert(!AO_compare_and_swap_full(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap_full(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or_full) AO_or_full(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double_full) TA_assert(!AO_compare_double_and_swap_double_full(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double_full(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double_full(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double_full) TA_assert(!AO_compare_and_swap_double_full(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double_full(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double_full(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: _release_write)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "_release_write") void test_atomic_release_write(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set_release_write) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop_release_write) AO_nop_release_write(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store_release_write) AO_store_release_write(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load_release_write) TA_assert(AO_load_release_write(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set_release_write) assert(AO_test_and_set_release_write(&z) == AO_TS_CLEAR); assert(AO_test_and_set_release_write(&z) == AO_TS_SET); assert(AO_test_and_set_release_write(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add_release_write) TA_assert(AO_fetch_and_add_release_write(&x, 42) == 13); TA_assert(AO_fetch_and_add_release_write(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1_release_write) TA_assert(AO_fetch_and_add1_release_write(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1_release_write) TA_assert(AO_fetch_and_sub1_release_write(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store_release_write) AO_short_store_release_write(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load_release_write) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add_release_write) TA_assert(AO_short_fetch_and_add_release_write(&s, 42) == 13); TA_assert(AO_short_fetch_and_add_release_write(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1_release_write) TA_assert(AO_short_fetch_and_add1_release_write(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1_release_write) TA_assert(AO_short_fetch_and_sub1_release_write(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store_release_write) AO_char_store_release_write(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load_release_write) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add_release_write) TA_assert(AO_char_fetch_and_add_release_write(&b, 42) == 13); TA_assert(AO_char_fetch_and_add_release_write(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1_release_write) TA_assert(AO_char_fetch_and_add1_release_write(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1_release_write) TA_assert(AO_char_fetch_and_sub1_release_write(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store_release_write) AO_int_store_release_write(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load_release_write) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add_release_write) TA_assert(AO_int_fetch_and_add_release_write(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add_release_write(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1_release_write) TA_assert(AO_int_fetch_and_add1_release_write(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1_release_write) TA_assert(AO_int_fetch_and_sub1_release_write(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap_release_write) TA_assert(!AO_compare_and_swap_release_write(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap_release_write(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or_release_write) AO_or_release_write(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double_release_write) TA_assert(!AO_compare_double_and_swap_double_release_write(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double_release_write(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double_release_write(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double_release_write) TA_assert(!AO_compare_and_swap_double_release_write(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double_release_write(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double_release_write(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif } /* * Copyright (c) 2003 by Hewlett-Packard Company. All rights reserved. * * This file is covered by the GNU general public license, version 2. * see doc/COPYING for details. */ /* Some basic sanity tests. These do not test the barrier semantics. */ #undef TA_assert #define TA_assert(e) \ if (!(e)) { fprintf(stderr, "Assertion failed %s:%d (barrier: _acquire_read)\n", \ __FILE__, __LINE__), exit(1); } #undef MISSING #define MISSING(name) \ fprintf(stderr, "Missing: %s\n", #name "_acquire_read") void test_atomic_acquire_read(void) { AO_t x; unsigned char b; unsigned short s; unsigned int zz; # if defined(AO_HAVE_test_and_set_acquire_read) AO_TS_t z = AO_TS_INITIALIZER; # endif # if defined(AO_HAVE_double_t) AO_double_t w; w.AO_val1 = 0; w.AO_val2 = 0; # endif # if defined(AO_HAVE_nop_acquire_read) AO_nop_acquire_read(); # else MISSING(AO_nop); # endif # if defined(AO_HAVE_store_acquire_read) AO_store_acquire_read(&x, 13); TA_assert (x == 13); # else MISSING(AO_store); x = 13; # endif # if defined(AO_HAVE_load_acquire_read) TA_assert(AO_load_acquire_read(&x) == 13); # else MISSING(AO_load); # endif # if defined(AO_HAVE_test_and_set_acquire_read) assert(AO_test_and_set_acquire_read(&z) == AO_TS_CLEAR); assert(AO_test_and_set_acquire_read(&z) == AO_TS_SET); assert(AO_test_and_set_acquire_read(&z) == AO_TS_SET); AO_CLEAR(&z); # else MISSING(AO_test_and_set); # endif # if defined(AO_HAVE_fetch_and_add_acquire_read) TA_assert(AO_fetch_and_add_acquire_read(&x, 42) == 13); TA_assert(AO_fetch_and_add_acquire_read(&x, -42) == 55); # else MISSING(AO_fetch_and_add); # endif # if defined(AO_HAVE_fetch_and_add1_acquire_read) TA_assert(AO_fetch_and_add1_acquire_read(&x) == 13); # else MISSING(AO_fetch_and_add1); ++x; # endif # if defined(AO_HAVE_fetch_and_sub1_acquire_read) TA_assert(AO_fetch_and_sub1_acquire_read(&x) == 14); # else MISSING(AO_fetch_and_sub1); --x; # endif # if defined(AO_HAVE_short_store_acquire_read) AO_short_store_acquire_read(&s, 13); # else MISSING(AO_short_store); s = 13; # endif # if defined(AO_HAVE_short_load_acquire_read) TA_assert(AO_short_load(&s) == 13); # else MISSING(AO_short_load); # endif # if defined(AO_HAVE_short_fetch_and_add_acquire_read) TA_assert(AO_short_fetch_and_add_acquire_read(&s, 42) == 13); TA_assert(AO_short_fetch_and_add_acquire_read(&s, -42) == 55); # else MISSING(AO_short_fetch_and_add); # endif # if defined(AO_HAVE_short_fetch_and_add1_acquire_read) TA_assert(AO_short_fetch_and_add1_acquire_read(&s) == 13); # else MISSING(AO_short_fetch_and_add1); ++s; # endif # if defined(AO_HAVE_short_fetch_and_sub1_acquire_read) TA_assert(AO_short_fetch_and_sub1_acquire_read(&s) == 14); # else MISSING(AO_short_fetch_and_sub1); --s; # endif # if defined(AO_HAVE_char_store_acquire_read) AO_char_store_acquire_read(&b, 13); # else MISSING(AO_char_store); b = 13; # endif # if defined(AO_HAVE_char_load_acquire_read) TA_assert(AO_char_load(&b) == 13); # else MISSING(AO_char_load); # endif # if defined(AO_HAVE_char_fetch_and_add_acquire_read) TA_assert(AO_char_fetch_and_add_acquire_read(&b, 42) == 13); TA_assert(AO_char_fetch_and_add_acquire_read(&b, -42) == 55); # else MISSING(AO_char_fetch_and_add); # endif # if defined(AO_HAVE_char_fetch_and_add1_acquire_read) TA_assert(AO_char_fetch_and_add1_acquire_read(&b) == 13); # else MISSING(AO_char_fetch_and_add1); ++b; # endif # if defined(AO_HAVE_char_fetch_and_sub1_acquire_read) TA_assert(AO_char_fetch_and_sub1_acquire_read(&b) == 14); # else MISSING(AO_char_fetch_and_sub1); --b; # endif # if defined(AO_HAVE_int_store_acquire_read) AO_int_store_acquire_read(&zz, 13); # else MISSING(AO_int_store); zz = 13; # endif # if defined(AO_HAVE_int_load_acquire_read) TA_assert(AO_int_load(&zz) == 13); # else MISSING(AO_int_load); # endif # if defined(AO_HAVE_int_fetch_and_add_acquire_read) TA_assert(AO_int_fetch_and_add_acquire_read(&zz, 42) == 13); TA_assert(AO_int_fetch_and_add_acquire_read(&zz, -42) == 55); # else MISSING(AO_int_fetch_and_add); # endif # if defined(AO_HAVE_int_fetch_and_add1_acquire_read) TA_assert(AO_int_fetch_and_add1_acquire_read(&zz) == 13); # else MISSING(AO_int_fetch_and_add1); ++zz; # endif # if defined(AO_HAVE_int_fetch_and_sub1_acquire_read) TA_assert(AO_int_fetch_and_sub1_acquire_read(&zz) == 14); # else MISSING(AO_int_fetch_and_sub1); --zz; # endif # if defined(AO_HAVE_compare_and_swap_acquire_read) TA_assert(!AO_compare_and_swap_acquire_read(&x, 14, 42)); TA_assert(x == 13); TA_assert(AO_compare_and_swap_acquire_read(&x, 13, 42)); TA_assert(x == 42); # else MISSING(AO_compare_and_swap); if (x == 13) x = 42; # endif # if defined(AO_HAVE_or_acquire_read) AO_or_acquire_read(&x, 66); TA_assert(x == 106); # else MISSING(AO_or); x |= 34; # endif # if defined(AO_HAVE_compare_double_and_swap_double_acquire_read) TA_assert(!AO_compare_double_and_swap_double_acquire_read(&w, 17, 42, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_double_and_swap_double_acquire_read(&w, 0, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_double_and_swap_double_acquire_read(&w, 12, 13, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); w.AO_val1 = 0; w.AO_val2 = 0; # else MISSING(AO_compare_double_and_swap_double); # endif # if defined(AO_HAVE_compare_and_swap_double_acquire_read) TA_assert(!AO_compare_and_swap_double_acquire_read(&w, 17, 12, 13)); TA_assert(w.AO_val1 == 0 && w.AO_val2 == 0); TA_assert(AO_compare_and_swap_double_acquire_read(&w, 0, 12, 13)); TA_assert(w.AO_val1 == 12 && w.AO_val2 == 13); TA_assert(AO_compare_and_swap_double_acquire_read(&w, 12, 17, 42)); TA_assert(w.AO_val1 == 17 && w.AO_val2 == 42); # else MISSING(AO_compare_and_swap_double); # endif }