./0000775000175000017500000000000012620326673011444 5ustar nielsenrnielsenr./0018-TI-adc-remove-3_14_24.patch0000664000175000017500000000232412620330463016351 0ustar nielsenrnielsenrFrom 231f04adfc378f8cd4faa69168997380dc69d3fb Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:28:21 +0200 Subject: [PATCH 18/21] TI-adc-remove-3_14_24 --- drivers/mfd/ti_am335x_tscadc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index e87a248..d4e8604 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -54,11 +54,11 @@ void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val) unsigned long flags; spin_lock_irqsave(&tsadc->reg_lock, flags); - tsadc->reg_se_cache |= val; + tsadc->reg_se_cache = val; if (tsadc->adc_waiting) wake_up(&tsadc->reg_se_wait); else if (!tsadc->adc_in_use) - tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); + tscadc_writel(tsadc, REG_SE, val); spin_unlock_irqrestore(&tsadc->reg_lock, flags); } @@ -97,7 +97,6 @@ static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc) void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val) { spin_lock_irq(&tsadc->reg_lock); - tsadc->reg_se_cache |= val; am335x_tscadc_need_adc(tsadc); tscadc_writel(tsadc, REG_SE, val); -- 2.3.5 ./0004-Add-Irda-Support-in-serial.patch0000664000175000017500000000622212620330462017737 0ustar nielsenrnielsenrFrom b48d868add41915951f33c1daa7bd761524e7ddd Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:10:14 +0200 Subject: [PATCH 04/21] Add-Irda-Support-in-serial --- drivers/tty/serial/omap-serial.c | 7 +++++++ include/linux/serial_core.h | 1 + include/uapi/linux/serial_reg.h | 14 ++++++++++++++ 3 files changed, 22 insertions(+) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index f4e68b3..857f116 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -145,6 +145,7 @@ struct uart_omap_port { unsigned char dll; unsigned char dlh; unsigned char mdr1; + unsigned char mdr2; unsigned char scr; unsigned char wer; @@ -1037,6 +1038,12 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, serial_out(up, UART_EFR, up->efr); serial_out(up, UART_LCR, cval); + if (up->port.uartmode == (unsigned int)UART_OMAP_MDR1_SIR_MODE) + { + up->mdr2 = UART_OMAP_MDR2_UARTPULSE; + serial_out(up, UART_OMAP_MDR2, up->mdr2); + } + if (!serial_omap_baud_is_mode16(port, baud)) up->mdr1 = UART_OMAP_MDR1_13X_MODE; else diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index f729be9..07ca067 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -129,6 +129,7 @@ struct uart_port { unsigned int irq; /* irq number */ unsigned long irqflags; /* irq flags */ unsigned int uartclk; /* base uart clock */ + unsigned int uartmode; /* uart mode */ unsigned int fifosize; /* tx fifo size */ unsigned char x_char; /* xon/xoff char */ unsigned char regshift; /* reg offset shift */ diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h index e632260..6cdd968 100644 --- a/include/uapi/linux/serial_reg.h +++ b/include/uapi/linux/serial_reg.h @@ -346,6 +346,8 @@ */ #define UART_OMAP_MDR1 0x08 /* Mode definition register */ #define UART_OMAP_MDR2 0x09 /* Mode definition register 2 */ +#define UART_OMAP_TXFLL 0x0A /* Transmit Frame Length Low Register */ +#define UART_OMAP_ACREG 0x0F /* Auxiliary Control Register */ #define UART_OMAP_SCR 0x10 /* Supplementary control register */ #define UART_OMAP_SSR 0x11 /* Supplementary status register */ #define UART_OMAP_EBLR 0x12 /* BOF length register */ @@ -368,6 +370,11 @@ #define UART_OMAP_MDR1_DISABLE 0x07 /* Disable (default state) */ /* + * These are the definitions for the MDR1 register + */ +#define UART_OMAP_MDR2_UARTPULSE 0x08 /* UART in IrDA Pulsshaping mode */ + +/* * These are definitions for the Exar XR17V35X and XR17(C|D)15X */ #define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */ @@ -385,5 +392,12 @@ #define UART_EXAR_TXTRG 0x0a /* Tx FIFO trigger level write-only */ #define UART_EXAR_RXTRG 0x0b /* Rx FIFO trigger level write-only */ +/* + * These are the definitions for the TXFLL register + */ +#define UART_OMAP_ACREG_PULSETYPE 0x80 /* Set to 1.6 microseconds */ +#define UART_OMAP_ACERG_SD_MODE_LOW 0x40 /* Set SD Pin to low */ +#define UART_OMAP_ACREG_DISTXUNDERRUN 0x10 /* Disable TX underrun */ + #endif /* _LINUX_SERIAL_REG_H */ -- 2.3.5 ./0028-USB-babble-enable-debug3.patch0000664000175000017500000000346412620330464017305 0ustar nielsenrnielsenrFrom 62de876ed5b4384dd2d555d0a70e2df542cc33da Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Mon, 9 Nov 2015 16:42:08 +0100 Subject: [PATCH] USB babble enable debug3 --- drivers/usb/musb/musb_core.c | 3 +-- drivers/usb/musb/musb_dsps.c | 5 ++++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 1ad3687..9034c56 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -1765,9 +1765,8 @@ static void musb_recover_work(struct work_struct *data) struct musb *musb = container_of(data, struct musb, recover_work.work); int status, ret; - dev_dbg(musb->controller, "Try to recover from Babblen"); - ret = musb_platform_reset(musb); + dev_dbg(musb->controller, "Try to recover from Babble: %d" , ret); if (ret) return; diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index e1bcc64..26ba7da 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -619,14 +619,17 @@ static int dsps_musb_reset(struct musb *musb) int session_restart = 0; if (glue->sw_babble_enabled) + { + dev_info(musb->controller, "Restarting MUSB to recover from Babble sw_babble_enabled\n"); session_restart = sw_babble_control(musb); + } /* * In case of new silicon version babble condition can be recovered * without resetting the MUSB. But for older silicon versions, MUSB * reset is needed */ if (session_restart || !glue->sw_babble_enabled) { - dev_info(musb->controller, "Restarting MUSB to recover from Babble\n"); + dev_info(musb->controller, "Restarting MUSB to recover from Babble !sw_babble_enabled\n"); dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset)); usleep_range(100, 200); usb_phy_shutdown(musb->xceiv); -- 2.6.2 ./0006-Init-order-pwm-changed-in-makefile.patch0000664000175000017500000000154712620330463021432 0ustar nielsenrnielsenrFrom d79a15c9660cc699c5a054337f9b41e5eff3647f Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:17:21 +0200 Subject: [PATCH 06/21] Init-order-pwm-changed-in-makefile --- drivers/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/Makefile b/drivers/Makefile index 8e3b8b0..e78a195 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_GENERIC_PHY) += phy/ # GPIO must come after pinctrl as gpios may need to mux pins etc obj-y += pinctrl/ obj-y += gpio/ -obj-y += pwm/ obj-$(CONFIG_PCI) += pci/ obj-$(CONFIG_PARISC) += parisc/ obj-$(CONFIG_RAPIDIO) += rapidio/ @@ -49,6 +48,7 @@ obj-y += char/ # gpu/ comes after char for AGP vs DRM startup obj-y += gpu/ +obj-y += pwm/ obj-$(CONFIG_CONNECTOR) += connector/ -- 2.3.5 ./0029-Remove-debug-from-usb-fix-usb-recover.patch0000664000175000017500000000521712620330464022142 0ustar nielsenrnielsenrFrom 2fa0307783601c8e28a9fe602059f81813bb3970 Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Tue, 10 Nov 2015 09:36:13 +0100 Subject: [PATCH] Remove debug from usb fix usb recover --- drivers/usb/musb/musb_core.c | 10 ++++------ drivers/usb/musb/musb_dsps.c | 8 ++++---- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 9034c56..67b7891 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -89,8 +89,6 @@ * Most of the conditional compilation will (someday) vanish. */ -#define DEBUG 1 - #include #include #include @@ -1763,12 +1761,12 @@ static void musb_irq_work(struct work_struct *data) static void musb_recover_work(struct work_struct *data) { struct musb *musb = container_of(data, struct musb, recover_work.work); - int status, ret; + int status, ret = 1; ret = musb_platform_reset(musb); dev_dbg(musb->controller, "Try to recover from Babble: %d" , ret); - if (ret) - return; + //if (ret) + // return; usb_phy_vbus_off(musb->xceiv); usleep_range(100, 200); @@ -2403,7 +2401,7 @@ static struct platform_driver musb_driver = { }, .probe = musb_probe, .remove = musb_remove, - .shutdown = musb_shutdown, + .shutdown = musb_shutdown }; module_platform_driver(musb_driver); diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index 26ba7da..0555c51 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -29,8 +29,6 @@ * da8xx.c would be merged to this file after testing. */ -#define DEBUG - #include #include #include @@ -618,9 +616,11 @@ static int dsps_musb_reset(struct musb *musb) const struct dsps_musb_wrapper *wrp = glue->wrp; int session_restart = 0; + dev_dbg(musb->controller, "dsps_musb_reset"); + if (glue->sw_babble_enabled) { - dev_info(musb->controller, "Restarting MUSB to recover from Babble sw_babble_enabled\n"); + dev_dbg(musb->controller, "Restarting MUSB to recover from Babble sw_babble_enabled\n"); session_restart = sw_babble_control(musb); } /* @@ -629,7 +629,7 @@ static int dsps_musb_reset(struct musb *musb) * reset is needed */ if (session_restart || !glue->sw_babble_enabled) { - dev_info(musb->controller, "Restarting MUSB to recover from Babble !sw_babble_enabled\n"); + dev_dbg(musb->controller, "Restarting MUSB to recover from Babble !sw_babble_enabled\n"); dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset)); usleep_range(100, 200); usb_phy_shutdown(musb->xceiv); -- 2.6.3 ./0021-Display-Logo-on-start-3.13.35.patch0000664000175000017500000000124512620330463017717 0ustar nielsenrnielsenrFrom bf2f768a2c9a7f0a4ce547870e16e42e4a0ce7a1 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:31:19 +0200 Subject: [PATCH 21/21] Display-Logo-on-start-3.13.35 --- drivers/video/logo/logo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/logo/logo.c b/drivers/video/logo/logo.c index ffe024b..43c8477 100644 --- a/drivers/video/logo/logo.c +++ b/drivers/video/logo/logo.c @@ -44,7 +44,7 @@ const struct linux_logo * __init_refok fb_find_logo(int depth) { const struct linux_logo *logo = NULL; - if (nologo || logos_freed) + if (nologo) return NULL; if (depth >= 1) { -- 2.3.5 ./0016-UART-mode.patch0000664000175000017500000000435612620330463014546 0ustar nielsenrnielsenrFrom f6e80318b0f16d3501b194d449d373e7792b9985 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:26:50 +0200 Subject: [PATCH 16/21] UART-mode --- drivers/tty/serial/omap-serial.c | 11 +++++++++++ include/linux/platform_data/serial-omap.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 857f116..5589f6a 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -20,6 +20,7 @@ * this driver as required for the omap-platform. */ + #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) #define SUPPORT_SYSRQ #endif @@ -149,6 +150,8 @@ struct uart_omap_port { unsigned char scr; unsigned char wer; + unsigned int uartmode; + int use_dma; /* * Some bits in registers are cleared on a read, so they must @@ -1038,6 +1041,9 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, serial_out(up, UART_EFR, up->efr); serial_out(up, UART_LCR, cval); + + + if (up->port.uartmode == (unsigned int)UART_OMAP_MDR1_SIR_MODE) { up->mdr2 = UART_OMAP_MDR2_UARTPULSE; @@ -1597,6 +1603,10 @@ static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) of_property_read_u32(dev->of_node, "clock-frequency", &omap_up_info->uartclk); + + of_property_read_u32(dev->of_node, "uart-mode", + &omap_up_info->uartmode); + return omap_up_info; } @@ -1751,6 +1761,7 @@ static int serial_omap_probe(struct platform_device *pdev) up->port.flags = omap_up_info->flags; up->port.uartclk = omap_up_info->uartclk; + up->port.uartmode = omap_up_info->uartmode; if (!up->port.uartclk) { up->port.uartclk = DEFAULT_CLK_SPEED; dev_warn(&pdev->dev, diff --git a/include/linux/platform_data/serial-omap.h b/include/linux/platform_data/serial-omap.h index c860c1b..b0f91527 100644 --- a/include/linux/platform_data/serial-omap.h +++ b/include/linux/platform_data/serial-omap.h @@ -38,6 +38,7 @@ struct omap_uart_port_info { unsigned int dma_rx_timeout; unsigned int autosuspend_timeout; unsigned int dma_rx_poll_rate; + unsigned int uartmode; int DTR_gpio; int DTR_inverted; int DTR_present; -- 2.3.5 ./0019-Anpassung-ADC-delay-an-Touch.patch0000664000175000017500000000144112620330463020140 0ustar nielsenrnielsenrFrom 447875e91ab79de50252f22ef764a2265cdf671f Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:29:11 +0200 Subject: [PATCH 19/21] Anpassung-ADC-delay-an-Touch --- include/linux/mfd/ti_am335x_tscadc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 18053a6..f751016 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -107,7 +107,7 @@ /* Charge delay */ #define CHARGEDLY_OPEN_MASK (0x3FFFF << 0) #define CHARGEDLY_OPEN(val) ((val) << 0) -#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(4) +#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(16) /* Control register */ #define CNTRLREG_TSCSSENB BIT(0) -- 2.3.5 ./0026-USB-babble-enable-debug-output-part2.patch0000664000175000017500000000425512620330464021603 0ustar nielsenrnielsenrFrom ebb46145abf334d062912ee72d1fc8785e72ab0a Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Mon, 9 Nov 2015 15:06:21 +0100 Subject: [PATCH] USB babble enable debug output part2 --- drivers/usb/musb/musb_core.c | 2 ++ drivers/usb/musb/musb_dsps.c | 9 +++++++++ drivers/usb/musb/musb_regs.h | 4 ++-- 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index be76a72..9207893 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -89,6 +89,8 @@ * Most of the conditional compilation will (someday) vanish. */ +#define DEBUG + #include #include #include diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index 54ba216..e1bcc64 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -343,6 +343,8 @@ static irqreturn_t dsps_interrupt(int irq, void *hci) * Hand this error down to the musb core isr, so it can * recover. */ + + musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT; musb->int_tx = musb->int_rx = 0; } @@ -480,10 +482,17 @@ static int dsps_musb_init(struct musb *musb) */ val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL); if (val == MUSB_BABBLE_RCV_DISABLE) { + dev_dbg(musb->controller, "Babble enable %02x\n", val); glue->sw_babble_enabled = true; val |= MUSB_BABBLE_SW_SESSION_CTRL; dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val); } + else + { + dev_dbg(musb->controller, "Babble disable %02x\n", val); + glue->sw_babble_enabled = true; + } + ret = dsps_musb_dbg_init(musb, glue); if (ret) diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h index b9bcda5..dfdbf339 100644 --- a/drivers/usb/musb/musb_regs.h +++ b/drivers/usb/musb/musb_regs.h @@ -251,8 +251,8 @@ * Additional Control Registers */ -#define MUSB_DEVCTL 0x60 /* 8 bit */ -#define MUSB_BABBLE_CTL 0x61 /* 8 bit */ +#define MUSB_DEVCTL 0x60 /* 8 bit */ +#define MUSB_BABBLE_CTL 0x61 /* 8 bit */ /* These are always controlled through the INDEX register */ #define MUSB_TXFIFOSZ 0x62 /* 8-bit (see masks) */ -- 2.6.2 ./0010-Sound-and-WLAN.patch0000664000175000017500000001457112620330463015432 0ustar nielsenrnielsenrFrom ef29688cf1443776aea36056f71253f611f8d1f6 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:23:13 +0200 Subject: [PATCH 10/21] Sound-and-WLAN --- arch/arm/boot/dts/am335x-bone-common.dtsi | 19 ++++++------ include/linux/mfd/ti_am335x_tscadc.h | 5 ++- sound/soc/davinci/davinci-mcasp.c | 51 +++++++++++++++++++++++++------ 3 files changed, 53 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index bbd23f5..adcdb2b 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -230,15 +230,15 @@ >; }; - ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 { - pinctrl-single,pins = < - 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */ - >; - }; +// ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 { +// pinctrl-single,pins = < +// 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */ +// >; +// }; gpio0_helper_pins: pinmux_gpio0_helper_pins { pinctrl-single,pins = < -// 0x164 (PIN_OUTPUT | MUX_MODE7) /* USR15 WLAN_Reset, ecap0_in_pwm0_out.gpio0_7 | MODE7 | OUTPUT */ + 0x164 (PIN_OUTPUT | MUX_MODE7) /* USR15 WLAN_Reset, ecap0_in_pwm0_out.gpio0_7 | MODE7 | OUTPUT */ 0x020 (PIN_OUTPUT | MUX_MODE7) /* USR5 VinEnable_ISIS gpmc_ad8.gpio0_22 | MODE7 | OUTPUT */ 0x028 (PIN_OUTPUT | MUX_MODE7) /* ISIS_Start, gpmc_ad10.gpio0_26 | MODE7 | OUTPUT */ // 0x02c (PIN_OUTPUT | MUX_MODE7) /* WLAN_VCC_En, gpmc_ad11.gpio0_27 | MODE7 | OUTPUT */ @@ -410,8 +410,8 @@ }; &epwmss0 { - pinctrl-names = "default"; - pinctrl-0 = <&ecap0_pin_p9_42>; +// pinctrl-names = "default"; +// pinctrl-0 = <&ecap0_pin_p9_42>; status = "okay"; ecap@48300100 { @@ -535,7 +535,7 @@ duty = <0>; status = "okay"; }; - +/* pwm_test_P9_42 { compatible = "pwm_test"; pwms = <&ecap0 0 500000 1>; @@ -546,5 +546,6 @@ duty = <0>; status = "okay"; }; +*/ }; }; diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 48bf6dc..86e0b83 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -86,11 +86,10 @@ /* Delay register */ #define STEPDELAY_OPEN_MASK (0x3FFFF << 0) #define STEPDELAY_OPEN(val) ((val) << 0) -//#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) #define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) #define STEPDELAY_SAMPLE_MASK (0xFF << 24) #define STEPDELAY_SAMPLE(val) ((val) << 24) -#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(2) +#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(0) /* Charge Config */ #define STEPCHARGE_RFP_MASK (7 << 12) @@ -108,7 +107,7 @@ /* Charge delay */ #define CHARGEDLY_OPEN_MASK (0x3FFFF << 0) #define CHARGEDLY_OPEN(val) ((val) << 0) -#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(2) +#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(8) /* Control register */ #define CNTRLREG_TSCSSENB BIT(0) diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 7984a46..681a72b 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -35,6 +36,8 @@ #include "davinci-pcm.h" #include "davinci-mcasp.h" +#define ENABLE_EXT_CLK 115 + /* * McASP register definitions */ @@ -366,7 +369,10 @@ static void mcasp_start_tx(struct davinci_audio_dev *dev) u8 offset = 0, i; u32 cnt; - mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); + if (gpio_is_valid(ENABLE_EXT_CLK)) + { + gpio_set_value(ENABLE_EXT_CLK, 1); + } mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR); @@ -440,7 +446,10 @@ static void mcasp_stop_tx(struct davinci_audio_dev *dev) { mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, 0); mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); - mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); + if (gpio_is_valid(ENABLE_EXT_CLK)) + { + gpio_set_value(ENABLE_EXT_CLK, 0); + } } static void davinci_mcasp_stop(struct davinci_audio_dev *dev, int stream) @@ -501,16 +510,18 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { case SND_SOC_DAIFMT_CBS_CFS: /* codec is clock and frame slave */ - mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | ACLKXDIV(7)); - mcasp_set_bits(base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(0)); - mcasp_clr_bits(base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); - mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); + /* Disable external Takt */ - mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); - mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); + mcasp_clr_bits(base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); + + mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); - mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, ACLKX | AFSX); - mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, AHCLKX); + mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); + + mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR); + mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, AFSX | AFSR); break; case SND_SOC_DAIFMT_CBM_CFS: /* codec is clock master and frame slave */ @@ -1276,6 +1287,25 @@ static int davinci_mcasp_probe(struct platform_device *pdev) goto err_unregister_component; } + printk("Sound Enable probe\n"); + + if (gpio_is_valid(ENABLE_EXT_CLK)) + { + printk("Sound Enable is valid\n"); + if (gpio_request_one(ENABLE_EXT_CLK, GPIOF_DIR_OUT + GPIOF_INIT_LOW, "Sound Enable")) + { + printk("Sound Enable request error\n"); + } + else + { + printk("Sound Enable request ok\n"); + } + } + else + { + printk("Sound Enable not valid\n"); + } + return 0; err_unregister_component: @@ -1288,6 +1318,7 @@ err_release_clk: static int davinci_mcasp_remove(struct platform_device *pdev) { + gpio_free(ENABLE_EXT_CLK); snd_soc_unregister_component(&pdev->dev); davinci_soc_platform_unregister(&pdev->dev); -- 2.3.5 ./0009-ADC-Clock-rate-changed.patch0000664000175000017500000001121412620330463017002 0ustar nielsenrnielsenrFrom 2fb013a2829467b49c97cc970ba8a185708bfb83 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:21:39 +0200 Subject: [PATCH 09/21] ADC-Clock-rate-changed --- arch/arm/boot/dts/am335x-bone-common.dtsi | 4 ++- arch/arm/boot/dts/am335x-evm.dts | 41 ------------------------------- build_modules.sh | 6 ++++- include/linux/mfd/ti_am335x_tscadc.h | 7 +++--- 4 files changed, 12 insertions(+), 46 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 749ca2f..bbd23f5 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -184,6 +184,8 @@ 0x198 0x00 /* mcasp0_ahclkr0, */ 0x194 0x10 /* mcasp0_fsx, MODE0 | OUTPUT */ 0x190 0x00 /* mcasp0_aclkr.mcasp0_aclkx, MODE0 | OUTPUT_PULLDOWN */ + 0x1ac 0x30 /* mcasp0_ahclkx, MODE0 | INPUT */ + 0x1A4 0x17 /* mcasp0_fsr, MODE7 | OUTPUT */ >; }; @@ -273,7 +275,7 @@ gpio3_helper_pins: pinmux_gpio3_helper_pins { pinctrl-single,pins = < 0x1A0 (PIN_INPUT | MUX_MODE7) /* USR13 ReedContact, mcasp0_aclkr.gpio3_18 | MODE7 | INPUT */ - 0x1A4 (PIN_OUTPUT | MUX_MODE7) /* mcasp0_fsr Sound_En, mcasp0_fsr.gpio3_19 | MODE7 | OUTPUT */ +// 0x1A4 (PIN_OUTPUT | MUX_MODE7) /* mcasp0_fsr Sound_En, mcasp0_fsr.gpio3_19 | MODE7 | OUTPUT */ 0x1A8 (PIN_INPUT | MUX_MODE7) /* USR7 WPC_LED_A, mcasp0_axr1.gpio3_20 | MODE7 | INPUT */ // 0x1Ac (PIN_INPUT | MUX_MODE7) /* mcasp0_ahclkx In 24.576MHz, mcasp0_ahclkx.gpio3_23 | MODE7 | INPUT */ >; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 801055a..0c54214 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -38,47 +38,6 @@ regulator-boot-on; }; - matrix_keypad: matrix_keypad@0 { - compatible = "gpio-matrix-keypad"; - debounce-delay-ms = <5>; - col-scan-delay-us = <2>; - - row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */ - &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */ - &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */ - - col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */ - &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */ - - linux,keymap = <0x0000008b /* MENU */ - 0x0100009e /* BACK */ - 0x02000069 /* LEFT */ - 0x0001006a /* RIGHT */ - 0x0101001c /* ENTER */ - 0x0201006c>; /* DOWN */ - }; - - gpio_keys: volume_keys@0 { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - autorepeat; - - switch@9 { - label = "volume-up"; - linux,code = <115>; - gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; - gpio-key,wakeup; - }; - - switch@10 { - label = "volume-down"; - linux,code = <114>; - gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; - gpio-key,wakeup; - }; - }; - backlight { compatible = "pwm-backlight"; pwms = <&ecap0 0 50000 0>; diff --git a/build_modules.sh b/build_modules.sh index 34e8b15..2db6aba 100755 --- a/build_modules.sh +++ b/build_modules.sh @@ -17,7 +17,11 @@ make -s ARCH=arm CROSS_COMPILE=${CC} firmware_install INSTALL_FW_PATH=./deploy find ./arch/arm/boot/ -iname "am335x-boneblack.dtb" -exec cp -v '{}' ./deploy/ \; - cat include/generated/utsrelease.h | awk '{print $3}' | sed 's/\"//g' +kernel_version="3.14.17" + +rm -r ./deploy/lib/modules/$kernel_version/build +rm -r ./deploy/lib/modules/$kernel_version/source + set +e diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index fb96c84..48bf6dc 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -86,10 +86,11 @@ /* Delay register */ #define STEPDELAY_OPEN_MASK (0x3FFFF << 0) #define STEPDELAY_OPEN(val) ((val) << 0) +//#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) #define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) #define STEPDELAY_SAMPLE_MASK (0xFF << 24) #define STEPDELAY_SAMPLE(val) ((val) << 24) -#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(0) +#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(2) /* Charge Config */ #define STEPCHARGE_RFP_MASK (7 << 12) @@ -107,7 +108,7 @@ /* Charge delay */ #define CHARGEDLY_OPEN_MASK (0x3FFFF << 0) #define CHARGEDLY_OPEN(val) ((val) << 0) -#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(1) +#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(2) /* Control register */ #define CNTRLREG_TSCSSENB BIT(0) @@ -128,7 +129,7 @@ /* Sequencer Status */ #define SEQ_STATUS BIT(5) -#define ADC_CLK 3000000 +#define ADC_CLK 1000000 // 3000000 #define TOTAL_STEPS 16 #define TOTAL_CHANNELS 8 #define FIFO1_THRESHOLD 19 -- 2.3.5 ./0003-Add-seca-board-dts-changes.patch0000664000175000017500000003105512620330462017724 0ustar nielsenrnielsenrFrom 9390b613d54e948eb3b37be4f68f778bf9c525b1 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:09:29 +0200 Subject: [PATCH 03/21] Add-seca-board-dts-changes --- arch/arm/boot/dts/am335x-bone-common.dtsi | 112 +++++++++++++++++------------- arch/arm/boot/dts/am335x-boneblack.dts | 107 ++++++++++++++++++++++++---- arch/arm/boot/dts/am33xx.dtsi | 28 ++++++-- 3 files changed, 180 insertions(+), 67 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 3d4bdf1..a5272ee 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -105,24 +105,11 @@ >; }; - uart2_pins: pinmux_uart2_pins { - pinctrl-single,pins = < - 0x150 0x21 /* spi0_sclk.uart2_rxd | MODE1 */ - 0x154 0x01 /* spi0_d0.uart2_txd | MODE1 */ - >; - }; uart4_pins: pinmux_uart4_pins { pinctrl-single,pins = < - 0x070 0x26 /* gpmc_wait0.uart4_rxd | MODE6 */ - 0x074 0x06 /* gpmc_wpn.uart4_txd | MODE6 */ - >; - }; - - uart5_pins: pinmux_uart5_pins { - pinctrl-single,pins = < - 0x0C4 0x24 /* lcd_data9.uart5_rxd | MODE4 */ - 0x0C0 0x04 /* lcd_data8.uart5_txd | MODE4 */ + 0x070 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart4_rxd.uart4_rxd */ + 0x074 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart4_txd.uart4_txd */ >; }; @@ -192,6 +179,14 @@ >; }; + seca_audio_pins: seca_audio_pins { + pinctrl-single,pins = < + 0x198 0x00 /* mcasp0_ahclkr0, */ + 0x194 0x10 /* mcasp0_fsx, MODE0 | OUTPUT */ + 0x190 0x00 /* mcasp0_aclkr.mcasp0_aclkx, MODE0 | OUTPUT_PULLDOWN */ + >; + }; + emmc_pins: pinmux_emmc_pins { pinctrl-single,pins = < 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ @@ -206,6 +201,17 @@ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ >; }; + + wifi_pins: pinmux_wifi_pins { + pinctrl-single,pins = < + 0x8C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */ + 0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ + 0x30 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ + 0x34 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ + 0x38 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ + 0x3C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ + >; + }; spi0_pins: pinmux_spi0_pins { pinctrl-single,pins = < @@ -216,12 +222,6 @@ >; }; - ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 { - pinctrl-single,pins = < - 0x048 0x6 /* P9_14 (ZCZ ball U14) | MODE 6 */ - >; - }; - ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 { pinctrl-single,pins = < 0x04c 0x6 /* P9_16 (ZCZ ball T14) | MODE 6 */ @@ -233,6 +233,39 @@ 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */ >; }; + + wpc_accu_helper_pins1: pinmux_wpc_accu_helper_pins1 { + pinctrl-single,pins = < + 0x06C (PIN_INPUT | MUX_MODE7) /* USR10 WPC_LEDA, gpmc_a11.gpio1_27 | MODE7 | INPUT */ + 0x064 (PIN_INPUT | MUX_MODE7) /* USR9 WPC_LEDB, gpmc_a09.gpio1_25 | MODE7 | INPUT */ + 0x078 (PIN_INPUT | MUX_MODE7) /* USR8 Netzteil, gpmc_be1n.gpio1_28 | MODE7 | INPUT */ + 0x07c (PIN_INPUT_PULLUP | MUX_MODE7) /* USR6 Reed Kontakt, gpmc_csn3.gpio1_29 | MODE7 | INPUT | PULLUP */ + >; + }; + + wpc_accu_helper_pins2: pinmux_wpc_accu_helper_pins2 { + pinctrl-single,pins = < + 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* wlan_vcc_enable, GPIO0_27 | MODE7 | OUTPUT | PULLUP */ + 0x09C (PIN_OUTPUT | MUX_MODE7) /* Timer5 Power Off, gpmc_be0n| MODE7 | OUTPUT */ + 0x094 (PIN_OUTPUT | MUX_MODE7) /* Timer7 9V ISIS, gpmc_oen_ren.gpio2_3| MODE7 | OUTPUT */ + 0x090 (PIN_INPUT | MUX_MODE7) /* Timer4 On/Off-State, gpmc_advn.gpio2_2 | MODE7 | Input */ + 0x0E4 (PIN_OUTPUT | MUX_MODE7) /* USR2 Enable_WPC, lcd_hsync.gpio2_23 | MODE7 | OUTPUT */ + 0x0E0 (PIN_INPUT | MUX_MODE7) /* USR11 Status_Charger, lcd_vsync.gpio2_22 | MODE7 | INPUT | PULLUP */ + >; + + }; +}; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&wpc_accu_helper_pins1>; + status = "okay"; +}; + +&gpio2 { + pinctrl-names = "default"; + pinctrl-0 = <&wpc_accu_helper_pins2>; + status = "okay"; }; &uart0 { @@ -249,6 +282,13 @@ status = "okay"; }; +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins>; + + status = "okay"; +}; + &usb { status = "okay"; @@ -262,6 +302,7 @@ usb-phy@47401b00 { status = "okay"; + dr_mode = "host"; }; usb@47401000 { @@ -284,7 +325,7 @@ pinctrl-0 = <&i2c0_pins>; status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; tps: tps@24 { reg = <0x24>; @@ -337,7 +378,6 @@ &epwmss1 { pinctrl-names = "default"; pinctrl-0 = < - &ehrpwm1_pin_p9_14 &ehrpwm1_pin_p9_16 >; @@ -356,22 +396,9 @@ spidev0: spi@0 { compatible = "spidev"; reg = <0>; - spi-max-frequency = <16000000>; + spi-max-frequency = <1000000>; spi-cpha; }; - - spidev1: spi@1 { - compatible = "spidev"; - reg = <1>; - spi-max-frequency = <16000000>; - }; -}; - -&tscadc { - status = "okay"; - adc { - ti,adc-channels = <4 5 6>; - }; }; /include/ "tps65217.dtsi" @@ -454,17 +481,6 @@ ocp { //FIXME: these pwm's still need work, this guild isn't working.. //http://elinux.org/EBC_Exercise_13_Pulse_Width_Modulation - pwm_test_P9_14@0 { - compatible = "pwm_test"; - pwms = <&ehrpwm1 0 500000 1>; - pwm-names = "PWM_P9_14"; - pinctrl-names = "default"; - pinctrl-0 = <&ehrpwm1_pin_p9_14>; - enabled = <1>; - duty = <0>; - status = "okay"; - }; - pwm_test_P9_16@0 { compatible = "pwm_test"; pwms = <&ehrpwm1 0 500000 1>; diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index f213ccd..81d4e99 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -29,8 +29,16 @@ ti,vcc-aux-disable-is-sleep; }; +&mmc3 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_pins>; + bus-width = <4>; + status = "okay"; +}; + &am33xx_pinmux { - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { + seca_lcd7_pins: seca_lcd7_pins { pinctrl-single,pins = < 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ @@ -49,23 +57,53 @@ 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >; }; - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { + + seca_lcd7_off_pins: seca_lcd7_off_pins { pinctrl-single,pins = < 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ >; }; + + pwm_bl_pins: pwm_bl_pins { + pinctrl-single,pins = < + 0x48 0x06 /* gpmc_a2.ehrpwm1a, OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT */ + >; + }; +}; + +&tscadc { + status = "okay"; }; &lcdc { status = "okay"; }; +&hdmi_audio { + status = "okay"; +}; + +&mcasp0 { + pinctrl-names = "default"; + pinctrl-0 = <&seca_audio_pins>; + status = "okay"; + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 0 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt = <1>; + rx-num-evt = <1>; + }; + + / { cpus { cpu@0 { @@ -84,26 +122,67 @@ >; }; }; - - hdmi { - compatible = "ti,tilcdc,slave"; - i2c = <&i2c0>; - pinctrl-names = "default", "off"; - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; + + panel { + compatible = "ti,tilcdc,panel"; + pinctrl-names = "default"; + pinctrl-0 = <&seca_lcd7_pins>; status = "okay"; - + panel-info { bpp = <16>; ac-bias = <255>; ac-bias-intrpt = <0>; dma-burst-sz = <16>; fdd = <16>; - sync-edge = <1>; + tft-alt-mode = <0>; + stn-565-mode = <0>; + mono-8bit-mode = <0>; + sync-edge = <0>; sync-ctrl = <1>; raster-order = <0>; fifo-th = <0>; - invert-pxl-clk; + /* Working with "normal" Pixel Clk Data output works on LVDS and TTL Display from Ampire = output on rising edge */ + /* invert-pxl-clk; */ + }; + display-timings { + native-mode = <&timing0>; + timing0: 800x480 { + hactive = <800>; + vactive = <480>; + hback-porch = <40>; + hfront-porch = <40>; + hsync-len = <48>; + vback-porch = <30>; + vfront-porch = <13>; + vsync-len = <3>; + clock-frequency = <30000000>; + hsync-active = <0>; + vsync-active = <0>; + }; }; }; + + backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_bl_pins>; + status = "okay"; + + pwms = <&ehrpwm1 0 500000 0>; + pwm-names = "LCD7"; + brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>; + /* Startup brightness level to 99% */ + default-brightness-level = <99>; /* index to the array above */ + }; + + sound { + compatible = "ti,am33xx-beaglebone-black-audio"; + ti,model = "AM335x-EVM"; + ti,audio-codec = <&hdmi_audio>; + ti,mcasp-controller = <&mcasp0>; + ti,codec-clock-rate = <24576000>; + ti,audio-routing = + "HDMI Out", "TX"; + }; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 37e89dd..da5c304 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -139,7 +139,7 @@ compatible = "ti,edma3"; ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; reg = <0x49000000 0x10000>, - <0x44e10f90 0x40>; + <0x44e10f90 0x10>; interrupts = <12 13 14>; #dma-cells = <1>; dma-channels = <64>; @@ -195,6 +195,7 @@ compatible = "ti,omap3-uart"; ti,hwmods = "uart1"; clock-frequency = <48000000>; + uart-mode = <0>; reg = <0x44e09000 0x2000>; interrupts = <72>; status = "disabled"; @@ -204,6 +205,7 @@ compatible = "ti,omap3-uart"; ti,hwmods = "uart2"; clock-frequency = <48000000>; + uart-mode = <0>; reg = <0x48022000 0x2000>; interrupts = <73>; status = "disabled"; @@ -213,6 +215,7 @@ compatible = "ti,omap3-uart"; ti,hwmods = "uart3"; clock-frequency = <48000000>; + uart-mode = <0>; reg = <0x48024000 0x2000>; interrupts = <74>; status = "disabled"; @@ -222,6 +225,7 @@ compatible = "ti,omap3-uart"; ti,hwmods = "uart4"; clock-frequency = <48000000>; + uart-mode = <0>; reg = <0x481a6000 0x2000>; interrupts = <44>; status = "disabled"; @@ -231,6 +235,7 @@ compatible = "ti,omap3-uart"; ti,hwmods = "uart5"; clock-frequency = <48000000>; + uart-mode = <1>; reg = <0x481a8000 0x2000>; interrupts = <45>; status = "disabled"; @@ -240,6 +245,7 @@ compatible = "ti,omap3-uart"; ti,hwmods = "uart6"; clock-frequency = <48000000>; + uart-mode = <0>; reg = <0x481aa000 0x2000>; interrupts = <46>; status = "disabled"; @@ -399,7 +405,7 @@ }; rtc@44e3e000 { - compatible = "ti,da830-rtc"; + compatible = "ti,am3352-rtc"; reg = <0x44e3e000 0x1000>; interrupts = <75 76>; @@ -744,10 +750,16 @@ tsc { compatible = "ti,am3359-tsc"; + ti,wires = <4>; + ti,x-plate-resistance = <200>; + ti,coordinate-readouts = <5>; + ti,wire-config = <0x00 0x11 0x22 0x33>; }; + am335x_adc: adc { - #io-channel-cells = <1>; + #io-channel-cells = <4>; compatible = "ti,am3359-adc"; + ti,adc-channels = <4 5 6 7>; }; }; @@ -782,7 +794,13 @@ <&edma 5>; dma-names = "tx", "rx"; }; - + + hdmi_audio: hdmi_audio@1c { + compatible = "linux,hdmi-audio"; + status = "disabled"; + }; + + mcasp0: mcasp@48038000 { compatible = "ti,am33xx-mcasp-audio"; ti,hwmods = "mcasp0"; @@ -818,7 +836,7 @@ interrupts = <111>; }; - sgx@0x56000000 { + sgx@56000000 { compatible = "ti,sgx"; ti,hwmods = "gfx"; reg = <0x56000000 0x1000000>; -- 2.3.5 ./0008-Pins-for-new-board.patch0000664000175000017500000001233512620330463016417 0ustar nielsenrnielsenrFrom 51906aa4b24acdc0f98a4d921e313d48e0981a06 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:20:59 +0200 Subject: [PATCH 08/21] Pins-for-new-board --- arch/arm/boot/dts/am335x-bone-common.dtsi | 80 +++++++++++++++++++++++-------- 1 file changed, 61 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index a5272ee..749ca2f 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -233,38 +233,75 @@ 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */ >; }; - - wpc_accu_helper_pins1: pinmux_wpc_accu_helper_pins1 { - pinctrl-single,pins = < - 0x06C (PIN_INPUT | MUX_MODE7) /* USR10 WPC_LEDA, gpmc_a11.gpio1_27 | MODE7 | INPUT */ - 0x064 (PIN_INPUT | MUX_MODE7) /* USR9 WPC_LEDB, gpmc_a09.gpio1_25 | MODE7 | INPUT */ - 0x078 (PIN_INPUT | MUX_MODE7) /* USR8 Netzteil, gpmc_be1n.gpio1_28 | MODE7 | INPUT */ - 0x07c (PIN_INPUT_PULLUP | MUX_MODE7) /* USR6 Reed Kontakt, gpmc_csn3.gpio1_29 | MODE7 | INPUT | PULLUP */ + + gpio0_helper_pins: pinmux_gpio0_helper_pins { + pinctrl-single,pins = < +// 0x164 (PIN_OUTPUT | MUX_MODE7) /* USR15 WLAN_Reset, ecap0_in_pwm0_out.gpio0_7 | MODE7 | OUTPUT */ + 0x020 (PIN_OUTPUT | MUX_MODE7) /* USR5 VinEnable_ISIS gpmc_ad8.gpio0_22 | MODE7 | OUTPUT */ + 0x028 (PIN_OUTPUT | MUX_MODE7) /* ISIS_Start, gpmc_ad10.gpio0_26 | MODE7 | OUTPUT */ +// 0x02c (PIN_OUTPUT | MUX_MODE7) /* WLAN_VCC_En, gpmc_ad11.gpio0_27 | MODE7 | OUTPUT */ + >; + }; + + gpio1_helper_pins: pinmux_gpio1_helper_pins { + pinctrl-single,pins = < + 0x168 (PIN_OUTPUT | MUX_MODE7) /* TP25 LED_G, uart0_ctsn.gpio1_8 | MODE7 | OUTPUT */ + 0x16c (PIN_OUTPUT | MUX_MODE7) /* TP26 LED_Y, uart0_rtsn.gpio1_9 | MODE7 | OUTPUT */ + 0x040 (PIN_OUTPUT | MUX_MODE7) /* USR4 EN_NTC, gpmc_a0.gpio1_16 | MODE7 | OUTPUT */ + 0x044 (PIN_OUTPUT | MUX_MODE7) /* SMF_On, gpmc_a1.gpio1_17 | MODE7 | OUTPUT */ +// 0x04c (PIN_INPUT | MUX_MODE7) /* USR14 Reserve, gpmc_a3.gpio1_19 | MODE7 | INPUT */ + 0x064 (PIN_OUTPUT | MUX_MODE7) /* USR9 En_WPC, gpmc_a09.gpio1_25 | MODE7 | OUTPUT */ + 0x06C (PIN_OUTPUT | MUX_MODE7) /* USR10 En_Charger, gpmc_a11.gpio1_27 | MODE7 | OUTPUT */ + 0x078 (PIN_INPUT | MUX_MODE7) /* USR8 WPC_LED_B, gpmc_be1n.gpio1_28 | MODE7 | INPUT */ + 0x07c (PIN_OUTPUT | MUX_MODE7) /* USR6 IR_PD, gpmc_csn0.gpio1_29 | MODE7 | OUTPUT */ + >; + }; + + gpio2_helper_pins: pinmux_gpio2_helper_pins { + pinctrl-single,pins = < + + 0x090 (PIN_INPUT | MUX_MODE7) /* USR17 OnOff_State, gpmc_advn_ale.gpio2_2 | MODE7 | INPUT */ + 0x094 (PIN_OUTPUT | MUX_MODE7) /* USR18 nEn_WPC, gpmc_oen_ren.gpio2_3 | MODE7 | OUTPUT */ + 0x098 (PIN_INPUT | MUX_MODE7) /* USR19 Status_Charger gpmc_wen.gpio2_4 | MODE7 | INPUT */ + 0x09c (PIN_INPUT | MUX_MODE7) /* USR16 PowerSupply, gpmc_ben0_cle.gpio2_5 | MODE7 | INPUT */ + 0x0E0 (PIN_INPUT | MUX_MODE7) /* USR11 OnOff_Switch, lcd_vsync.gpio2_22 | MODE7 | INPUT */ + 0x0E4 (PIN_OUTPUT | MUX_MODE7) /* USR12 OnOff_Clear, lcd_hsync.gpio2_23 | MODE7 | OUTPUT */ >; }; - wpc_accu_helper_pins2: pinmux_wpc_accu_helper_pins2 { - pinctrl-single,pins = < - 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* wlan_vcc_enable, GPIO0_27 | MODE7 | OUTPUT | PULLUP */ - 0x09C (PIN_OUTPUT | MUX_MODE7) /* Timer5 Power Off, gpmc_be0n| MODE7 | OUTPUT */ - 0x094 (PIN_OUTPUT | MUX_MODE7) /* Timer7 9V ISIS, gpmc_oen_ren.gpio2_3| MODE7 | OUTPUT */ - 0x090 (PIN_INPUT | MUX_MODE7) /* Timer4 On/Off-State, gpmc_advn.gpio2_2 | MODE7 | Input */ - 0x0E4 (PIN_OUTPUT | MUX_MODE7) /* USR2 Enable_WPC, lcd_hsync.gpio2_23 | MODE7 | OUTPUT */ - 0x0E0 (PIN_INPUT | MUX_MODE7) /* USR11 Status_Charger, lcd_vsync.gpio2_22 | MODE7 | INPUT | PULLUP */ + + gpio3_helper_pins: pinmux_gpio3_helper_pins { + pinctrl-single,pins = < + 0x1A0 (PIN_INPUT | MUX_MODE7) /* USR13 ReedContact, mcasp0_aclkr.gpio3_18 | MODE7 | INPUT */ + 0x1A4 (PIN_OUTPUT | MUX_MODE7) /* mcasp0_fsr Sound_En, mcasp0_fsr.gpio3_19 | MODE7 | OUTPUT */ + 0x1A8 (PIN_INPUT | MUX_MODE7) /* USR7 WPC_LED_A, mcasp0_axr1.gpio3_20 | MODE7 | INPUT */ +// 0x1Ac (PIN_INPUT | MUX_MODE7) /* mcasp0_ahclkx In 24.576MHz, mcasp0_ahclkx.gpio3_23 | MODE7 | INPUT */ >; - - }; + }; +}; + + +&gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio0_helper_pins>; + status = "okay"; }; &gpio1 { pinctrl-names = "default"; - pinctrl-0 = <&wpc_accu_helper_pins1>; + pinctrl-0 = <&gpio1_helper_pins>; status = "okay"; }; &gpio2 { pinctrl-names = "default"; - pinctrl-0 = <&wpc_accu_helper_pins2>; + pinctrl-0 = <&gpio2_helper_pins>; + status = "okay"; +}; + +&gpio3 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio3_helper_pins>; status = "okay"; }; @@ -335,6 +372,11 @@ compatible = "at,24c256"; reg = <0x50>; }; + + rtc: rtc@6f { + compatible = "microchip,mcp7941x"; + reg = <0x6f>; + }; }; &i2c2 { -- 2.3.5 ./0011-WLAN-enabled.patch0000664000175000017500000000146412620330463015172 0ustar nielsenrnielsenrFrom e2dc89834a47d2ad22b458d7f0d570fcfde655ac Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:23:58 +0200 Subject: [PATCH 11/21] WLAN-enabled --- arch/arm/boot/dts/am335x-bone-common.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index adcdb2b..129579e 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -517,8 +517,8 @@ bus-width = <0x4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; - cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; - cd-inverted; +// cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; // Removed for WLAN to work +// cd-inverted; // Removed for WLAN to work }; / { -- 2.3.5 ./0020-Anpassung-USB-fuer-3.13.35.patch0000664000175000017500000000136512620330463017176 0ustar nielsenrnielsenrFrom 027f11cb24757f9256364a73e76bfd329b1e0994 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:30:25 +0200 Subject: [PATCH 20/21] Anpassung-ADC-delay-an-Touch --- arch/arm/boot/dts/am335x-bone-common.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 3403dfe..f109082 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -341,12 +341,11 @@ usb-phy@47401b00 { status = "okay"; - dr_mode = "host"; }; usb@47401000 { status = "okay"; - dr_mode = "peripheral"; + dr_mode = "host"; }; usb@47401800 { -- 2.3.5 ./0023-Add-babble-ctrl-from-beaglebone-usb.patch0000664000175000017500000003507112620330464021516 0ustar nielsenrnielsenrFrom 77e5ec490deaf887cc9a10995d3b9232211cc0f3 Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Mon, 9 Nov 2015 13:45:21 +0100 Subject: [PATCH] Add babble ctrl from beaglebone usb --- drivers/usb/musb/musb_core.c | 71 +++++++++++++++++- drivers/usb/musb/musb_core.h | 12 +++ drivers/usb/musb/musb_dsps.c | 169 +++++++++++++++++++++++++++++++++++++++++-- drivers/usb/musb/musb_regs.h | 7 ++ 4 files changed, 250 insertions(+), 9 deletions(-) diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index ec69b90..be76a72 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -424,6 +424,7 @@ void musb_hnp_stop(struct musb *musb) musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16); } +static void musb_generic_disable(struct musb *musb); /* * Interrupt Service Routine to record USB "global" interrupts. * Since these do not happen often and signify things of @@ -479,6 +480,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | MUSB_PORT_STAT_RESUME; musb->rh_timer = jiffies + msecs_to_jiffies(USB_RESUME_TIMEOUT); + musb->need_finish_resume = 1; schedule_delayed_work( &musb->finish_resume_work, @@ -850,6 +852,13 @@ b_host: } } + /* handle babble condition */ + if (int_usb & MUSB_INTR_BABBLE && is_host_active(musb)) { + musb_generic_disable(musb); + schedule_delayed_work(&musb->recover_work, + msecs_to_jiffies(100)); + } + #if 0 /* REVISIT ... this would be for multiplexing periodic endpoints, or * supporting transfer phasing to prevent exceeding ISO bandwidth @@ -1748,6 +1757,36 @@ static void musb_irq_work(struct work_struct *data) } } +/* Recover from babble interrupt conditions */ +static void musb_recover_work(struct work_struct *data) +{ + struct musb *musb = container_of(data, struct musb, recover_work.work); + int status, ret; + + ret = musb_platform_reset(musb); + if (ret) + return; + + usb_phy_vbus_off(musb->xceiv); + usleep_range(100, 200); + + usb_phy_vbus_on(musb->xceiv); + usleep_range(100, 200); + + /* + * When a babble condition occurs, the musb controller + * removes the session bit and the endpoint config is lost. + */ + if (musb->dyn_fifo) + status = ep_config_from_table(musb); + else + status = ep_config_from_hw(musb); + + /* start the session again */ + if (status == 0) + musb_start(musb); +} + /* -------------------------------------------------------------------------- * Init support */ @@ -1915,6 +1954,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) /* Init IRQ workqueue before request_irq */ INIT_WORK(&musb->irq_work, musb_irq_work); + INIT_DELAYED_WORK(&musb->recover_work, musb_recover_work); INIT_DELAYED_WORK(&musb->deassert_reset_work, musb_deassert_reset); INIT_DELAYED_WORK(&musb->finish_resume_work, musb_host_finish_resume); @@ -2010,6 +2050,7 @@ fail4: fail3: cancel_work_sync(&musb->irq_work); + cancel_delayed_work_sync(&musb->recover_work); cancel_delayed_work_sync(&musb->finish_resume_work); cancel_delayed_work_sync(&musb->deassert_reset_work); if (musb->dma_controller) @@ -2075,6 +2116,7 @@ static int musb_remove(struct platform_device *pdev) dma_controller_destroy(musb->dma_controller); cancel_work_sync(&musb->irq_work); + cancel_delayed_work_sync(&musb->recover_work); cancel_delayed_work_sync(&musb->finish_resume_work); cancel_delayed_work_sync(&musb->deassert_reset_work); musb_free(musb); @@ -2263,9 +2305,11 @@ static int musb_suspend(struct device *dev) return 0; } -static int musb_resume_noirq(struct device *dev) +static int musb_resume(struct device *dev) { struct musb *musb = dev_to_musb(dev); + u8 devctl; + u8 mask; /* * For static cmos like DaVinci, register values were preserved @@ -2279,6 +2323,23 @@ static int musb_resume_noirq(struct device *dev) musb_restore_context(musb); + devctl = musb_readb(musb->mregs, MUSB_DEVCTL); + mask = MUSB_DEVCTL_BDEVICE | MUSB_DEVCTL_FSDEV | MUSB_DEVCTL_LSDEV; + if ((devctl & mask) != (musb->context.devctl & mask)) + musb->port1_status = 0; + if (musb->need_finish_resume) { + musb->need_finish_resume = 0; + schedule_delayed_work(&musb->finish_resume_work, + msecs_to_jiffies(USB_RESUME_TIMEOUT)); + } + + /* + * The USB HUB code expects the device to be in RPM_ACTIVE once it came + * out of suspend + */ + pm_runtime_disable(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); return 0; } @@ -2309,12 +2370,18 @@ static int musb_runtime_resume(struct device *dev) musb_restore_context(musb); first = 0; + if (musb->need_finish_resume) { + musb->need_finish_resume = 0; + schedule_delayed_work(&musb->finish_resume_work, + msecs_to_jiffies(USB_RESUME_TIMEOUT)); + } + return 0; } static const struct dev_pm_ops musb_dev_pm_ops = { .suspend = musb_suspend, - .resume_noirq = musb_resume_noirq, + .resume = musb_resume, .runtime_suspend = musb_runtime_suspend, .runtime_resume = musb_runtime_resume, }; diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h index 7083e82..d59a758 100644 --- a/drivers/usb/musb/musb_core.h +++ b/drivers/usb/musb/musb_core.h @@ -192,6 +192,7 @@ struct musb_platform_ops { int (*set_mode)(struct musb *musb, u8 mode); void (*try_idle)(struct musb *musb, unsigned long timeout); + int (*reset)(struct musb *musb); int (*vbus_status)(struct musb *musb); void (*set_vbus)(struct musb *musb, int on); @@ -296,6 +297,7 @@ struct musb { irqreturn_t (*isr)(int, void *); struct work_struct irq_work; + struct delayed_work recover_work; struct delayed_work deassert_reset_work; struct delayed_work finish_resume_work; u16 hwvers; @@ -337,6 +339,7 @@ struct musb { dma_addr_t async; dma_addr_t sync; void __iomem *sync_va; + u8 tusb_revision; #endif /* passed down from chip/board specific irq handlers */ @@ -387,6 +390,7 @@ struct musb { /* is_suspended means USB B_PERIPHERAL suspend */ unsigned is_suspended:1; + unsigned need_finish_resume:1; /* may_wakeup means remote wakeup is enabled */ unsigned may_wakeup:1; @@ -552,6 +556,14 @@ static inline void musb_platform_try_idle(struct musb *musb, musb->ops->try_idle(musb, timeout); } +static inline int musb_platform_reset(struct musb *musb) +{ + if (!musb->ops->reset) + return -EINVAL; + + return musb->ops->reset(musb); +} + static inline int musb_platform_get_vbus_status(struct musb *musb) { if (!musb->ops->vbus_status) diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index 865243e..d20a706 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -45,6 +45,8 @@ #include #include +#include + #include "musb_core.h" static const struct of_device_id musb_dsps_of_match[]; @@ -134,8 +136,29 @@ struct dsps_glue { const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ struct timer_list timer; /* otg_workaround timer */ unsigned long last_timer; /* last timer data for each instance */ + bool sw_babble_enabled; struct dsps_context context; + struct debugfs_regset32 regset; + struct dentry *dbgfs_root; +}; + +static const struct debugfs_reg32 dsps_musb_regs[] = { + { "revision", 0x00 }, + { "control", 0x14 }, + { "status", 0x18 }, + { "eoi", 0x24 }, + { "intr0_stat", 0x30 }, + { "intr1_stat", 0x34 }, + { "intr0_set", 0x38 }, + { "intr1_set", 0x3c }, + { "txmode", 0x70 }, + { "rxmode", 0x74 }, + { "autoreq", 0xd0 }, + { "srpfixtime", 0xd4 }, + { "tdown", 0xd8 }, + { "phy_utmi", 0xe0 }, + { "mode", 0xe8 }, }; static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) @@ -307,9 +330,21 @@ static irqreturn_t dsps_interrupt(int irq, void *hci) * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. * Also, DRVVBUS pulses for SRP (but not at 5V) ... */ - if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) + if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) { pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); + /* + * When a babble condition occurs, the musb controller removes + * the session and is no longer in host mode. Hence, all + * devices connected to its root hub get disconnected. + * + * Hand this error down to the musb core isr, so it can + * recover. + */ + musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT; + musb->int_tx = musb->int_rx = 0; + } + if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { int drvvbus = dsps_readl(reg_base, wrp->status); void __iomem *mregs = musb->mregs; @@ -368,6 +403,30 @@ out: return ret; } +static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) +{ + struct dentry *root; + struct dentry *file; + char buf[128]; + + sprintf(buf, "%s.dsps", dev_name(musb->controller)); + root = debugfs_create_dir(buf, NULL); + if (!root) + return -ENOMEM; + glue->dbgfs_root = root; + + glue->regset.regs = dsps_musb_regs; + glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); + glue->regset.base = musb->ctrl_base; + + file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); + if (!file) { + debugfs_remove_recursive(root); + return -ENOMEM; + } + return 0; +} + static int dsps_musb_init(struct musb *musb) { struct device *dev = musb->controller; @@ -377,6 +436,7 @@ static int dsps_musb_init(struct musb *musb) void __iomem *reg_base; struct resource *r; u32 rev, val; + int ret; r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); if (!r) @@ -410,6 +470,23 @@ static int dsps_musb_init(struct musb *musb) val &= ~(1 << wrp->otg_disable); dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); + /* + * Check whether the dsps version has babble control enabled. + * In latest silicon revision the babble control logic is enabled. + * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control + * logic enabled. + */ + val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL); + if (val == MUSB_BABBLE_RCV_DISABLE) { + glue->sw_babble_enabled = true; + val |= MUSB_BABBLE_SW_SESSION_CTRL; + dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val); + } + + ret = dsps_musb_dbg_init(musb, glue); + if (ret) + return ret; + return 0; } @@ -419,8 +496,9 @@ static int dsps_musb_exit(struct musb *musb) struct dsps_glue *glue = dev_get_drvdata(dev->parent); del_timer_sync(&glue->timer); - usb_phy_shutdown(musb->xceiv); + debugfs_remove_recursive(glue->dbgfs_root); + return 0; } @@ -430,10 +508,9 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode) struct dsps_glue *glue = dev_get_drvdata(dev->parent); const struct dsps_musb_wrapper *wrp = glue->wrp; void __iomem *ctrl_base = musb->ctrl_base; - void __iomem *base = musb->mregs; u32 reg; - reg = dsps_readl(base, wrp->mode); + reg = dsps_readl(ctrl_base, wrp->mode); switch (mode) { case MUSB_HOST: @@ -446,7 +523,7 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode) */ reg |= (1 << wrp->iddig_mux); - dsps_writel(base, wrp->mode, reg); + dsps_writel(ctrl_base, wrp->mode, reg); dsps_writel(ctrl_base, wrp->phy_utmi, 0x02); break; case MUSB_PERIPHERAL: @@ -459,10 +536,10 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode) */ reg |= (1 << wrp->iddig_mux); - dsps_writel(base, wrp->mode, reg); + dsps_writel(ctrl_base, wrp->mode, reg); break; case MUSB_OTG: - dsps_writel(base, wrp->phy_utmi, 0x02); + dsps_writel(ctrl_base, wrp->phy_utmi, 0x02); break; default: dev_err(glue->dev, "unsupported mode %d\n", mode); @@ -472,6 +549,84 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode) return 0; } +static bool sw_babble_control(struct musb *musb) +{ + u8 babble_ctl; + bool session_restart = false; + + babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL); + dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", + babble_ctl); + /* + * check line monitor flag to check whether babble is + * due to noise + */ + dev_dbg(musb->controller, "STUCK_J is %s\n", + babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); + + if (babble_ctl & MUSB_BABBLE_STUCK_J) { + int timeout = 10; + + /* + * babble is due to noise, then set transmit idle (d7 bit) + * to resume normal operation + */ + babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL); + babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; + dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); + + /* wait till line monitor flag cleared */ + dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); + do { + babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL); + udelay(1); + } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); + + /* check whether stuck_at_j bit cleared */ + if (babble_ctl & MUSB_BABBLE_STUCK_J) { + /* + * real babble condition has occurred + * restart the controller to start the + * session again + */ + dev_dbg(musb->controller, "J not cleared, misc (%x)\n", + babble_ctl); + session_restart = true; + } + } else { + session_restart = true; + } + + return session_restart; +} + +static int dsps_musb_reset(struct musb *musb) +{ + struct device *dev = musb->controller; + struct dsps_glue *glue = dev_get_drvdata(dev->parent); + const struct dsps_musb_wrapper *wrp = glue->wrp; + int session_restart = 0; + + if (glue->sw_babble_enabled) + session_restart = sw_babble_control(musb); + /* + * In case of new silicon version babble condition can be recovered + * without resetting the MUSB. But for older silicon versions, MUSB + * reset is needed + */ + if (session_restart || !glue->sw_babble_enabled) { + dev_info(musb->controller, "Restarting MUSB to recover from Babble\n"); + dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset)); + usleep_range(100, 200); + usb_phy_shutdown(musb->xceiv); + usleep_range(100, 200); + usb_phy_init(musb->xceiv); + session_restart = 1; + } + + return !session_restart; +} + static struct musb_platform_ops dsps_ops = { .init = dsps_musb_init, .exit = dsps_musb_exit, diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h index 03f2655..b9bcda5 100644 --- a/drivers/usb/musb/musb_regs.h +++ b/drivers/usb/musb/musb_regs.h @@ -72,6 +72,12 @@ #define MUSB_DEVCTL_HR 0x02 #define MUSB_DEVCTL_SESSION 0x01 +/* BABBLE_CTL */ +#define MUSB_BABBLE_FORCE_TXIDLE 0x80 +#define MUSB_BABBLE_SW_SESSION_CTRL 0x40 +#define MUSB_BABBLE_STUCK_J 0x20 +#define MUSB_BABBLE_RCV_DISABLE 0x04 + /* MUSB ULPI VBUSCONTROL */ #define MUSB_ULPI_USE_EXTVBUS 0x01 #define MUSB_ULPI_USE_EXTVBUSIND 0x02 @@ -246,6 +252,7 @@ */ #define MUSB_DEVCTL 0x60 /* 8 bit */ +#define MUSB_BABBLE_CTL 0x61 /* 8 bit */ /* These are always controlled through the INDEX register */ #define MUSB_TXFIFOSZ 0x62 /* 8-bit (see masks) */ -- 2.6.2 ./0025-USB-babble-enable-debug-output-ok.patch0000664000175000017500000000155612620330464021164 0ustar nielsenrnielsenrFrom 12b26f09a28ce2b234d1a3e99019582ce912b455 Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Mon, 9 Nov 2015 14:06:59 +0100 Subject: [PATCH] USB babble enable debug output (ok) --- drivers/usb/musb/musb_dsps.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index de4c351..54ba216 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -29,6 +29,8 @@ * da8xx.c would be merged to this file after testing. */ +#define DEBUG + #include #include #include @@ -51,8 +53,6 @@ static const struct of_device_id musb_dsps_of_match[]; -#define DEBUG 1 - /** * avoid using musb_readx()/musb_writex() as glue layer should not be * dependent on musb core layer symbols. -- 2.6.2 ./0017-mmc3-and-xbar-event.patch0000664000175000017500000000272512620330463016520 0ustar nielsenrnielsenrFrom f48603e015ed757020edfcfcba9aed347dbcb4ef Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:27:29 +0200 Subject: [PATCH 17/21] mmc3-and-xbar-event --- arch/arm/boot/dts/am335x-bone-common.dtsi | 7 +++++++ arch/arm/boot/dts/am33xx.dtsi | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 3433d82..3403dfe 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -522,6 +522,13 @@ // cd-inverted; // Removed for WLAN to work }; +&mmc3 { + status = "okay"; + bus-width = <0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_pins>; +}; + / { ocp { //FIXME: these pwm's still need work, this guild isn't working.. diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index a9c14c8..befe6bb 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -145,6 +145,8 @@ dma-channels = <64>; ti,edma-regions = <4>; ti,edma-slots = <256>; + ti,edma-xbar-event-map = /bits/ 16 <1 12 + 2 13>; }; gpio0: gpio@44e07000 { @@ -313,6 +315,9 @@ compatible = "ti,omap4-hsmmc"; ti,hwmods = "mmc3"; ti,needs-special-reset; + dmas = <&edma 12 + &edma 13>; + dma-names = "tx", "rx"; interrupts = <29>; interrupt-parent = <&intc>; reg = <0x47810000 0x1000>; -- 2.3.5 ./0022-IOs-default-changed.patch0000664000175000017500000000322412620330464016543 0ustar nielsenrnielsenrFrom c47d330c7cfb872711b774d52b32389a973c0252 Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Fri, 5 Jun 2015 14:20:56 +0200 Subject: [PATCH] IOs default changed --- arch/arm/boot/dts/am335x-bone-common.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index f109082..5734c82 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -100,7 +100,7 @@ uart1_pins: pinmux_uart1_pins { pinctrl-single,pins = < - 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ + 0x180 (PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ >; }; @@ -250,7 +250,7 @@ 0x168 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* TP25 LED_G, uart0_ctsn.gpio1_8 | MODE7 | OUTPUT */ 0x16c (PIN_OUTPUT | MUX_MODE7) /* TP26 LED_Y, uart0_rtsn.gpio1_9 | MODE7 | OUTPUT */ 0x040 (PIN_OUTPUT | MUX_MODE7) /* USR4 EN_NTC, gpmc_a0.gpio1_16 | MODE7 | OUTPUT */ - 0x044 (PIN_OUTPUT | MUX_MODE7) /* SMF_On, gpmc_a1.gpio1_17 | MODE7 | OUTPUT */ + 0x044 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* SMF_On, gpmc_a1.gpio1_17 | MODE7 | OUTPUT */ // 0x04c (PIN_INPUT | MUX_MODE7) /* USR14 Reserve, gpmc_a3.gpio1_19 | MODE7 | INPUT */ 0x064 (PIN_OUTPUT | MUX_MODE7) /* USR9 En_WPC, gpmc_a09.gpio1_25 | MODE7 | OUTPUT */ 0x06C (PIN_OUTPUT | MUX_MODE7) /* USR10 En_Charger, gpmc_a11.gpio1_27 | MODE7 | OUTPUT */ -- 2.4.2 ./0002-Script-changes.patch0000664000175000017500000000172012620330462015705 0ustar nielsenrnielsenrFrom 87b5bbf01215ef907717866be3f864d970da8d35 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:06:50 +0200 Subject: [PATCH 02/21] Script-changes --- build_modules.sh | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) mode change 100644 => 100755 build_modules.sh diff --git a/build_modules.sh b/build_modules.sh old mode 100644 new mode 100755 index b88f1cf..34e8b15 --- a/build_modules.sh +++ b/build_modules.sh @@ -11,7 +11,11 @@ if [ -d ./deploy/lib ]; then echo "remove directory ok" fi -make -j4 ARCH=arm CROSS_COMPILE=${CC} modules_install INSTALL_MOD_PATH=./deploy +make -s ARCH=arm CROSS_COMPILE=${CC} modules_install INSTALL_MOD_PATH=./deploy + +make -s ARCH=arm CROSS_COMPILE=${CC} firmware_install INSTALL_FW_PATH=./deploy + +find ./arch/arm/boot/ -iname "am335x-boneblack.dtb" -exec cp -v '{}' ./deploy/ \; cat include/generated/utsrelease.h | awk '{print $3}' | sed 's/\"//g' -- 2.3.5 ./0024-USB-babble-enable-debug-output.patch0000664000175000017500000000124212620330464020544 0ustar nielsenrnielsenrFrom 1c333beffc1c319b3413eea7cc98c5299d224787 Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Mon, 9 Nov 2015 14:04:58 +0100 Subject: [PATCH] USB babble enable debug output --- drivers/usb/musb/musb_dsps.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index d20a706..de4c351 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -51,6 +51,8 @@ static const struct of_device_id musb_dsps_of_match[]; +#define DEBUG 1 + /** * avoid using musb_readx()/musb_writex() as glue layer should not be * dependent on musb core layer symbols. -- 2.6.2 ./0012-Enable-poweroff-from-PMIC.patch0000664000175000017500000000474012620330463017544 0ustar nielsenrnielsenrFrom ff3e294120ed42270f177647e3e996d67245dea6 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:24:29 +0200 Subject: [PATCH 12/21] Enable-poweroff-from-PMIC --- arch/arm/boot/dts/am335x-bone-common.dtsi | 6 ++++-- arch/arm/boot/dts/am33xx.dtsi | 1 + drivers/mfd/tps65217.c | 4 ++++ drivers/rtc/rtc-omap.c | 5 ++++- 4 files changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 129579e..870a48b 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -368,17 +368,19 @@ tps: tps@24 { reg = <0x24>; + ti,pmic-shutdown-controller; }; baseboard_eeprom: baseboard_eeprom@50 { compatible = "at,24c256"; reg = <0x50>; }; - + +/* rtc: rtc@6f { compatible = "microchip,mcp7941x"; reg = <0x6f>; - }; + };*/ }; &i2c2 { diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index da5c304..a9c14c8 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -410,6 +410,7 @@ interrupts = <75 76>; ti,hwmods = "rtc"; + ti,system-power-controller; }; spi0: spi@48030000 { diff --git a/drivers/mfd/tps65217.c b/drivers/mfd/tps65217.c index 3cc4c70..48e2bde 100644 --- a/drivers/mfd/tps65217.c +++ b/drivers/mfd/tps65217.c @@ -212,12 +212,16 @@ static int tps65217_probe(struct i2c_client *client, /* Set the PMIC to shutdown on PWR_EN toggle */ if (status_off) { + dev_info(tps->dev, "Set the status OFF\n"); ret = tps65217_set_bits(tps, TPS65217_REG_STATUS, TPS65217_STATUS_OFF, TPS65217_STATUS_OFF, TPS65217_PROTECT_NONE); if (ret) dev_warn(tps->dev, "unable to set the status OFF\n"); } + else + dev_info(tps->dev, "NO Set the status OFF\n"); + dev_info(tps->dev, "TPS65217 ID %#x version 1.%d\n", (version & TPS65217_CHIPID_CHIP_MASK) >> 4, diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index dd21425..476a041 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -460,8 +460,11 @@ static int __init omap_rtc_probe(struct platform_device *pdev) /* RTC power off */ if (pm_off && !pm_power_off) + { pm_power_off = rtc_power_off; - + pr_info("%s: RTC enable power OFF\n", + pdev->name); + } /* clear pending irqs, and set 1/second periodic, * which we'll use instead of update irqs */ -- 2.3.5 ./0027-USB-babble-enable-debug2.patch0000664000175000017500000000165312620330464017301 0ustar nielsenrnielsenrFrom eb2a50bf979a8da3a7051cb3716c184cd90a20b5 Mon Sep 17 00:00:00 2001 From: Ralf Nielsen Date: Mon, 9 Nov 2015 15:44:31 +0100 Subject: [PATCH] USB babble enable debug2 --- drivers/usb/musb/musb_core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 9207893..1ad3687 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -89,7 +89,7 @@ * Most of the conditional compilation will (someday) vanish. */ -#define DEBUG +#define DEBUG 1 #include #include @@ -1765,6 +1765,8 @@ static void musb_recover_work(struct work_struct *data) struct musb *musb = container_of(data, struct musb, recover_work.work); int status, ret; + dev_dbg(musb->controller, "Try to recover from Babblen"); + ret = musb_platform_reset(musb); if (ret) return; -- 2.6.2 ./0015-Power-LED-default-on.patch0000664000175000017500000000221312620330463016570 0ustar nielsenrnielsenrFrom 8596442f2aae75f45719ca0df5cda1348c9559c2 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:26:16 +0200 Subject: [PATCH 15/21] Power-LED-default-on --- arch/arm/boot/dts/am335x-bone-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index fbf496e..3433d82 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -247,7 +247,7 @@ gpio1_helper_pins: pinmux_gpio1_helper_pins { pinctrl-single,pins = < - 0x168 (PIN_OUTPUT | MUX_MODE7) /* TP25 LED_G, uart0_ctsn.gpio1_8 | MODE7 | OUTPUT */ + 0x168 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* TP25 LED_G, uart0_ctsn.gpio1_8 | MODE7 | OUTPUT */ 0x16c (PIN_OUTPUT | MUX_MODE7) /* TP26 LED_Y, uart0_rtsn.gpio1_9 | MODE7 | OUTPUT */ 0x040 (PIN_OUTPUT | MUX_MODE7) /* USR4 EN_NTC, gpmc_a0.gpio1_16 | MODE7 | OUTPUT */ 0x044 (PIN_OUTPUT | MUX_MODE7) /* SMF_On, gpmc_a1.gpio1_17 | MODE7 | OUTPUT */ -- 2.3.5 ./0013-RTC-is-back.patch0000664000175000017500000000125312620330463014776 0ustar nielsenrnielsenrFrom 7f066cd01555a99b855a6cb74d25edf20d8cc1e7 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:25:22 +0200 Subject: [PATCH 13/21] RTC-is-back --- arch/arm/boot/dts/am335x-bone-common.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 870a48b..ab5a76a 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -376,11 +376,10 @@ reg = <0x50>; }; -/* rtc: rtc@6f { compatible = "microchip,mcp7941x"; reg = <0x6f>; - };*/ + }; }; &i2c2 { -- 2.3.5 ./0014-ADC-Clock-reduced.patch0000664000175000017500000000334512620330463016075 0ustar nielsenrnielsenrFrom ae6cf4677efde4a1ca86985558fce396b164c542 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:25:50 +0200 Subject: [PATCH 14/21] ADC-Clock-reduced --- arch/arm/boot/dts/am335x-bone-common.dtsi | 4 ++-- include/linux/mfd/ti_am335x_tscadc.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index ab5a76a..fbf496e 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -108,8 +108,8 @@ uart4_pins: pinmux_uart4_pins { pinctrl-single,pins = < - 0x070 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart4_rxd.uart4_rxd */ - 0x074 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart4_txd.uart4_txd */ + 0x070 (PIN_INPUT_PULLUP | MUX_MODE6) /* uart4_rxd.uart4_rxd */ + 0x074 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* uart4_txd.uart4_txd */ >; }; diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 86e0b83..18053a6 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -89,7 +89,7 @@ #define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) #define STEPDELAY_SAMPLE_MASK (0xFF << 24) #define STEPDELAY_SAMPLE(val) ((val) << 24) -#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(0) +#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(2) /* Charge Config */ #define STEPCHARGE_RFP_MASK (7 << 12) @@ -107,7 +107,7 @@ /* Charge delay */ #define CHARGEDLY_OPEN_MASK (0x3FFFF << 0) #define CHARGEDLY_OPEN(val) ((val) << 0) -#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(8) +#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(4) /* Control register */ #define CNTRLREG_TSCSSENB BIT(0) -- 2.3.5 ./0005-RTC-add-power-off-for-TPS65217.patch0000664000175000017500000001066712620330463017766 0ustar nielsenrnielsenrFrom 0fe3a59e631afc1691862d09badc8d1df449f96b Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:14:40 +0200 Subject: [PATCH 05/21] RTC-add-power-off-for-TPS65217 --- drivers/rtc/rtc-omap.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 76 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index 26de5f8..dd21425 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -72,6 +72,14 @@ #define OMAP_RTC_IRQWAKEEN 0x7c +#define OMAP_RTC_ALARM2_SECONDS_REG 0x80 +#define OMAP_RTC_ALARM2_MINUTES_REG 0x84 +#define OMAP_RTC_ALARM2_HOURS_REG 0x88 +#define OMAP_RTC_ALARM2_DAYS_REG 0x8c +#define OMAP_RTC_ALARM2_MONTHS_REG 0x90 +#define OMAP_RTC_ALARM2_YEARS_REG 0x94 +#define OMAP_RTC_PMIC_REG 0x98 + /* OMAP_RTC_CTRL_REG bit fields: */ #define OMAP_RTC_CTRL_SPLIT (1<<7) #define OMAP_RTC_CTRL_DISABLE (1<<6) @@ -93,18 +101,24 @@ #define OMAP_RTC_STATUS_BUSY (1<<0) /* OMAP_RTC_INTERRUPTS_REG bit fields: */ +#define OMAP_RTC_INTERRUPTS_IT_ALARM2 (1<<4) #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3) #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2) /* OMAP_RTC_IRQWAKEEN bit fields: */ #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN (1<<1) +/* OMAP_RTC_PMIC_REG bit fields: */ +#define OMAP_RTC_PMIC_POWER_EN_EN (1<<16) + /* OMAP_RTC_KICKER values */ #define KICK0_VALUE 0x83e70b13 #define KICK1_VALUE 0x95a4f1e0 #define OMAP_RTC_HAS_KICKER 0x1 +#define SHUTDOWN_TIME_SEC 2 + /* * Few RTC IP revisions has special WAKE-EN Register to enable Wakeup * generation for event Alarm. @@ -299,6 +313,56 @@ static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) return 0; } +/* + * rtc_power_off: Set the pmic power off sequence. The RTC generates + * pmic_pwr_enable control, which can be used to control an external + * PMIC. + */ +static void rtc_power_off(void) +{ + u32 val; + struct rtc_time tm; + unsigned long time; + + /* Set PMIC power enable */ + val = readl(rtc_base + OMAP_RTC_PMIC_REG); + writel(val | OMAP_RTC_PMIC_POWER_EN_EN, rtc_base + OMAP_RTC_PMIC_REG); + + /* Read rtc time */ + omap_rtc_read_time(NULL, &tm); + + /* Convert Gregorian date to seconds since 01-01-1970 00:00:00 */ + rtc_tm_to_time(&tm, &time); + + /* Add shutdown time to the current value */ + time += SHUTDOWN_TIME_SEC; + + /* Convert seconds since 01-01-1970 00:00:00 to Gregorian date */ + rtc_time_to_tm(time, &tm); + + if (tm2bcd(&tm) < 0) + return; + + pr_info("System will go to power_off state in approx. %d secs\n", + SHUTDOWN_TIME_SEC); + + /* + * pmic_pwr_enable is controlled by means of ALARM2 event. So here + * programming alarm2 expiry time and enabling alarm2 interrupt + */ + rtc_write(tm.tm_sec, OMAP_RTC_ALARM2_SECONDS_REG); + rtc_write(tm.tm_min, OMAP_RTC_ALARM2_MINUTES_REG); + rtc_write(tm.tm_hour, OMAP_RTC_ALARM2_HOURS_REG); + rtc_write(tm.tm_mday, OMAP_RTC_ALARM2_DAYS_REG); + rtc_write(tm.tm_mon, OMAP_RTC_ALARM2_MONTHS_REG); + rtc_write(tm.tm_year, OMAP_RTC_ALARM2_YEARS_REG); + + /* Enable alarm2 interrupt */ + val = readl(rtc_base + OMAP_RTC_INTERRUPTS_REG); + writel(val | OMAP_RTC_INTERRUPTS_IT_ALARM2, + rtc_base + OMAP_RTC_INTERRUPTS_REG); +} + static struct rtc_class_ops omap_rtc_ops = { .read_time = omap_rtc_read_time, .set_time = omap_rtc_set_time, @@ -340,17 +404,23 @@ static const struct of_device_id omap_rtc_of_match[] = { }; MODULE_DEVICE_TABLE(of, omap_rtc_of_match); + + static int __init omap_rtc_probe(struct platform_device *pdev) { struct resource *res; struct rtc_device *rtc; u8 reg, new_ctrl; + bool pm_off = false; const struct platform_device_id *id_entry; const struct of_device_id *of_id; of_id = of_match_device(omap_rtc_of_match, &pdev->dev); - if (of_id) + if (of_id) { pdev->id_entry = of_id->data; + pm_off = of_property_read_bool(pdev->dev.of_node, + "ti,system-power-controller"); + } omap_rtc_timer = platform_get_irq(pdev, 0); if (omap_rtc_timer <= 0) { @@ -388,6 +458,10 @@ static int __init omap_rtc_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, rtc); + /* RTC power off */ + if (pm_off && !pm_power_off) + pm_power_off = rtc_power_off; + /* clear pending irqs, and set 1/second periodic, * which we'll use instead of update irqs */ @@ -479,6 +553,7 @@ static int __exit omap_rtc_remove(struct platform_device *pdev) return 0; } + #ifdef CONFIG_PM_SLEEP static u8 irqstat; -- 2.3.5 ./0007-seca-sound-enable.patch0000664000175000017500000023052112620330463016331 0ustar nielsenrnielsenrFrom 2fd13110986bb7e5a9c8f30d9b1455c5556b88d9 Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 10:19:35 +0200 Subject: [PATCH 07/21] seca-sound-enable --- sound/soc/codecs/hdmi.c | 26 +- sound/soc/davinci/davinci-evm.c | 291 +++++++++- sound/soc/davinci/davinci-mcasp.c | 1070 +++++++++++++++++++++---------------- sound/soc/davinci/davinci-mcasp.h | 304 ++--------- sound/soc/davinci/davinci-pcm.c | 30 +- 5 files changed, 965 insertions(+), 756 deletions(-) diff --git a/sound/soc/codecs/hdmi.c b/sound/soc/codecs/hdmi.c index 9cb1c7d..6f105dc 100644 --- a/sound/soc/codecs/hdmi.c +++ b/sound/soc/codecs/hdmi.c @@ -39,24 +39,24 @@ static struct snd_soc_dai_driver hdmi_codec_dai = { .playback = { .stream_name = "Playback", .channels_min = 2, - .channels_max = 8, - .rates = SNDRV_PCM_RATE_32000 | - SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | - SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | - SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000, - .formats = SNDRV_PCM_FMTBIT_S16_LE | - SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, }, .capture = { .stream_name = "Capture", .channels_min = 2, .channels_max = 2, - .rates = SNDRV_PCM_RATE_32000 | - SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | - SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | - SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000, - .formats = SNDRV_PCM_FMTBIT_S16_LE | - SNDRV_PCM_FMTBIT_S24_LE, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, }, }; diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c index 5e3bc3c..8fe24ff 100644 --- a/sound/soc/davinci/davinci-evm.c +++ b/sound/soc/davinci/davinci-evm.c @@ -17,9 +17,11 @@ #include #include #include +#include #include #include #include +#include #include #include @@ -28,11 +30,40 @@ #include "davinci-pcm.h" #include "davinci-i2s.h" +#include "davinci-mcasp.h" struct snd_soc_card_drvdata_davinci { + struct clk *mclk; unsigned sysclk; + struct snd_pcm_hw_constraint_list *rate_constraint; }; +/* If changing sample format the tda998x configuration (REG_CTS_N) needs + to be changed. */ +#define TDA998X_SAMPLE_FORMAT SNDRV_PCM_FORMAT_S32_LE + +static int evm_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_card *soc_card = rtd->codec->card; + struct clk *mclk = ((struct snd_soc_card_drvdata_davinci *) + snd_soc_card_get_drvdata(soc_card))->mclk; + + return clk_prepare_enable(mclk); +} + +static void evm_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_card *soc_card = rtd->codec->card; + struct clk *mclk = ((struct snd_soc_card_drvdata_davinci *) + snd_soc_card_get_drvdata(soc_card))->mclk; + + clk_disable_unprepare(mclk); +} + +#define AUDIO_FORMAT (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF) +#define AUDIO_FORMAT_tda998x (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_NB_NF) static int evm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { @@ -45,6 +76,16 @@ static int evm_hw_params(struct snd_pcm_substream *substream, unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) snd_soc_card_get_drvdata(soc_card))->sysclk; + /* set codec DAI configuration */ + ret = snd_soc_dai_set_fmt(codec_dai, AUDIO_FORMAT); + if (ret < 0) + return ret; + + /* set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT); + if (ret < 0) + return ret; + /* set the codec system clock */ ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT); if (ret < 0) @@ -58,10 +99,101 @@ static int evm_hw_params(struct snd_pcm_substream *substream, return 0; } +static int evm_spdif_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + + /* set cpu DAI configuration */ + return snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT); +} + +static int evm_tda998x_startup(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_card *soc_card = rtd->codec->card; + struct snd_soc_card_drvdata_davinci *drvdata = + (struct snd_soc_card_drvdata_davinci *) + snd_soc_card_get_drvdata(soc_card); + struct snd_mask *fmt = constrs_mask(&runtime->hw_constraints, + SNDRV_PCM_HW_PARAM_FORMAT); + snd_mask_none(fmt); + snd_mask_set(fmt, TDA998X_SAMPLE_FORMAT); + + + + runtime->hw.rate_min = drvdata->rate_constraint->list[0]; + runtime->hw.rate_max = drvdata->rate_constraint->list[ + drvdata->rate_constraint->count - 1]; + runtime->hw.rates = SNDRV_PCM_RATE_KNOT; + + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, + drvdata->rate_constraint); + snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_CHANNELS, + 2, 2); + + return evm_startup(substream); +} + +static unsigned int evm_get_bclk(struct snd_pcm_hw_params *params) +{ + int sample_size = snd_pcm_format_width(params_format(params)); + int rate = params_rate(params); + int channels = params_channels(params); + + return sample_size * channels * rate; +} + +static int evm_tda998x_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_card *soc_card = codec->card; + struct platform_device *pdev = to_platform_device(soc_card->dev); + unsigned int bclk_freq = evm_get_bclk(params); + unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) + snd_soc_card_get_drvdata(soc_card))->sysclk; + int ret; + + /* set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT_tda998x); + if (ret < 0) + return ret; + + ret = snd_soc_dai_set_clkdiv(cpu_dai, 1, sysclk / bclk_freq); + if (ret < 0) { + dev_err(&pdev->dev, "can't set CPU DAI clock divider %d\n", + ret); + return ret; + } + + ret = snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_IN); + if (ret < 0) + return ret; + + return ret; +} + static struct snd_soc_ops evm_ops = { + .startup = evm_startup, + .shutdown = evm_shutdown, .hw_params = evm_hw_params, }; +static struct snd_soc_ops evm_tda998x_ops = { + .startup = evm_tda998x_startup, + .shutdown = evm_shutdown, + .hw_params = evm_tda998x_hw_params, +}; + +static struct snd_soc_ops evm_spdif_ops = { + .hw_params = evm_spdif_hw_params, +}; + /* davinci-evm machine dapm widgets */ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { SND_SOC_DAPM_HP("Headphone Jack", NULL), @@ -128,6 +260,88 @@ static int evm_aic3x_init(struct snd_soc_pcm_runtime *rtd) return 0; } +static unsigned int tda998x_hdmi_rates[] = { + 8000, + 16000, + 32000, + 44100, + 48000, + 88200, + 96000 +}; + + + +static struct snd_pcm_hw_constraint_list *evm_tda998x_rate_constraint( + struct snd_soc_card *soc_card) +{ + struct platform_device *pdev = to_platform_device(soc_card->dev); + unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) + snd_soc_card_get_drvdata(soc_card))->sysclk; + struct snd_pcm_hw_constraint_list *ret; + unsigned int *rates; + int i = 0, j = 0; + + ret = devm_kzalloc(soc_card->dev, sizeof(*ret) + + sizeof(tda998x_hdmi_rates), GFP_KERNEL); + if (!ret) { + dev_err(&pdev->dev, "Unable to allocate rate constraint!\n"); + return NULL; + } + + rates = (unsigned int *)&ret[1]; + ret->list = rates; + ret->mask = 0; + for (; i < ARRAY_SIZE(tda998x_hdmi_rates); i++) { + unsigned int bclk_freq = tda998x_hdmi_rates[i] * 2 * + snd_pcm_format_width(TDA998X_SAMPLE_FORMAT); + if (sysclk % bclk_freq == 0) { + rates[j++] = tda998x_hdmi_rates[i]; + dev_dbg(&pdev->dev, "Allowing rate %u\n", + tda998x_hdmi_rates[i]); + } + } + if (j==0) + dev_err(&pdev->dev, "Unable to allocate rate allowed rate!\n"); + + ret->count = j; + return ret; +} + +static const struct snd_soc_dapm_widget tda998x_dapm_widgets[] = { + SND_SOC_DAPM_OUTPUT("HDMI Out"), +}; + +static int evm_tda998x_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_dapm_context *dapm = &rtd->codec->dapm; + struct snd_soc_card *soc_card = rtd->codec->card; + struct snd_soc_card_drvdata_davinci *drvdata = + (struct snd_soc_card_drvdata_davinci *) + snd_soc_card_get_drvdata(soc_card); + int ret; + + ret = snd_soc_dai_set_clkdiv(cpu_dai, 0, 1); + if (ret < 0) + return ret; + + drvdata->rate_constraint = evm_tda998x_rate_constraint(soc_card); + + snd_soc_dapm_new_controls(dapm, tda998x_dapm_widgets, + ARRAY_SIZE(tda998x_dapm_widgets)); + + ret = snd_soc_of_parse_audio_routing(soc_card, "ti,audio-routing"); + + /* not connected */ + snd_soc_dapm_disable_pin(dapm, "RX"); + + /* always connected */ + snd_soc_dapm_enable_pin(dapm, "HDMI Out"); + + return 0; +} + /* davinci-evm digital audio interface glue - connects codec <--> CPU */ static struct snd_soc_dai_link dm6446_evm_dai = { .name = "TLV320AIC3X", @@ -138,8 +352,6 @@ static struct snd_soc_dai_link dm6446_evm_dai = { .platform_name = "davinci-mcbsp", .init = evm_aic3x_init, .ops = &evm_ops, - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, }; static struct snd_soc_dai_link dm355_evm_dai = { @@ -151,8 +363,6 @@ static struct snd_soc_dai_link dm355_evm_dai = { .platform_name = "davinci-mcbsp.1", .init = evm_aic3x_init, .ops = &evm_ops, - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, }; static struct snd_soc_dai_link dm365_evm_dai = { @@ -161,12 +371,10 @@ static struct snd_soc_dai_link dm365_evm_dai = { .stream_name = "AIC3X", .cpu_dai_name = "davinci-mcbsp", .codec_dai_name = "tlv320aic3x-hifi", + .init = evm_aic3x_init, .codec_name = "tlv320aic3x-codec.1-0018", + .ops = &evm_ops, .platform_name = "davinci-mcbsp", - .init = evm_aic3x_init, - .ops = &evm_ops, - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, #elif defined(CONFIG_SND_DM365_VOICE_CODEC) .name = "Voice Codec - CQ93VC", .stream_name = "CQ93", @@ -187,8 +395,6 @@ static struct snd_soc_dai_link dm6467_evm_dai[] = { .codec_name = "tlv320aic3x-codec.0-001a", .init = evm_aic3x_init, .ops = &evm_ops, - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, }, { .name = "McASP", @@ -197,8 +403,7 @@ static struct snd_soc_dai_link dm6467_evm_dai[] = { .codec_dai_name = "dit-hifi", .codec_name = "spdif_dit", .platform_name = "davinci-mcasp.1", - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, + .ops = &evm_spdif_ops, }, }; @@ -211,8 +416,6 @@ static struct snd_soc_dai_link da830_evm_dai = { .platform_name = "davinci-mcasp.1", .init = evm_aic3x_init, .ops = &evm_ops, - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, }; static struct snd_soc_dai_link da850_evm_dai = { @@ -224,8 +427,6 @@ static struct snd_soc_dai_link da850_evm_dai = { .platform_name = "davinci-mcasp.0", .init = evm_aic3x_init, .ops = &evm_ops, - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, }; /* davinci dm6446 evm audio machine driver */ @@ -313,7 +514,7 @@ static struct snd_soc_card da850_snd_soc_card = { #if defined(CONFIG_OF) /* - * The struct is used as place holder. It will be completely + * The structs are used as place holders. They will be completely * filled with data from dt node. */ static struct snd_soc_dai_link evm_dai_tlv320aic3x = { @@ -322,14 +523,26 @@ static struct snd_soc_dai_link evm_dai_tlv320aic3x = { .codec_dai_name = "tlv320aic3x-hifi", .ops = &evm_ops, .init = evm_aic3x_init, - .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | - SND_SOC_DAIFMT_IB_NF, +}; + +static struct snd_soc_dai_link evm_dai_tda998x_hdmi = { + .name = "NXP TDA998x HDMI Chip", + .stream_name = "HDMI", + .codec_dai_name = "hdmi-hifi", + .ops = &evm_tda998x_ops, + .init = evm_tda998x_init, + .dai_fmt = (SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_IB_NF), }; static const struct of_device_id davinci_evm_dt_ids[] = { { .compatible = "ti,da830-evm-audio", - .data = (void *) &evm_dai_tlv320aic3x, + .data = &evm_dai_tlv320aic3x, + }, + { + .compatible = "ti,am33xx-beaglebone-black-audio", + .data = &evm_dai_tda998x_hdmi, }, { /* sentinel */ } }; @@ -348,6 +561,7 @@ static int davinci_evm_probe(struct platform_device *pdev) of_match_device(of_match_ptr(davinci_evm_dt_ids), &pdev->dev); struct snd_soc_dai_link *dai = (struct snd_soc_dai_link *) match->data; struct snd_soc_card_drvdata_davinci *drvdata = NULL; + struct clk *mclk; int ret = 0; evm_soc_card.dai_link = dai; @@ -356,6 +570,7 @@ static int davinci_evm_probe(struct platform_device *pdev) if (!dai->codec_of_node) return -EINVAL; + dai->cpu_of_node = of_parse_phandle(np, "ti,mcasp-controller", 0); if (!dai->cpu_of_node) return -EINVAL; @@ -367,13 +582,38 @@ static int davinci_evm_probe(struct platform_device *pdev) if (ret) return ret; + mclk = of_clk_get_by_name(np, "ti,codec-clock"); + if (PTR_ERR(mclk) == -EPROBE_DEFER) { + return -EPROBE_DEFER; + } else if (IS_ERR(mclk)) { + dev_dbg(&pdev->dev, "Codec clock not found.\n"); + mclk = NULL; + } + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); if (!drvdata) return -ENOMEM; + drvdata->mclk = mclk; + ret = of_property_read_u32(np, "ti,codec-clock-rate", &drvdata->sysclk); - if (ret < 0) - return -EINVAL; + + if (ret < 0) { + if (!drvdata->mclk) { + dev_err(&pdev->dev, + "No clock or clock rate defined.\n"); + return -EINVAL; + } + drvdata->sysclk = clk_get_rate(drvdata->mclk); + } else if (drvdata->mclk) { + unsigned int requestd_rate = drvdata->sysclk; + clk_set_rate(drvdata->mclk, drvdata->sysclk); + drvdata->sysclk = clk_get_rate(drvdata->mclk); + if (drvdata->sysclk != requestd_rate) + dev_warn(&pdev->dev, + "Could not get requested rate %u using %u.\n", + requestd_rate, drvdata->sysclk); + } snd_soc_card_set_drvdata(&evm_soc_card, drvdata); ret = devm_snd_soc_register_card(&pdev->dev, &evm_soc_card); @@ -384,12 +624,27 @@ return ret; } +static int davinci_evm_remove(struct platform_device *pdev) +{ + struct snd_soc_card *card = platform_get_drvdata(pdev); + struct snd_soc_card_drvdata_davinci *drvdata = + (struct snd_soc_card_drvdata_davinci *) + snd_soc_card_get_drvdata(card); + + if (drvdata->mclk) + clk_put(drvdata->mclk); + + snd_soc_unregister_card(card); + + return 0; +} + static struct platform_driver davinci_evm_driver = { .probe = davinci_evm_probe, + .remove = davinci_evm_remove, .driver = { .name = "davinci_evm", .owner = THIS_MODULE, - .pm = &snd_soc_pm_ops, .of_match_table = of_match_ptr(davinci_evm_dt_ids), }, }; diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 7350ebb..7984a46 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include #include @@ -32,147 +31,352 @@ #include #include #include -#include #include "davinci-pcm.h" #include "davinci-mcasp.h" -struct davinci_mcasp { - struct davinci_pcm_dma_params dma_params[2]; - struct snd_dmaengine_dai_dma_data dma_data[2]; - void __iomem *base; - u32 fifo_base; - struct device *dev; +/* + * McASP register definitions + */ +#define DAVINCI_MCASP_PID_REG 0x00 +#define DAVINCI_MCASP_PWREMUMGT_REG 0x04 + +#define DAVINCI_MCASP_PFUNC_REG 0x10 +#define DAVINCI_MCASP_PDIR_REG 0x14 +#define DAVINCI_MCASP_PDOUT_REG 0x18 +#define DAVINCI_MCASP_PDSET_REG 0x1c + +#define DAVINCI_MCASP_PDCLR_REG 0x20 + +#define DAVINCI_MCASP_TLGC_REG 0x30 +#define DAVINCI_MCASP_TLMR_REG 0x34 + +#define DAVINCI_MCASP_GBLCTL_REG 0x44 +#define DAVINCI_MCASP_AMUTE_REG 0x48 +#define DAVINCI_MCASP_LBCTL_REG 0x4c + +#define DAVINCI_MCASP_TXDITCTL_REG 0x50 + +#define DAVINCI_MCASP_GBLCTLR_REG 0x60 +#define DAVINCI_MCASP_RXMASK_REG 0x64 +#define DAVINCI_MCASP_RXFMT_REG 0x68 +#define DAVINCI_MCASP_RXFMCTL_REG 0x6c + +#define DAVINCI_MCASP_ACLKRCTL_REG 0x70 +#define DAVINCI_MCASP_AHCLKRCTL_REG 0x74 +#define DAVINCI_MCASP_RXTDM_REG 0x78 +#define DAVINCI_MCASP_EVTCTLR_REG 0x7c + +#define DAVINCI_MCASP_RXSTAT_REG 0x80 +#define DAVINCI_MCASP_RXTDMSLOT_REG 0x84 +#define DAVINCI_MCASP_RXCLKCHK_REG 0x88 +#define DAVINCI_MCASP_REVTCTL_REG 0x8c + +#define DAVINCI_MCASP_GBLCTLX_REG 0xa0 +#define DAVINCI_MCASP_TXMASK_REG 0xa4 +#define DAVINCI_MCASP_TXFMT_REG 0xa8 +#define DAVINCI_MCASP_TXFMCTL_REG 0xac + +#define DAVINCI_MCASP_ACLKXCTL_REG 0xb0 +#define DAVINCI_MCASP_AHCLKXCTL_REG 0xb4 +#define DAVINCI_MCASP_TXTDM_REG 0xb8 +#define DAVINCI_MCASP_EVTCTLX_REG 0xbc + +#define DAVINCI_MCASP_TXSTAT_REG 0xc0 +#define DAVINCI_MCASP_TXTDMSLOT_REG 0xc4 +#define DAVINCI_MCASP_TXCLKCHK_REG 0xc8 +#define DAVINCI_MCASP_XEVTCTL_REG 0xcc + +/* Left(even TDM Slot) Channel Status Register File */ +#define DAVINCI_MCASP_DITCSRA_REG 0x100 +/* Right(odd TDM slot) Channel Status Register File */ +#define DAVINCI_MCASP_DITCSRB_REG 0x118 +/* Left(even TDM slot) User Data Register File */ +#define DAVINCI_MCASP_DITUDRA_REG 0x130 +/* Right(odd TDM Slot) User Data Register File */ +#define DAVINCI_MCASP_DITUDRB_REG 0x148 + +/* Serializer n Control Register */ +#define DAVINCI_MCASP_XRSRCTL_BASE_REG 0x180 +#define DAVINCI_MCASP_XRSRCTL_REG(n) (DAVINCI_MCASP_XRSRCTL_BASE_REG + \ + (n << 2)) + +/* Transmit Buffer for Serializer n */ +#define DAVINCI_MCASP_TXBUF_REG 0x200 +/* Receive Buffer for Serializer n */ +#define DAVINCI_MCASP_RXBUF_REG 0x280 + +/* McASP FIFO Registers */ +#define DAVINCI_MCASP_WFIFOCTL (0x1010) +#define DAVINCI_MCASP_WFIFOSTS (0x1014) +#define DAVINCI_MCASP_RFIFOCTL (0x1018) +#define DAVINCI_MCASP_RFIFOSTS (0x101C) +#define MCASP_VER3_WFIFOCTL (0x1000) +#define MCASP_VER3_WFIFOSTS (0x1004) +#define MCASP_VER3_RFIFOCTL (0x1008) +#define MCASP_VER3_RFIFOSTS (0x100C) - /* McASP specific data */ - int tdm_slots; - u8 op_mode; - u8 num_serializer; - u8 *serial_dir; - u8 version; - u16 bclk_lrclk_ratio; - int streams; +/* + * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management + * Register Bits + */ +#define MCASP_FREE BIT(0) +#define MCASP_SOFT BIT(1) - /* McASP FIFO related */ - u8 txnumevt; - u8 rxnumevt; +/* + * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits + */ +#define AXR(n) (1<base + offset; __raw_writel(__raw_readl(reg) | val, reg); } -static inline void mcasp_clr_bits(struct davinci_mcasp *mcasp, u32 offset, - u32 val) +static inline void mcasp_clr_bits(void __iomem *reg, u32 val) { - void __iomem *reg = mcasp->base + offset; __raw_writel((__raw_readl(reg) & ~(val)), reg); } -static inline void mcasp_mod_bits(struct davinci_mcasp *mcasp, u32 offset, - u32 val, u32 mask) +static inline void mcasp_mod_bits(void __iomem *reg, u32 val, u32 mask) { - void __iomem *reg = mcasp->base + offset; __raw_writel((__raw_readl(reg) & ~mask) | val, reg); } -static inline void mcasp_set_reg(struct davinci_mcasp *mcasp, u32 offset, - u32 val) +static inline void mcasp_set_reg(void __iomem *reg, u32 val) { - __raw_writel(val, mcasp->base + offset); + __raw_writel(val, reg); } -static inline u32 mcasp_get_reg(struct davinci_mcasp *mcasp, u32 offset) +static inline u32 mcasp_get_reg(void __iomem *reg) { - return (u32)__raw_readl(mcasp->base + offset); + return (unsigned int)__raw_readl(reg); } -static void mcasp_set_ctl_reg(struct davinci_mcasp *mcasp, u32 ctl_reg, u32 val) +static inline void mcasp_set_ctl_reg(void __iomem *regs, u32 val) { int i = 0; - mcasp_set_bits(mcasp, ctl_reg, val); + mcasp_set_bits(regs, val); /* programming GBLCTL needs to read back from GBLCTL and verfiy */ /* loop count is to avoid the lock-up */ for (i = 0; i < 1000; i++) { - if ((mcasp_get_reg(mcasp, ctl_reg) & val) == val) + if ((mcasp_get_reg(regs) & val) == val) break; } - if (i == 1000 && ((mcasp_get_reg(mcasp, ctl_reg) & val) != val)) + if (i == 1000 && ((mcasp_get_reg(regs) & val) != val)) printk(KERN_ERR "GBLCTL write error\n"); } -static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp) -{ - u32 rxfmctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); - u32 aclkxctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG); - - return !(aclkxctl & TX_ASYNC) && rxfmctl & AFSRE; -} - -static void mcasp_start_rx(struct davinci_mcasp *mcasp) +static void mcasp_start_rx(struct davinci_audio_dev *dev) { - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); - - /* - * When ASYNC == 0 the transmit and receive sections operate - * synchronously from the transmit clock and frame sync. We need to make - * sure that the TX signlas are enabled when starting reception. - */ - if (mcasp_is_synchronous(mcasp)) { - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); - } - - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR); - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXBUF_REG, 0); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXBUF_REG, 0); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); - - if (mcasp_is_synchronous(mcasp)) - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); } -static void mcasp_start_tx(struct davinci_mcasp *mcasp) +static void mcasp_start_tx(struct davinci_audio_dev *dev) { u8 offset = 0, i; u32 cnt; - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR); - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0); - - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXSMRST); - mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0); - for (i = 0; i < mcasp->num_serializer; i++) { - if (mcasp->serial_dir[i] == TX_MODE) { + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); + + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSMRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); + for (i = 0; i < dev->num_serializer; i++) { + if (dev->serial_dir[i] == TX_MODE) { offset = i; break; } @@ -180,212 +384,224 @@ static void mcasp_start_tx(struct davinci_mcasp *mcasp) /* wait for TX ready */ cnt = 0; - while (!(mcasp_get_reg(mcasp, DAVINCI_MCASP_XRSRCTL_REG(offset)) & + while (!(mcasp_get_reg(dev->base + DAVINCI_MCASP_XRSRCTL_REG(offset)) & TXSTATE) && (cnt < 100000)) cnt++; - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); } -static void davinci_mcasp_start(struct davinci_mcasp *mcasp, int stream) +static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream) { - u32 reg; - - mcasp->streams++; - if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - if (mcasp->txnumevt) { /* enable FIFO */ - reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; - mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); - mcasp_set_bits(mcasp, reg, FIFO_ENABLE); + if (dev->txnumevt) { /* enable FIFO */ + switch (dev->version) { + case MCASP_VERSION_3: + mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, + FIFO_ENABLE); + mcasp_set_bits(dev->base + MCASP_VER3_WFIFOCTL, + FIFO_ENABLE); + break; + default: + mcasp_clr_bits(dev->base + + DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); + mcasp_set_bits(dev->base + + DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); + } } - mcasp_start_tx(mcasp); + mcasp_start_tx(dev); } else { - if (mcasp->rxnumevt) { /* enable FIFO */ - reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; - mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); - mcasp_set_bits(mcasp, reg, FIFO_ENABLE); + if (dev->rxnumevt) { /* enable FIFO */ + switch (dev->version) { + case MCASP_VERSION_3: + mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, + FIFO_ENABLE); + mcasp_set_bits(dev->base + MCASP_VER3_RFIFOCTL, + FIFO_ENABLE); + break; + default: + mcasp_clr_bits(dev->base + + DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); + mcasp_set_bits(dev->base + + DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); + } } - mcasp_start_rx(mcasp); + mcasp_start_rx(dev); } } -static void mcasp_stop_rx(struct davinci_mcasp *mcasp) +static void mcasp_stop_rx(struct davinci_audio_dev *dev) { - /* - * In synchronous mode stop the TX clocks if no other stream is - * running - */ - if (mcasp_is_synchronous(mcasp) && !mcasp->streams) - mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, 0); - - mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, 0); - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); + mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, 0); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); } -static void mcasp_stop_tx(struct davinci_mcasp *mcasp) +static void mcasp_stop_tx(struct davinci_audio_dev *dev) { - u32 val = 0; - - /* - * In synchronous mode keep TX clocks running if the capture stream is - * still running. - */ - if (mcasp_is_synchronous(mcasp) && mcasp->streams) - val = TXHCLKRST | TXCLKRST | TXFSRST; - - mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, val); - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); + mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, 0); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); } -static void davinci_mcasp_stop(struct davinci_mcasp *mcasp, int stream) +static void davinci_mcasp_stop(struct davinci_audio_dev *dev, int stream) { - u32 reg; - - mcasp->streams--; - if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - if (mcasp->txnumevt) { /* disable FIFO */ - reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; - mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); + if (dev->txnumevt) { /* disable FIFO */ + switch (dev->version) { + case MCASP_VERSION_3: + mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, + FIFO_ENABLE); + break; + default: + mcasp_clr_bits(dev->base + + DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); + } } - mcasp_stop_tx(mcasp); + mcasp_stop_tx(dev); } else { - if (mcasp->rxnumevt) { /* disable FIFO */ - reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; - mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); + if (dev->rxnumevt) { /* disable FIFO */ + switch (dev->version) { + case MCASP_VERSION_3: + mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, + FIFO_ENABLE); + break; + + default: + mcasp_clr_bits(dev->base + + DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); + } } - mcasp_stop_rx(mcasp); + mcasp_stop_rx(dev); } } static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) { - struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); - int ret = 0; + struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); + void __iomem *base = dev->base; - pm_runtime_get_sync(mcasp->dev); switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_DSP_B: case SND_SOC_DAIFMT_AC97: - mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); break; default: /* configure a full-word SYNC pulse (LRCLK) */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); - mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); + mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); /* make 1st data bit occur one ACLK cycle after the frame sync */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); - mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); + mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); break; } switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { case SND_SOC_DAIFMT_CBS_CFS: /* codec is clock and frame slave */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); + mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | ACLKXDIV(7)); + mcasp_set_bits(base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(0)); + mcasp_clr_bits(base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); + mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR); - mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR); + mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, ACLKX | AFSX); + mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, AHCLKX); break; case SND_SOC_DAIFMT_CBM_CFS: /* codec is clock master and frame slave */ - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR); - mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR); + mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, + ACLKX | ACLKR); + mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, + AFSX | AFSR); break; case SND_SOC_DAIFMT_CBM_CFM: /* codec is clock and frame master */ - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); + mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); + mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, - ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR); + mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, + ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR); break; default: - ret = -EINVAL; - goto out; + return -EINVAL; } switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_IB_NF: - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break; case SND_SOC_DAIFMT_NB_IF: - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); - mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break; case SND_SOC_DAIFMT_IB_IF: - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); - mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break; case SND_SOC_DAIFMT_NB_NF: - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break; default: - ret = -EINVAL; - break; + return -EINVAL; } -out: - pm_runtime_put_sync(mcasp->dev); - return ret; + + return 0; } static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div) { - struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); + struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); switch (div_id) { case 0: /* MCLK divider */ - mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, + mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(div - 1), AHCLKXDIV_MASK); - mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, + mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRDIV(div - 1), AHCLKRDIV_MASK); break; case 1: /* BCLK divider */ - mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, + mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXDIV(div - 1), ACLKXDIV_MASK); - mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, + mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRDIV(div - 1), ACLKRDIV_MASK); break; case 2: /* BCLK/LRCLK ratio */ - mcasp->bclk_lrclk_ratio = div; + dev->bclk_lrclk_ratio = div; break; default: @@ -398,22 +614,22 @@ static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir) { - struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); + struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); if (dir == SND_SOC_CLOCK_OUT) { - mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); - mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX); + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); + mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX); } else { - mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX); } return 0; } -static int davinci_config_channel_size(struct davinci_mcasp *mcasp, +static int davinci_config_channel_size(struct davinci_audio_dev *dev, int word_length) { u32 fmt; @@ -439,68 +655,72 @@ static int davinci_config_channel_size(struct davinci_mcasp *mcasp, * both left and right channels), so it has to be divided by number of * tdm-slots (for I2S - divided by 2). */ - if (mcasp->bclk_lrclk_ratio) - word_length = mcasp->bclk_lrclk_ratio / mcasp->tdm_slots; + if (dev->bclk_lrclk_ratio) + word_length = dev->bclk_lrclk_ratio / dev->tdm_slots; /* mapping of the XSSZ bit-field as described in the datasheet */ fmt = (word_length >> 1) - 1; - if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { - mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, RXSSZ(fmt), - RXSSZ(0x0F)); - mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSSZ(fmt), - TXSSZ(0x0F)); - mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(tx_rotate), - TXROT(7)); - mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, RXROT(rx_rotate), - RXROT(7)); - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXMASK_REG, mask); + if (dev->op_mode != DAVINCI_MCASP_DIT_MODE) { + mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, + RXSSZ(fmt), RXSSZ(0x0F)); + mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, + TXSSZ(fmt), TXSSZ(0x0F)); + mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, + TXROT(tx_rotate), TXROT(7)); + mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, + RXROT(rx_rotate), RXROT(7)); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXMASK_REG, + mask); } - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, mask); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, mask); return 0; } -static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream, +static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream, int channels) { int i; u8 tx_ser = 0; u8 rx_ser = 0; u8 ser; - u8 slots = mcasp->tdm_slots; + u8 slots = dev->tdm_slots; u8 max_active_serializers = (channels + slots - 1) / slots; - u32 reg; + /* Default configuration */ - if (mcasp->version != MCASP_VERSION_4) - mcasp_set_bits(mcasp, DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); + mcasp_set_bits(dev->base + DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); /* All PINS as McASP */ - mcasp_set_reg(mcasp, DAVINCI_MCASP_PFUNC_REG, 0x00000000); + mcasp_set_reg(dev->base + DAVINCI_MCASP_PFUNC_REG, 0x00000000); if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, + TXDATADMADIS); } else { - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_REVTCTL_REG, RXDATADMADIS); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_REVTCTL_REG, + RXDATADMADIS); } - for (i = 0; i < mcasp->num_serializer; i++) { - mcasp_set_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), - mcasp->serial_dir[i]); - if (mcasp->serial_dir[i] == TX_MODE && + for (i = 0; i < dev->num_serializer; i++) { + mcasp_set_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i), + dev->serial_dir[i]); + if (dev->serial_dir[i] == TX_MODE && tx_ser < max_active_serializers) { - mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AXR(i)); + mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, + AXR(i)); tx_ser++; - } else if (mcasp->serial_dir[i] == RX_MODE && + } else if (dev->serial_dir[i] == RX_MODE && rx_ser < max_active_serializers) { - mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AXR(i)); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, + AXR(i)); rx_ser++; } else { - mcasp_mod_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), - SRMOD_INACTIVE, SRMOD_MASK); + mcasp_mod_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i), + SRMOD_INACTIVE, SRMOD_MASK); } } @@ -510,130 +730,154 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream, ser = rx_ser; if (ser < max_active_serializers) { - dev_warn(mcasp->dev, "stream has more channels (%d) than are " + dev_warn(dev->dev, "stream has more channels (%d) than are " "enabled in mcasp (%d)\n", channels, ser * slots); return -EINVAL; } - if (mcasp->txnumevt && stream == SNDRV_PCM_STREAM_PLAYBACK) { - if (mcasp->txnumevt * tx_ser > 64) - mcasp->txnumevt = 1; + if (dev->txnumevt && stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (dev->txnumevt * tx_ser > 64) + dev->txnumevt = 1; - reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; - mcasp_mod_bits(mcasp, reg, tx_ser, NUMDMA_MASK); - mcasp_mod_bits(mcasp, reg, ((mcasp->txnumevt * tx_ser) << 8), - NUMEVT_MASK); + switch (dev->version) { + case MCASP_VERSION_3: + mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, tx_ser, + NUMDMA_MASK); + mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, + ((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK); + break; + default: + mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, + tx_ser, NUMDMA_MASK); + mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, + ((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK); + } } - if (mcasp->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) { - if (mcasp->rxnumevt * rx_ser > 64) - mcasp->rxnumevt = 1; - - reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; - mcasp_mod_bits(mcasp, reg, rx_ser, NUMDMA_MASK); - mcasp_mod_bits(mcasp, reg, ((mcasp->rxnumevt * rx_ser) << 8), - NUMEVT_MASK); + if (dev->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) { + if (dev->rxnumevt * rx_ser > 64) + dev->rxnumevt = 1; + switch (dev->version) { + case MCASP_VERSION_3: + mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, rx_ser, + NUMDMA_MASK); + mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, + ((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK); + break; + default: + mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, + rx_ser, NUMDMA_MASK); + mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, + ((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK); + } } return 0; } -static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream) +static void davinci_hw_param(struct davinci_audio_dev *dev, int stream) { int i, active_slots; u32 mask = 0; - u32 busel = 0; - - if ((mcasp->tdm_slots < 2) || (mcasp->tdm_slots > 32)) { - dev_err(mcasp->dev, "tdm slot %d not supported\n", - mcasp->tdm_slots); - return -EINVAL; - } - active_slots = (mcasp->tdm_slots > 31) ? 32 : mcasp->tdm_slots; + active_slots = (dev->tdm_slots > 31) ? 32 : dev->tdm_slots; for (i = 0; i < active_slots; i++) mask |= (1 << i); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); - - if (!mcasp->dat_port) - busel = TXSEL; - - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, mask); - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, busel | TXORD); - mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, - FSXMOD(mcasp->tdm_slots), FSXMOD(0x1FF)); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXTDM_REG, mask); - mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD); - mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, - FSRMOD(mcasp->tdm_slots), FSRMOD(0x1FF)); - - return 0; + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* bit stream is MSB first with no delay */ + /* DSP_B mode */ + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXORD); + + if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) + mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, + FSXMOD(dev->tdm_slots), FSXMOD(0x1FF)); + else + printk(KERN_ERR "playback tdm slot %d not supported\n", + dev->tdm_slots); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); + } else { + /* bit stream is MSB first with no delay */ + /* DSP_B mode */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXORD); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask); + + if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) + mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, + FSRMOD(dev->tdm_slots), FSRMOD(0x1FF)); + else + printk(KERN_ERR "capture tdm slot %d not supported\n", + dev->tdm_slots); + } } /* S/PDIF */ -static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp) +static void davinci_hw_dit_param(struct davinci_audio_dev *dev) { + /* Set the PDIR for Serialiser as output */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AFSX); + + /* TXMASK for 24 bits */ + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, 0x00FFFFFF); + /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 and LSB first */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(6) | TXSSZ(15)); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, + TXROT(6) | TXSSZ(15)); /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */ - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE | FSXMOD(0x180)); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXFMCTL_REG, + AFSXE | FSXMOD(0x180)); /* Set the TX tdm : for all the slots */ - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); /* Set the TX clock controls : div = 1 and internal */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | TX_ASYNC); + mcasp_set_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, + ACLKXE | TX_ASYNC); - mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); /* Only 44100 and 48000 are valid, both have the same setting */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); /* Enable the DIT */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN); - - return 0; + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXDITCTL_REG, DITEN); } static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *cpu_dai) { - struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); + struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); struct davinci_pcm_dma_params *dma_params = - &mcasp->dma_params[substream->stream]; - struct snd_dmaengine_dai_dma_data *dma_data = - &mcasp->dma_data[substream->stream]; + &dev->dma_params[substream->stream]; int word_length; u8 fifo_level; - u8 slots = mcasp->tdm_slots; + u8 slots = dev->tdm_slots; u8 active_serializers; int channels; - int ret; struct snd_interval *pcm_channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); channels = pcm_channels->min; active_serializers = (channels + slots - 1) / slots; - if (mcasp_common_hw_param(mcasp, substream->stream, channels) == -EINVAL) + if (davinci_hw_common_param(dev, substream->stream, channels) == -EINVAL) return -EINVAL; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - fifo_level = mcasp->txnumevt * active_serializers; + fifo_level = dev->txnumevt * active_serializers; else - fifo_level = mcasp->rxnumevt * active_serializers; + fifo_level = dev->rxnumevt * active_serializers; - if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) - ret = mcasp_dit_hw_param(mcasp); + if (dev->op_mode == DAVINCI_MCASP_DIT_MODE) + davinci_hw_dit_param(dev); else - ret = mcasp_i2s_hw_param(mcasp, substream->stream); - - if (ret) - return ret; + davinci_hw_param(dev, substream->stream); switch (params_format(params)) { case SNDRV_PCM_FORMAT_U8: @@ -667,15 +911,13 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - if (mcasp->version == MCASP_VERSION_2 && !fifo_level) + if (dev->version == MCASP_VERSION_2 && !fifo_level) dma_params->acnt = 4; else dma_params->acnt = dma_params->data_type; dma_params->fifo_level = fifo_level; - dma_data->maxburst = fifo_level; - - davinci_config_channel_size(mcasp, word_length); + davinci_config_channel_size(dev, word_length); return 0; } @@ -683,19 +925,29 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, static int davinci_mcasp_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *cpu_dai) { - struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); + struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); int ret = 0; switch (cmd) { case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - davinci_mcasp_start(mcasp, substream->stream); + ret = pm_runtime_get_sync(dev->dev); + if (IS_ERR_VALUE(ret)) + dev_err(dev->dev, "pm_runtime_get_sync() failed\n"); + davinci_mcasp_start(dev, substream->stream); break; + case SNDRV_PCM_TRIGGER_SUSPEND: + davinci_mcasp_stop(dev, substream->stream); + ret = pm_runtime_put_sync(dev->dev); + if (IS_ERR_VALUE(ret)) + dev_err(dev->dev, "pm_runtime_put_sync() failed\n"); + break; + case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - davinci_mcasp_stop(mcasp, substream->stream); + davinci_mcasp_stop(dev, substream->stream); break; default: @@ -708,14 +960,9 @@ static int davinci_mcasp_trigger(struct snd_pcm_substream *substream, static int davinci_mcasp_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); - - if (mcasp->version == MCASP_VERSION_4) - snd_soc_dai_set_dma_data(dai, substream, - &mcasp->dma_data[substream->stream]); - else - snd_soc_dai_set_dma_data(dai, substream, mcasp->dma_params); + struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); + snd_soc_dai_set_dma_data(dai, substream, dev->dma_params); return 0; } @@ -728,8 +975,6 @@ static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = { .set_sysclk = davinci_mcasp_set_sysclk, }; -#define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_192000 - #define DAVINCI_MCASP_PCM_FMTS (SNDRV_PCM_FMTBIT_S8 | \ SNDRV_PCM_FMTBIT_U8 | \ SNDRV_PCM_FMTBIT_S16_LE | \ @@ -746,13 +991,13 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = { .name = "davinci-mcasp.0", .playback = { .channels_min = 2, - .channels_max = 32 * 16, + .channels_max = 2, .rates = DAVINCI_MCASP_RATES, .formats = DAVINCI_MCASP_PCM_FMTS, }, .capture = { .channels_min = 2, - .channels_max = 32 * 16, + .channels_max = 2, .rates = DAVINCI_MCASP_RATES, .formats = DAVINCI_MCASP_PCM_FMTS, }, @@ -760,7 +1005,7 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = { }, { - .name = "davinci-mcasp.1", + "davinci-mcasp.1", .playback = { .channels_min = 1, .channels_max = 384, @@ -791,20 +1036,13 @@ static struct snd_platform_data da830_mcasp_pdata = { .version = MCASP_VERSION_2, }; -static struct snd_platform_data am33xx_mcasp_pdata = { +static struct snd_platform_data omap2_mcasp_pdata = { .tx_dma_offset = 0, .rx_dma_offset = 0, .asp_chan_q = EVENTQ_0, .version = MCASP_VERSION_3, }; -static struct snd_platform_data dra7_mcasp_pdata = { - .tx_dma_offset = 0x200, - .rx_dma_offset = 0x284, - .asp_chan_q = EVENTQ_0, - .version = MCASP_VERSION_4, -}; - static const struct of_device_id mcasp_dt_ids[] = { { .compatible = "ti,dm646x-mcasp-audio", @@ -816,56 +1054,12 @@ static const struct of_device_id mcasp_dt_ids[] = { }, { .compatible = "ti,am33xx-mcasp-audio", - .data = &am33xx_mcasp_pdata, - }, - { - .compatible = "ti,dra7-mcasp-audio", - .data = &dra7_mcasp_pdata, + .data = &omap2_mcasp_pdata, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mcasp_dt_ids); -static int mcasp_reparent_fck(struct platform_device *pdev) -{ - struct device_node *node = pdev->dev.of_node; - struct clk *gfclk, *parent_clk; - const char *parent_name; - int ret; - - if (!node) - return 0; - - parent_name = of_get_property(node, "fck_parent", NULL); - if (!parent_name) - return 0; - - gfclk = clk_get(&pdev->dev, "fck"); - if (IS_ERR(gfclk)) { - dev_err(&pdev->dev, "failed to get fck\n"); - return PTR_ERR(gfclk); - } - - parent_clk = clk_get(NULL, parent_name); - if (IS_ERR(parent_clk)) { - dev_err(&pdev->dev, "failed to get parent clock\n"); - ret = PTR_ERR(parent_clk); - goto err1; - } - - ret = clk_set_parent(gfclk, parent_clk); - if (ret) { - dev_err(&pdev->dev, "failed to reparent fck\n"); - goto err2; - } - -err2: - clk_put(parent_clk); -err1: - clk_put(gfclk); - return ret; -} - static struct snd_platform_data *davinci_mcasp_set_pdata_from_of( struct platform_device *pdev) { @@ -978,7 +1172,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev) struct davinci_pcm_dma_params *dma_data; struct resource *mem, *ioarea, *res, *dat; struct snd_platform_data *pdata; - struct davinci_mcasp *mcasp; + struct davinci_audio_dev *dev; int ret; if (!pdev->dev.platform_data && !pdev->dev.of_node) { @@ -986,9 +1180,9 @@ static int davinci_mcasp_probe(struct platform_device *pdev) return -EINVAL; } - mcasp = devm_kzalloc(&pdev->dev, sizeof(struct davinci_mcasp), + dev = devm_kzalloc(&pdev->dev, sizeof(struct davinci_audio_dev), GFP_KERNEL); - if (!mcasp) + if (!dev) return -ENOMEM; pdata = davinci_mcasp_set_pdata_from_of(pdev); @@ -999,7 +1193,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev) mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); if (!mem) { - dev_warn(mcasp->dev, + dev_warn(dev->dev, "\"mpu\" mem resource not found, using index 0\n"); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!mem) { @@ -1023,39 +1217,32 @@ static int davinci_mcasp_probe(struct platform_device *pdev) return ret; } - mcasp->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); - if (!mcasp->base) { + dev->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); + if (!dev->base) { dev_err(&pdev->dev, "ioremap failed\n"); ret = -ENOMEM; goto err_release_clk; } - mcasp->op_mode = pdata->op_mode; - mcasp->tdm_slots = pdata->tdm_slots; - mcasp->num_serializer = pdata->num_serializer; - mcasp->serial_dir = pdata->serial_dir; - mcasp->version = pdata->version; - mcasp->txnumevt = pdata->txnumevt; - mcasp->rxnumevt = pdata->rxnumevt; - - mcasp->dev = &pdev->dev; + dev->op_mode = pdata->op_mode; + dev->tdm_slots = pdata->tdm_slots; + dev->num_serializer = pdata->num_serializer; + dev->serial_dir = pdata->serial_dir; + dev->version = pdata->version; + dev->txnumevt = pdata->txnumevt; + dev->rxnumevt = pdata->rxnumevt; + dev->dev = &pdev->dev; dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); - if (dat) - mcasp->dat_port = true; + if (!dat) + dat = mem; - dma_data = &mcasp->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; + dma_data = &dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; dma_data->asp_chan_q = pdata->asp_chan_q; dma_data->ram_chan_q = pdata->ram_chan_q; dma_data->sram_pool = pdata->sram_pool; dma_data->sram_size = pdata->sram_size_playback; - if (dat) - dma_data->dma_addr = dat->start; - else - dma_data->dma_addr = mem->start + pdata->tx_dma_offset; - - /* Unconditional dmaengine stuff */ - mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = dma_data->dma_addr; + dma_data->dma_addr = dat->start + pdata->tx_dma_offset; res = platform_get_resource(pdev, IORESOURCE_DMA, 0); if (res) @@ -1063,26 +1250,12 @@ static int davinci_mcasp_probe(struct platform_device *pdev) else dma_data->channel = pdata->tx_dma_channel; - dma_data = &mcasp->dma_params[SNDRV_PCM_STREAM_CAPTURE]; + dma_data = &dev->dma_params[SNDRV_PCM_STREAM_CAPTURE]; dma_data->asp_chan_q = pdata->asp_chan_q; dma_data->ram_chan_q = pdata->ram_chan_q; dma_data->sram_pool = pdata->sram_pool; dma_data->sram_size = pdata->sram_size_capture; - if (dat) - dma_data->dma_addr = dat->start; - else - dma_data->dma_addr = mem->start + pdata->rx_dma_offset; - - /* Unconditional dmaengine stuff */ - mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = dma_data->dma_addr; - - if (mcasp->version < MCASP_VERSION_3) { - mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE; - /* dma_data->dma_addr is pointing to the data port address */ - mcasp->dat_port = true; - } else { - mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE; - } + dma_data->dma_addr = dat->start + pdata->rx_dma_offset; res = platform_get_resource(pdev, IORESOURCE_DMA, 1); if (res) @@ -1090,26 +1263,17 @@ static int davinci_mcasp_probe(struct platform_device *pdev) else dma_data->channel = pdata->rx_dma_channel; - /* Unconditional dmaengine stuff */ - mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data = "tx"; - mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE].filter_data = "rx"; - - dev_set_drvdata(&pdev->dev, mcasp); - - mcasp_reparent_fck(pdev); - + dev_set_drvdata(&pdev->dev, dev); ret = snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, &davinci_mcasp_dai[pdata->op_mode], 1); if (ret != 0) goto err_release_clk; - if (mcasp->version != MCASP_VERSION_4) { - ret = davinci_soc_platform_register(&pdev->dev); - if (ret) { - dev_err(&pdev->dev, "register PCM failed: %d\n", ret); - goto err_unregister_component; - } + ret = davinci_soc_platform_register(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "register PCM failed: %d\n", ret); + goto err_unregister_component; } return 0; @@ -1124,11 +1288,9 @@ err_release_clk: static int davinci_mcasp_remove(struct platform_device *pdev) { - struct davinci_mcasp *mcasp = dev_get_drvdata(&pdev->dev); snd_soc_unregister_component(&pdev->dev); - if (mcasp->version != MCASP_VERSION_4) - davinci_soc_platform_unregister(&pdev->dev); + davinci_soc_platform_unregister(&pdev->dev); pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); @@ -1139,30 +1301,32 @@ static int davinci_mcasp_remove(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int davinci_mcasp_suspend(struct device *dev) { - struct davinci_mcasp *mcasp = dev_get_drvdata(dev); + struct davinci_audio_dev *a = dev_get_drvdata(dev); + void __iomem *base = a->base; - mcasp->context.txfmtctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG); - mcasp->context.rxfmtctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); - mcasp->context.txfmt = mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMT_REG); - mcasp->context.rxfmt = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMT_REG); - mcasp->context.aclkxctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG); - mcasp->context.aclkrctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKRCTL_REG); - mcasp->context.pdir = mcasp_get_reg(mcasp, DAVINCI_MCASP_PDIR_REG); + a->context.txfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_TXFMCTL_REG); + a->context.rxfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_RXFMCTL_REG); + a->context.txfmt = mcasp_get_reg(base + DAVINCI_MCASP_TXFMT_REG); + a->context.rxfmt = mcasp_get_reg(base + DAVINCI_MCASP_RXFMT_REG); + a->context.aclkxctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKXCTL_REG); + a->context.aclkrctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKRCTL_REG); + a->context.pdir = mcasp_get_reg(base + DAVINCI_MCASP_PDIR_REG); return 0; } static int davinci_mcasp_resume(struct device *dev) { - struct davinci_mcasp *mcasp = dev_get_drvdata(dev); - - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG, mcasp->context.txfmtctl); - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG, mcasp->context.rxfmtctl); - mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMT_REG, mcasp->context.txfmt); - mcasp_set_reg(mcasp, DAVINCI_MCASP_RXFMT_REG, mcasp->context.rxfmt); - mcasp_set_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, mcasp->context.aclkxctl); - mcasp_set_reg(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, mcasp->context.aclkrctl); - mcasp_set_reg(mcasp, DAVINCI_MCASP_PDIR_REG, mcasp->context.pdir); + struct davinci_audio_dev *a = dev_get_drvdata(dev); + void __iomem *base = a->base; + + mcasp_set_reg(base + DAVINCI_MCASP_TXFMCTL_REG, a->context.txfmtctl); + mcasp_set_reg(base + DAVINCI_MCASP_RXFMCTL_REG, a->context.rxfmtctl); + mcasp_set_reg(base + DAVINCI_MCASP_TXFMT_REG, a->context.txfmt); + mcasp_set_reg(base + DAVINCI_MCASP_RXFMT_REG, a->context.rxfmt); + mcasp_set_reg(base + DAVINCI_MCASP_ACLKXCTL_REG, a->context.aclkxctl); + mcasp_set_reg(base + DAVINCI_MCASP_ACLKRCTL_REG, a->context.aclkrctl); + mcasp_set_reg(base + DAVINCI_MCASP_PDIR_REG, a->context.pdir); return 0; } diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h index 8fed757..a2e27e1 100644 --- a/sound/soc/davinci/davinci-mcasp.h +++ b/sound/soc/davinci/davinci-mcasp.h @@ -18,271 +18,43 @@ #ifndef DAVINCI_MCASP_H #define DAVINCI_MCASP_H -/* - * McASP register definitions - */ -#define DAVINCI_MCASP_PID_REG 0x00 -#define DAVINCI_MCASP_PWREMUMGT_REG 0x04 - -#define DAVINCI_MCASP_PFUNC_REG 0x10 -#define DAVINCI_MCASP_PDIR_REG 0x14 -#define DAVINCI_MCASP_PDOUT_REG 0x18 -#define DAVINCI_MCASP_PDSET_REG 0x1c - -#define DAVINCI_MCASP_PDCLR_REG 0x20 - -#define DAVINCI_MCASP_TLGC_REG 0x30 -#define DAVINCI_MCASP_TLMR_REG 0x34 - -#define DAVINCI_MCASP_GBLCTL_REG 0x44 -#define DAVINCI_MCASP_AMUTE_REG 0x48 -#define DAVINCI_MCASP_LBCTL_REG 0x4c - -#define DAVINCI_MCASP_TXDITCTL_REG 0x50 - -#define DAVINCI_MCASP_GBLCTLR_REG 0x60 -#define DAVINCI_MCASP_RXMASK_REG 0x64 -#define DAVINCI_MCASP_RXFMT_REG 0x68 -#define DAVINCI_MCASP_RXFMCTL_REG 0x6c - -#define DAVINCI_MCASP_ACLKRCTL_REG 0x70 -#define DAVINCI_MCASP_AHCLKRCTL_REG 0x74 -#define DAVINCI_MCASP_RXTDM_REG 0x78 -#define DAVINCI_MCASP_EVTCTLR_REG 0x7c - -#define DAVINCI_MCASP_RXSTAT_REG 0x80 -#define DAVINCI_MCASP_RXTDMSLOT_REG 0x84 -#define DAVINCI_MCASP_RXCLKCHK_REG 0x88 -#define DAVINCI_MCASP_REVTCTL_REG 0x8c - -#define DAVINCI_MCASP_GBLCTLX_REG 0xa0 -#define DAVINCI_MCASP_TXMASK_REG 0xa4 -#define DAVINCI_MCASP_TXFMT_REG 0xa8 -#define DAVINCI_MCASP_TXFMCTL_REG 0xac - -#define DAVINCI_MCASP_ACLKXCTL_REG 0xb0 -#define DAVINCI_MCASP_AHCLKXCTL_REG 0xb4 -#define DAVINCI_MCASP_TXTDM_REG 0xb8 -#define DAVINCI_MCASP_EVTCTLX_REG 0xbc - -#define DAVINCI_MCASP_TXSTAT_REG 0xc0 -#define DAVINCI_MCASP_TXTDMSLOT_REG 0xc4 -#define DAVINCI_MCASP_TXCLKCHK_REG 0xc8 -#define DAVINCI_MCASP_XEVTCTL_REG 0xcc - -/* Left(even TDM Slot) Channel Status Register File */ -#define DAVINCI_MCASP_DITCSRA_REG 0x100 -/* Right(odd TDM slot) Channel Status Register File */ -#define DAVINCI_MCASP_DITCSRB_REG 0x118 -/* Left(even TDM slot) User Data Register File */ -#define DAVINCI_MCASP_DITUDRA_REG 0x130 -/* Right(odd TDM Slot) User Data Register File */ -#define DAVINCI_MCASP_DITUDRB_REG 0x148 - -/* Serializer n Control Register */ -#define DAVINCI_MCASP_XRSRCTL_BASE_REG 0x180 -#define DAVINCI_MCASP_XRSRCTL_REG(n) (DAVINCI_MCASP_XRSRCTL_BASE_REG + \ - (n << 2)) - -/* Transmit Buffer for Serializer n */ -#define DAVINCI_MCASP_TXBUF_REG 0x200 -/* Receive Buffer for Serializer n */ -#define DAVINCI_MCASP_RXBUF_REG 0x280 - -/* McASP FIFO Registers */ -#define DAVINCI_MCASP_V2_AFIFO_BASE (0x1010) -#define DAVINCI_MCASP_V3_AFIFO_BASE (0x1000) - -/* FIFO register offsets from AFIFO base */ -#define MCASP_WFIFOCTL_OFFSET (0x0) -#define MCASP_WFIFOSTS_OFFSET (0x4) -#define MCASP_RFIFOCTL_OFFSET (0x8) -#define MCASP_RFIFOSTS_OFFSET (0xc) - -/* - * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management - * Register Bits - */ -#define MCASP_FREE BIT(0) -#define MCASP_SOFT BIT(1) - -/* - * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits - */ -#define AXR(n) (1< +#include + +#include "davinci-pcm.h" + +#define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_192000 +#define DAVINCI_MCASP_I2S_DAI 0 +#define DAVINCI_MCASP_DIT_DAI 1 + +struct davinci_audio_dev { + struct davinci_pcm_dma_params dma_params[2]; + void __iomem *base; + struct device *dev; + + /* McASP specific data */ + int tdm_slots; + u8 op_mode; + u8 num_serializer; + u8 *serial_dir; + u8 version; + u16 bclk_lrclk_ratio; + + /* McASP FIFO related */ + u8 txnumevt; + u8 rxnumevt; + +#ifdef CONFIG_PM_SLEEP + struct { + u32 txfmtctl; + u32 rxfmtctl; + u32 txfmt; + u32 rxfmt; + u32 aclkxctl; + u32 aclkrctl; + u32 pdir; + } context; +#endif +}; #endif /* DAVINCI_MCASP_H */ diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c index 14145cd..11c68ae 100644 --- a/sound/soc/davinci/davinci-pcm.c +++ b/sound/soc/davinci/davinci-pcm.c @@ -46,11 +46,33 @@ static void print_buf_info(int slot, char *name) } #endif +#define DAVINCI_PCM_FMTBITS (\ + SNDRV_PCM_FMTBIT_S8 |\ + SNDRV_PCM_FMTBIT_U8 |\ + SNDRV_PCM_FMTBIT_S16_LE |\ + SNDRV_PCM_FMTBIT_S16_BE |\ + SNDRV_PCM_FMTBIT_U16_LE |\ + SNDRV_PCM_FMTBIT_U16_BE |\ + SNDRV_PCM_FMTBIT_S24_LE |\ + SNDRV_PCM_FMTBIT_S24_BE |\ + SNDRV_PCM_FMTBIT_U24_LE |\ + SNDRV_PCM_FMTBIT_U24_BE |\ + SNDRV_PCM_FMTBIT_S32_LE |\ + SNDRV_PCM_FMTBIT_S32_BE |\ + SNDRV_PCM_FMTBIT_U32_LE |\ + SNDRV_PCM_FMTBIT_U32_BE) + static struct snd_pcm_hardware pcm_hardware_playback = { .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME| SNDRV_PCM_INFO_BATCH), + .formats = DAVINCI_PCM_FMTBITS, + .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 2, + .channels_max = 384, .buffer_bytes_max = 128 * 1024, .period_bytes_min = 32, .period_bytes_max = 8 * 1024, @@ -64,6 +86,12 @@ static struct snd_pcm_hardware pcm_hardware_capture = { SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_BATCH), + .formats = DAVINCI_PCM_FMTBITS, + .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 2, + .channels_max = 384, .buffer_bytes_max = 128 * 1024, .period_bytes_min = 32, .period_bytes_max = 8 * 1024, @@ -173,7 +201,7 @@ static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream) src = dma_pos; dst = prtd->params->dma_addr; src_bidx = data_type; - dst_bidx = 4; + dst_bidx = 0; src_cidx = data_type * fifo_level; dst_cidx = 0; } else { -- 2.3.5 ./0001-After-RCN-Patches.patch0000664000175000017500000007611212620330462016107 0ustar nielsenrnielsenrFrom 1532c723fa54caedc130c8e2077e8e73f1af57fd Mon Sep 17 00:00:00 2001 From: Tiffy Build Server Date: Fri, 10 Apr 2015 09:44:15 +0200 Subject: [PATCH 01/21] After-RCN-Patches --- .gitignore | 3 + arch/arm/boot/dts/am335x-bone-common.dtsi | 190 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/am335x-boneblack.dts | 31 +++++ arch/arm/boot/dts/am33xx.dtsi | 8 +- arch/arm/kernel/setup.c | 9 ++ arch/arm/mach-omap2/omap-iommu.c | 5 + arch/arm/mach-omap2/pdata-quirks.c | 22 ++++ build_modules.sh | 19 +++ drivers/gpu/drm/drm_fb_cma_helper.c | 10 +- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 70 ++++++++++- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 5 + drivers/pinctrl/pinctrl-single.c | 12 +- drivers/usb/musb/musb_cppi41.c | 67 ++++++++++- drivers/usb/musb/musb_host.c | 29 ++++- include/linux/platform_data/gfx-sgx.h | 22 ++++ patch.sh | 81 +++++++++++++ scripts/package/builddeb | 31 +++-- 17 files changed, 593 insertions(+), 21 deletions(-) create mode 100644 build_modules.sh create mode 100644 include/linux/platform_data/gfx-sgx.h create mode 100644 patch.sh diff --git a/.gitignore b/.gitignore index 42fa0d5..9219c20 100644 --- a/.gitignore +++ b/.gitignore @@ -95,3 +95,6 @@ x509.genkey # Kconfig presets all.config + +deploy + diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index b3eff40..3d4bdf1 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -84,6 +84,13 @@ >; }; + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + 0x178 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_ctsn.i2c2_sda */ + 0x17c 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_rtsn.i2c2_scl */ + >; + }; + uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ @@ -91,6 +98,34 @@ >; }; + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ + 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + 0x150 0x21 /* spi0_sclk.uart2_rxd | MODE1 */ + 0x154 0x01 /* spi0_d0.uart2_txd | MODE1 */ + >; + }; + + uart4_pins: pinmux_uart4_pins { + pinctrl-single,pins = < + 0x070 0x26 /* gpmc_wait0.uart4_rxd | MODE6 */ + 0x074 0x06 /* gpmc_wpn.uart4_txd | MODE6 */ + >; + }; + + uart5_pins: pinmux_uart5_pins { + pinctrl-single,pins = < + 0x0C4 0x24 /* lcd_data9.uart5_rxd | MODE4 */ + 0x0C0 0x04 /* lcd_data8.uart5_txd | MODE4 */ + >; + }; + clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ @@ -171,6 +206,33 @@ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ >; }; + + spi0_pins: pinmux_spi0_pins { + pinctrl-single,pins = < + 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */ + 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */ + 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ + 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ + >; + }; + + ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 { + pinctrl-single,pins = < + 0x048 0x6 /* P9_14 (ZCZ ball U14) | MODE 6 */ + >; + }; + + ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 { + pinctrl-single,pins = < + 0x04c 0x6 /* P9_16 (ZCZ ball T14) | MODE 6 */ + >; + }; + + ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 { + pinctrl-single,pins = < + 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */ + >; + }; }; &uart0 { @@ -180,6 +242,13 @@ status = "okay"; }; +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + + status = "okay"; +}; + &usb { status = "okay"; @@ -221,6 +290,88 @@ reg = <0x24>; }; + baseboard_eeprom: baseboard_eeprom@50 { + compatible = "at,24c256"; + reg = <0x50>; + }; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + + clock-frequency = <100000>; + + cape_eeprom0: cape_eeprom0@54 { + compatible = "at,24c256"; + reg = <0x54>; + }; + + cape_eeprom1: cape_eeprom1@55 { + compatible = "at,24c256"; + reg = <0x55>; + }; + + cape_eeprom2: cape_eeprom2@56 { + compatible = "at,24c256"; + reg = <0x56>; + }; + + cape_eeprom3: cape_eeprom3@57 { + compatible = "at,24c256"; + reg = <0x57>; + }; +}; + +&epwmss0 { + pinctrl-names = "default"; + pinctrl-0 = <&ecap0_pin_p9_42>; + status = "okay"; + + ecap@48300100 { + status = "okay"; + }; +}; + +&epwmss1 { + pinctrl-names = "default"; + pinctrl-0 = < + &ehrpwm1_pin_p9_14 + &ehrpwm1_pin_p9_16 + >; + + status = "okay"; + + ehrpwm@48302200 { + status = "okay"; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + status = "okay"; + + spidev0: spi@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <16000000>; + spi-cpha; + }; + + spidev1: spi@1 { + compatible = "spidev"; + reg = <1>; + spi-max-frequency = <16000000>; + }; +}; + +&tscadc { + status = "okay"; + adc { + ti,adc-channels = <4 5 6>; + }; }; /include/ "tps65217.dtsi" @@ -298,3 +449,42 @@ cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; cd-inverted; }; + +/ { + ocp { + //FIXME: these pwm's still need work, this guild isn't working.. + //http://elinux.org/EBC_Exercise_13_Pulse_Width_Modulation + pwm_test_P9_14@0 { + compatible = "pwm_test"; + pwms = <&ehrpwm1 0 500000 1>; + pwm-names = "PWM_P9_14"; + pinctrl-names = "default"; + pinctrl-0 = <&ehrpwm1_pin_p9_14>; + enabled = <1>; + duty = <0>; + status = "okay"; + }; + + pwm_test_P9_16@0 { + compatible = "pwm_test"; + pwms = <&ehrpwm1 0 500000 1>; + pwm-names = "PWM_P9_16"; + pinctrl-names = "default"; + pinctrl-0 = <&ehrpwm1_pin_p9_16>; + enabled = <1>; + duty = <0>; + status = "okay"; + }; + + pwm_test_P9_42 { + compatible = "pwm_test"; + pwms = <&ecap0 0 500000 1>; + pwm-names = "PWM_P9_42"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap0_pin_p9_42>; + enabled = <1>; + duty = <0>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 6b71ad9..f213ccd 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -67,6 +67,24 @@ }; / { + cpus { + cpu@0 { + cpu0-supply = <&dcdc2_reg>; + /* + * To consider voltage drop between PMIC and SoC, + * tolerance value is reduced to 2% from 4% and + * voltage value is increased as a precaution. + */ + operating-points = < + /* kHz uV */ + 1000000 1325000 + 800000 1300000 + 600000 1112000 + 300000 969000 + >; + }; + }; + hdmi { compatible = "ti,tilcdc,slave"; i2c = <&i2c0>; @@ -74,5 +92,18 @@ pinctrl-0 = <&nxp_hdmi_bonelt_pins>; pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; status = "okay"; + + panel-info { + bpp = <16>; + ac-bias = <255>; + ac-bias-intrpt = <0>; + dma-burst-sz = <16>; + fdd = <16>; + sync-edge = <1>; + sync-ctrl = <1>; + raster-order = <0>; + fifo-th = <0>; + invert-pxl-clk; + }; }; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index ab01d0f..37e89dd 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -105,7 +105,6 @@ prcm: prcm@44e00000 { compatible = "ti,am3-prcm"; reg = <0x44e00000 0x4000>; - prcm_clocks: clocks { #address-cells = <1>; #size-cells = <0>; @@ -818,6 +817,13 @@ reg = <0x48310000 0x2000>; interrupts = <111>; }; + + sgx@0x56000000 { + compatible = "ti,sgx"; + ti,hwmods = "gfx"; + reg = <0x56000000 0x1000000>; + interrupts = <37>; + }; }; }; diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index aab70f6..63b310c 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -1089,3 +1089,12 @@ const struct seq_operations cpuinfo_op = { .stop = c_stop, .show = c_show }; + +/* export the cache management functions */ +#ifndef MULTI_CACHE + +EXPORT_SYMBOL(__glue(_CACHE,_dma_map_area)); +EXPORT_SYMBOL(__glue(_CACHE,_dma_unmap_area)); +EXPORT_SYMBOL(__glue(_CACHE,_dma_flush_range)); + +#endif diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index f6daae8..f1fab56 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c @@ -10,6 +10,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include @@ -58,6 +59,10 @@ static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused) static int __init omap_iommu_init(void) { + /* If dtb is there, the devices will be created dynamically */ + if (of_have_populated_dt()) + return -ENODEV; + return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL); } /* must be ready before omap3isp is probed */ diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index c33e07e..6bceeb2 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -16,6 +16,8 @@ #include #include +#include +#include #include "am35xx.h" #include "common.h" @@ -24,6 +26,7 @@ #include "control.h" #include "omap-secure.h" #include "soc.h" +#include "omap_device.h" struct pdata_init { const char *compatible; @@ -75,6 +78,13 @@ static inline void legacy_init_wl12xx(unsigned ref_clock, } #endif +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) +static struct gfx_sgx_platform_data gfx_pdata = { + .reset_name = "gfx", + .deassert_reset = omap_device_deassert_hardreset, +}; +#endif + #ifdef CONFIG_MACH_NOKIA_N8X0 static void __init omap2420_n8x0_legacy_init(void) { @@ -94,6 +104,12 @@ static void __init hsmmc2_internal_input_clk(void) omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); } +static struct iommu_platform_data omap3_iommu_pdata = { + .reset_name = "mmu", + .assert_reset = omap_device_assert_hardreset, + .deassert_reset = omap_device_deassert_hardreset, +}; + static int omap3_sbc_t3730_twl_callback(struct device *dev, unsigned gpio, unsigned ngpio) @@ -259,11 +275,17 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap3-padconf", 0x480025a0, "480025a0.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", + &omap3_iommu_pdata), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", &am35xx_emac_pdata), #endif +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) + OF_DEV_AUXDATA("ti,sgx", 0x56000000, "56000000.sgx", + &gfx_pdata), +#endif #ifdef CONFIG_ARCH_OMAP4 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), diff --git a/build_modules.sh b/build_modules.sh new file mode 100644 index 0000000..b88f1cf --- /dev/null +++ b/build_modules.sh @@ -0,0 +1,19 @@ +#!/bin/bash + +set -e + +CC=/home/nielsenr/svn-neu/10-03-02-224_secaLinux/trunk/Software/Development/Yocto/poky/build_seca/tmp-eglibc/sysroots/x86_64-linux/usr/bin/armv7a-vfp-neon-oe-linux-gnueabi/arm-oe-linux-gnueabi- +#make -j4 ARCH=arm CROSS_COMPILE=${CC} modules + +if [ -d ./deploy/lib ]; then + # Control will enter here if $DIRECTORY exists. + rm -rf ./deploy/lib + echo "remove directory ok" +fi + +make -j4 ARCH=arm CROSS_COMPILE=${CC} modules_install INSTALL_MOD_PATH=./deploy + + +cat include/generated/utsrelease.h | awk '{print $3}' | sed 's/\"//g' + +set +e diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c b/drivers/gpu/drm/drm_fb_cma_helper.c index 61b5a47..2e2c489 100644 --- a/drivers/gpu/drm/drm_fb_cma_helper.c +++ b/drivers/gpu/drm/drm_fb_cma_helper.c @@ -25,6 +25,12 @@ #include #include +/* + * number of buffers to allocate from CMA pool, often increased for + * double/triple buffering + */ +#define DRM_NUM_FBDEV_BUFFERS 3 + struct drm_fb_cma { struct drm_framebuffer fb; struct drm_gem_cma_object *obj[4]; @@ -265,7 +271,7 @@ static int drm_fbdev_cma_create(struct drm_fb_helper *helper, bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8); mode_cmd.width = sizes->surface_width; - mode_cmd.height = sizes->surface_height; + mode_cmd.height = sizes->surface_height * DRM_NUM_FBDEV_BUFFERS; mode_cmd.pitches[0] = sizes->surface_width * bytes_per_pixel; mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth); @@ -304,7 +310,7 @@ static int drm_fbdev_cma_create(struct drm_fb_helper *helper, } drm_fb_helper_fill_fix(fbi, fb->pitches[0], fb->depth); - drm_fb_helper_fill_var(fbi, helper, fb->width, fb->height); + drm_fb_helper_fill_var(fbi, helper, fb->width, sizes->surface_height); offset = fbi->var.xoffset * bytes_per_pixel; offset += fbi->var.yoffset * fb->pitches[0]; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index d36efc1..48c4fdc 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -30,6 +30,8 @@ struct tilcdc_crtc { int dpms; wait_queue_head_t frame_done_wq; bool frame_done; + spinlock_t irq_lock; + int dma_completed_channel; /* fb currently set to scanout 0/1: */ struct drm_framebuffer *scanout[2]; @@ -37,6 +39,10 @@ struct tilcdc_crtc { /* for deferred fb unref's: */ struct drm_flip_work unref_work; }; + +static vsync_callback_t vsync_cb_handler; +static void *vsync_cb_arg; + #define to_tilcdc_crtc(x) container_of(x, struct tilcdc_crtc, base) static void unref_worker(struct drm_flip_work *work, void *val) @@ -98,10 +104,23 @@ static void update_scanout(struct drm_crtc *crtc) (crtc->mode.vdisplay * fb->pitches[0]); if (tilcdc_crtc->dpms == DRM_MODE_DPMS_ON) { - /* already enabled, so just mark the frames that need - * updating and they will be updated on vblank: + /* + * already enabled, so just mark the frames that need + * updating and they will be updated on vblank + * and update the inactive DMA channel immediately + * to avoid any tearing due to the DMA already starting + * on the pending dma buffer when we hit the vblank IRQ */ - tilcdc_crtc->dirty |= LCDC_END_OF_FRAME0 | LCDC_END_OF_FRAME1; + if (tilcdc_crtc->dma_completed_channel == 0) { + tilcdc_crtc->dirty |= LCDC_END_OF_FRAME1; + set_scanout(crtc, 0); + } + + if (tilcdc_crtc->dma_completed_channel == 1) { + tilcdc_crtc->dirty |= LCDC_END_OF_FRAME0; + set_scanout(crtc, 1); + } + drm_vblank_get(dev, 0); } else { /* not enabled yet, so update registers immediately: */ @@ -576,12 +595,39 @@ out: pm_runtime_put_sync(dev->dev); } +int register_vsync_cb(vsync_callback_t handler, void *arg, int idx) +{ + if ((vsync_cb_handler == NULL) && (vsync_cb_arg == NULL)) { + vsync_cb_arg = arg; + vsync_cb_handler = handler; + } else { + return -EEXIST; + } + + return 0; +} +EXPORT_SYMBOL(register_vsync_cb); + +int unregister_vsync_cb(vsync_callback_t handler, void *arg, int idx) +{ + if ((vsync_cb_handler == handler) && (vsync_cb_arg == arg)) { + vsync_cb_handler = NULL; + vsync_cb_arg = NULL; + } else { + return -ENXIO; + } + + return 0; +} +EXPORT_SYMBOL(unregister_vsync_cb); + irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; uint32_t stat = tilcdc_read_irqstatus(dev); + unsigned long irq_flags; if ((stat & LCDC_SYNC_LOST) && (stat & LCDC_FIFO_UNDERFLOW)) { stop(crtc); @@ -597,11 +643,19 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) tilcdc_clear_irqstatus(dev, stat); - if (dirty & LCDC_END_OF_FRAME0) + spin_lock_irqsave(&tilcdc_crtc->irq_lock, irq_flags); + + if (dirty & LCDC_END_OF_FRAME0) { set_scanout(crtc, 0); + tilcdc_crtc->dma_completed_channel = 0; + } - if (dirty & LCDC_END_OF_FRAME1) + if (dirty & LCDC_END_OF_FRAME1) { set_scanout(crtc, 1); + tilcdc_crtc->dma_completed_channel = 1; + } + + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, irq_flags); drm_handle_vblank(dev, 0); @@ -610,6 +664,10 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) tilcdc_crtc->event = NULL; if (event) drm_send_vblank_event(dev, 0, event); + + if (vsync_cb_handler) + vsync_cb_handler(vsync_cb_arg); + spin_unlock_irqrestore(&dev->event_lock, flags); if (dirty && !tilcdc_crtc->dirty) @@ -671,6 +729,8 @@ struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) goto fail; } + spin_lock_init(&tilcdc_crtc->irq_lock); + ret = drm_crtc_init(dev, crtc, &tilcdc_crtc_funcs); if (ret < 0) goto fail; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 0938036..05269be 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -170,4 +170,9 @@ void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode); int tilcdc_crtc_max_width(struct drm_crtc *crtc); +/* used by SGX OMAPLFB drvier */ +typedef void (*vsync_callback_t)(void *arg); +int register_vsync_cb(vsync_callback_t handler, void *arg, int idx); +int unregister_vsync_cb(vsync_callback_t handler, void *arg, int idx); + #endif /* __TILCDC_DRV_H__ */ diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index de64596..d1d663b 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -2053,7 +2053,17 @@ static struct platform_driver pcs_driver = { #endif }; -module_platform_driver(pcs_driver); +static int __init pcs_init(void) +{ + return platform_driver_register(&pcs_driver); +} +postcore_initcall(pcs_init); + +static void __exit pcs_exit(void) +{ + platform_driver_unregister(&pcs_driver); +} +module_exit(pcs_exit); MODULE_AUTHOR("Tony Lindgren "); MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver"); diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c index 1d29bbf..0b7cbfa 100644 --- a/drivers/usb/musb/musb_cppi41.c +++ b/drivers/usb/musb/musb_cppi41.c @@ -39,6 +39,7 @@ struct cppi41_dma_channel { u32 transferred; u32 packet_sz; struct list_head tx_check; + struct work_struct dma_completion; }; #define MUSB_DMA_NUM_CHANNELS 15 @@ -112,6 +113,18 @@ static bool musb_is_tx_fifo_empty(struct musb_hw_ep *hw_ep) return true; } +static bool is_isoc(struct musb_hw_ep *hw_ep, bool in) +{ + if (in && hw_ep->in_qh) { + if (hw_ep->in_qh->type == USB_ENDPOINT_XFER_ISOC) + return true; + } else if (hw_ep->out_qh) { + if (hw_ep->out_qh->type == USB_ENDPOINT_XFER_ISOC) + return true; + } + return false; +} + static void cppi41_dma_callback(void *private_data); static void cppi41_trans_done(struct cppi41_dma_channel *cppi41_channel) @@ -165,6 +178,32 @@ static void cppi41_trans_done(struct cppi41_dma_channel *cppi41_channel) } } +static void cppi_trans_done_work(struct work_struct *work) +{ + unsigned long flags; + struct cppi41_dma_channel *cppi41_channel = + container_of(work, struct cppi41_dma_channel, dma_completion); + struct cppi41_dma_controller *controller = cppi41_channel->controller; + struct musb *musb = controller->musb; + struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep; + bool empty; + + if (!cppi41_channel->is_tx && is_isoc(hw_ep, 1)) { + spin_lock_irqsave(&musb->lock, flags); + cppi41_trans_done(cppi41_channel); + spin_unlock_irqrestore(&musb->lock, flags); + } else { + empty = musb_is_tx_fifo_empty(hw_ep); + if (empty) { + spin_lock_irqsave(&musb->lock, flags); + cppi41_trans_done(cppi41_channel); + spin_unlock_irqrestore(&musb->lock, flags); + } else { + schedule_work(&cppi41_channel->dma_completion); + } + } +} + static enum hrtimer_restart cppi41_recheck_tx_req(struct hrtimer *timer) { struct cppi41_dma_controller *controller; @@ -229,6 +268,14 @@ static void cppi41_dma_callback(void *private_data) transferred < cppi41_channel->packet_sz) cppi41_channel->prog_len = 0; + if (!cppi41_channel->is_tx) { + if (is_isoc(hw_ep, 1)) + schedule_work(&cppi41_channel->dma_completion); + else + cppi41_trans_done(cppi41_channel); + goto out; + } + empty = musb_is_tx_fifo_empty(hw_ep); if (empty) { cppi41_trans_done(cppi41_channel); @@ -265,6 +312,10 @@ static void cppi41_dma_callback(void *private_data) goto out; } } + if (is_isoc(hw_ep, 0)) { + schedule_work(&cppi41_channel->dma_completion); + goto out; + } list_add_tail(&cppi41_channel->tx_check, &controller->early_tx_list); if (!hrtimer_is_queued(&controller->early_tx)) { @@ -449,12 +500,25 @@ static int cppi41_dma_channel_program(struct dma_channel *channel, dma_addr_t dma_addr, u32 len) { int ret; + struct cppi41_dma_channel *cppi41_channel = channel->private_data; + int hb_mult = 0; BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || channel->status == MUSB_DMA_STATUS_BUSY); + if (is_host_active(cppi41_channel->controller->musb)) { + if (cppi41_channel->is_tx) + hb_mult = cppi41_channel->hw_ep->out_qh->hb_mult; + else + hb_mult = cppi41_channel->hw_ep->in_qh->hb_mult; + } + channel->status = MUSB_DMA_STATUS_BUSY; channel->actual_len = 0; + + if (hb_mult) + packet_sz = hb_mult * (packet_sz & 0x7FF); + ret = cppi41_configure_channel(channel, packet_sz, mode, dma_addr, len); if (!ret) channel->status = MUSB_DMA_STATUS_FREE; @@ -608,7 +672,8 @@ static int cppi41_dma_controller_start(struct cppi41_dma_controller *controller) cppi41_channel->port_num = port; cppi41_channel->is_tx = is_tx; INIT_LIST_HEAD(&cppi41_channel->tx_check); - + INIT_WORK(&cppi41_channel->dma_completion, + cppi_trans_done_work); musb_dma = &cppi41_channel->channel; musb_dma->private_data = cppi41_channel; musb_dma->status = MUSB_DMA_STATUS_FREE; diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c index 6b0fb6a..88b06bf 100644 --- a/drivers/usb/musb/musb_host.c +++ b/drivers/usb/musb/musb_host.c @@ -1692,9 +1692,11 @@ void musb_host_rx(struct musb *musb, u8 epnum) | MUSB_RXCSR_H_AUTOREQ | MUSB_RXCSR_AUTOCLEAR | MUSB_RXCSR_RXPKTRDY); + musb_writew(hw_ep->regs, MUSB_RXCSR, val); -#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_UX500_DMA) +#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_UX500_DMA) || \ + defined(CONFIG_USB_TI_CPPI41_DMA) if (usb_pipeisoc(pipe)) { struct usb_iso_packet_descriptor *d; @@ -1709,8 +1711,28 @@ void musb_host_rx(struct musb *musb, u8 epnum) if (++qh->iso_idx >= urb->number_of_packets) done = true; - else + else { +#if defined(CONFIG_USB_TI_CPPI41_DMA) + struct dma_controller *c; + dma_addr_t *buf; + u32 length, ret; + + c = musb->dma_controller; + buf = (void *) + urb->iso_frame_desc[qh->iso_idx].offset + + (u32)urb->transfer_dma; + + length = + urb->iso_frame_desc[qh->iso_idx].length; + + val |= MUSB_RXCSR_DMAENAB; + musb_writew(hw_ep->regs, MUSB_RXCSR, val); + + ret = c->channel_program(dma, qh->maxpacket, + 0, (u32) buf, length); +#endif done = false; + } } else { /* done if urb buffer is full or short packet is recd */ @@ -1750,7 +1772,8 @@ void musb_host_rx(struct musb *musb, u8 epnum) } /* we are expecting IN packets */ -#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_UX500_DMA) +#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_UX500_DMA) || \ + defined(CONFIG_USB_TI_CPPI41_DMA) if (dma) { struct dma_controller *c; u16 rx_count; diff --git a/include/linux/platform_data/gfx-sgx.h b/include/linux/platform_data/gfx-sgx.h new file mode 100644 index 0000000..aa59b2c --- /dev/null +++ b/include/linux/platform_data/gfx-sgx.h @@ -0,0 +1,22 @@ +/* + * SGX Graphics Driver Platform Data + * + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ + * Darren Etheridge + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include + +struct gfx_sgx_platform_data { + const char *reset_name; + + int (*deassert_reset)(struct platform_device *pdev, const char *name); +}; diff --git a/patch.sh b/patch.sh new file mode 100644 index 0000000..3a32420 --- /dev/null +++ b/patch.sh @@ -0,0 +1,81 @@ +#!/bin/sh +# +# Copyright (c) 2009-2014 Robert Nelson + +dts () { + echo "dir: dts" + patch -p1 < ./patches-RCN/dts/0001-arm-dts-am335x-boneblack-lcdc-add-panel-info.patch + patch -p1 < ./patches-RCN/dts/0002-arm-dts-am335x-boneblack-add-cpu0-opp-points.patch + patch -p1 < ./patches-RCN/dts/0003-arm-dts-am335x-bone-common-enable-and-use-i2c2.patch + patch -p1 < ./patches-RCN/dts/0004-arm-dts-am335x-bone-common-setup-default-pinmux-http.patch +} + +fixes () { + echo "dir: fixes" + patch -p1 < ./patches-RCN/fixes/0001-pinctrl-pinctrl-single-must-be-initialized-early.patch +} + +usb () { + echo "dir: usb" + patch -p1 < ./patches-RCN/usb/0001-usb-musb-musb_host-Enable-ISOCH-IN-handling-for-AM33.patch + patch -p1 < ./patches-RCN/usb/0002-usb-musb-musb_cppi41-Make-CPPI-aware-of-high-bandwid.patch + patch -p1 < ./patches-RCN/usb/0003-usb-musb-musb_cppi41-Handle-ISOCH-differently-and-no.patch +} + +dts_bone () { + echo "dir: dts-bone" + patch -p1 < ./patches-RCN/dts-bone/0001-arm-dts-am335x-bone-common-add-uart2_pins-uart4_pins.patch + +} + +dts_bone_capes () { + echo "dir: dts-bone-capes" + patch -p1 < ./patches-RCN/dts-bone-capes/0001-capes-ttyO1-ttyO2-ttyO4.patch + patch -p1 < ./patches-RCN/dts-bone-capes/0002-capes-Makefile.patch +} + +static_capes () { + echo "dir: static-capes" + patch -p1 < ./patches-RCN/static-capes/0001-Added-Argus-UPS-cape-support.patch + patch -p1 < ./patches-RCN/static-capes/0002-Added-Argus-UPS-cape-support-BBW.patch + patch -p1 < ./patches-RCN/static-capes/0003-dts-update-usb-nodes-v3.14.3.patch +} + +saucy () { + echo "dir: saucy" + #Ubuntu Saucy: so Ubuntu decided to enable almost every Warning -> Error option... + patch -p1 < ./patches-RCN/saucy/0001-saucy-disable-Werror-pointer-sign.patch + patch -p1 < ./patches-RCN/saucy/0002-saucy-error-variable-ilace-set-but-not-used-Werror-u.patch +} + +sgx () { + echo "dir: sgx" + patch -p1 < ./patches-RCN/sgx/0001-HACK-drm-fb_helper-enable-panning-support.patch + patch -p1 < ./patches-RCN/sgx/0002-HACK-drm-tilcdc-add-vsync-callback-for-use-in-omaplf.patch + patch -p1 < ./patches-RCN/sgx/0003-drm-tilcdc-fix-the-ping-pong-dma-tearing-issue-seen-.patch + patch -p1 < ./patches-RCN/sgx/0004-ARM-OMAP2-Use-pdata-quirks-for-sgx-deassert_hardrese.patch + patch -p1 < ./patches-RCN/sgx/0005-ARM-dts-am33xx-add-DT-node-for-gpu.patch + patch -p1 < ./patches-RCN/sgx/0006-sgx-pdata-fixes-from-ti-v3.14.x-tree.patch + patch -p1 < ./patches-RCN/sgx/0007-arm-Export-cache-flush-management-symbols-when-MULTI.patch +} + +packaging () { + echo "dir: packaging" + patch -p1 < ./patches-RCN/packaging/0001-packaging-sync-with-mainline.patch + patch -p1 < ./patches-RCN/packaging/0002-deb-pkg-install-dtbs-in-linux-image-package.patch + patch -p1 < ./patches-RCN/packaging/0003-deb-pkg-install-dtbs-when-dtbs_install-didnt-exist.patch +} + +### +dts +fixes +usb + +dts_bone + +sgx + +#packaging_setup +packaging + +echo "patch.sh ran successful" diff --git a/scripts/package/builddeb b/scripts/package/builddeb index 152d4d2..f271a42 100644 --- a/scripts/package/builddeb +++ b/scripts/package/builddeb @@ -35,13 +35,15 @@ create_package() { sparc*) debarch=sparc ;; s390*) - debarch=s390 ;; + debarch=s390$(grep -q CONFIG_64BIT=y $KCONFIG_CONFIG && echo x || true) ;; ppc*) debarch=powerpc ;; parisc*) debarch=hppa ;; mips*) debarch=mips$(grep -q CPU_LITTLE_ENDIAN=y $KCONFIG_CONFIG && echo el || true) ;; + arm64) + debarch=arm64 ;; arm*) debarch=arm$(grep -q CONFIG_AEABI=y $KCONFIG_CONFIG && echo el || true) ;; *) @@ -130,7 +132,7 @@ if [ "$ARCH" = "um" ] ; then cp System.map "$tmpdir/usr/lib/uml/modules/$version/System.map" cp $KCONFIG_CONFIG "$tmpdir/usr/share/doc/$packagename/config" gzip "$tmpdir/usr/share/doc/$packagename/config" -else +else cp System.map "$tmpdir/boot/System.map-$version" cp $KCONFIG_CONFIG "$tmpdir/boot/config-$version" fi @@ -165,6 +167,17 @@ if grep -q '^CONFIG_MODULES=y' $KCONFIG_CONFIG ; then fi fi +if grep -q '^CONFIG_OF=y' $KCONFIG_CONFIG ; then + mkdir -p "$tmpdir/boot/dtbs/$version" + $MAKE KBUILD_SRC= dtbs + find arch/arm/boot/ -iname "*.dtb" -exec cp -v '{}' "$tmpdir/boot/dtbs/$version" \; + + #make dtbs_install seems to add an .old directory + if [ -d "$tmpdir/boot/dtbs/$version.old" ] ; then + rm -rf "$tmpdir/boot/dtbs/$version.old" + fi +fi + if [ "$ARCH" != "um" ]; then $MAKE headers_check KBUILD_SRC= $MAKE headers_install KBUILD_SRC= INSTALL_HDR_PATH="$libc_headers_dir/usr" @@ -287,14 +300,16 @@ EOF fi -# Build header package -(cd $srctree; find . -name Makefile\* -o -name Kconfig\* -o -name \*.pl > "$objtree/debian/hdrsrcfiles") -(cd $srctree; find arch/$SRCARCH/include include scripts -type f >> "$objtree/debian/hdrsrcfiles") -(cd $objtree; find arch/$SRCARCH/include Module.symvers include scripts -type f >> "$objtree/debian/hdrobjfiles") +# Build kernel header package +(cd $srctree; find . -name Makefile\* -o -name Kconfig\* -o -name \*.pl) > "$objtree/debian/hdrsrcfiles" +(cd $srctree; find arch/$SRCARCH/include include scripts -type f) >> "$objtree/debian/hdrsrcfiles" +(cd $srctree; find arch/$SRCARCH -name module.lds -o -name Kbuild.platforms -o -name Platform) >> "$objtree/debian/hdrsrcfiles" +(cd $srctree; find $(find arch/$SRCARCH -name include -o -name scripts -type d) -type f) >> "$objtree/debian/hdrsrcfiles" +(cd $objtree; find arch/$SRCARCH/include Module.symvers include scripts -type f) >> "$objtree/debian/hdrobjfiles" destdir=$kernel_headers_dir/usr/src/linux-headers-$version mkdir -p "$destdir" -(cd $srctree; tar -c -f - -T "$objtree/debian/hdrsrcfiles") | (cd $destdir; tar -xf -) -(cd $objtree; tar -c -f - -T "$objtree/debian/hdrobjfiles") | (cd $destdir; tar -xf -) +(cd $srctree; tar -c -f - -T -) < "$objtree/debian/hdrsrcfiles" | (cd $destdir; tar -xf -) +(cd $objtree; tar -c -f - -T -) < "$objtree/debian/hdrobjfiles" | (cd $destdir; tar -xf -) (cd $objtree; cp $KCONFIG_CONFIG $destdir/.config) # copy .config manually to be where it's expected to be ln -sf "/usr/src/linux-headers-$version" "$kernel_headers_dir/lib/modules/$version/build" rm -f "$objtree/debian/hdrsrcfiles" "$objtree/debian/hdrobjfiles" -- 2.3.5